公开(公告)号：US06352875B1

公开(公告)日：2002-03-05

申请号：US09176258

申请日：1998-10-21

申请人： Shinichi Hayashi ,  Akira Funakoshi ,  Akira Tago ,  Satoshi Okada ,  Shinichi Takeda ,  Eiichi Takami ,  Masakazu Morishita ,  Chiori Mochizuki ,  Tadao Endo ,  Toshikazu Tamura

发明人： Shinichi Hayashi ,  Akira Funakoshi ,  Akira Tago ,  Satoshi Okada ,  Shinichi Takeda ,  Eiichi Takami ,  Masakazu Morishita ,  Chiori Mochizuki ,  Tadao Endo ,  Toshikazu Tamura

IPC分类号： H01L310203

CPC分类号： H01L27/14618 ,  H01L24/14 ,  H01L27/14634 ,  H01L27/14676 ,  H01L31/0203 ,  H01L31/02322 ,  H01L2924/12042 ,  H01L2924/351 ,  Y10T156/1077 ,  Y10T156/1092 ,  H01L2924/00

摘要： In a photoelectric conversion apparatus obtained by arranging and fixing a plurality of semiconductor element substrates onto a base with an adhesive, the levels of the upper surfaces of the substrates are adjusted with a desired thickness of the adhesive so as to set the upper surfaces within the same plane while the distance from the upper surface of the base to the semiconductor element surface of each substrate is kept to a design value, thereby realizing a photoelectric conversion apparatus constituted by a plurality of substrates arranged two-dimensionally, which eliminates level gaps between the substrates, and hence is free from problems such as a decrease in resolution, a deterioration in sensitivity, and peeling of a phosphor and the like.

摘要翻译： 在通过使用粘合剂将多个半导体元件基板布置并固定到基底上而获得的光电转换装置中，以期望的粘合剂厚度调整基板的上表面的水平，以将上表面设置在 从基板的上表面到每个基板的半导体元件表面的距离保持相同的平面，从而实现由二维排列的多个基板构成的光电转换装置，从而消除了 基板，因此没有诸如分辨率降低，灵敏度降低和荧光体剥离等问题。

公开(公告)号：US06956216B2

公开(公告)日：2005-10-18

申请号：US09879214

申请日：2001-06-13

申请人： Takamasa Ishii ,  Chiori Mochizuki

发明人： Takamasa Ishii ,  Chiori Mochizuki

IPC分类号： H01L27/146 ,  H01L27/14 ,  G01T1/24

CPC分类号： H01L27/14618 ,  H01L27/14676 ,  H01L2924/0002 ,  H01L2924/00

摘要： By forming a redundant circuit of an extra wiring accompanied with no decrease in an aperture ratio for a photoelectric conversion element, the yield is prevented from being reduced due to wire breaking during a panel manufacturing process.A gate line Vg4 and a Vg redundant wiring are electrically insulated and are arranged so as to form a crossing G of the upper and lower lines. Since a Vg redundant wiring Y is formed concurrently with a Sig line, there is no need for additional manufacturing steps to form the Vg redundant wiring Y. If a breaking occurs in the gate line Vg4, the gate line Vg4 and the Vg redundant wiring Y are electrically connected to each other by irradiating the crossing G with a laser. Therefore, a gate drive pulse is also applied to a thin film transistor on the broken line through the Vg redundant wiring Y. Thus, any lowering in yield due to a breaking of the gate line Vg4 can be prevented without any decrease in the aperture ratio for the photoelectric conversion element.

摘要翻译： 通过形成额外布线的冗余电路，伴随着光电转换元件的开口率不降低，防止了在面板制造过程中由于断线而导致的收率降低。 栅极线Vg4和Vg冗余布线是电绝缘的，并且被布置成形成上下线的交叉点G. 由于Vg冗余布线Y与Sig线同时形成，所以不需要额外的制造步骤来形成Vg冗余布线Y.如果在栅极线Vg4中发生断线，则栅极线Vg4和Vg冗余 通过用激光照射交叉G，将布线Y彼此电连接。 因此，栅极驱动脉冲也通过Vg冗余布线Y施加到虚线上的薄膜晶体管。因此，可以防止由于栅极线Vg4的断裂而导致的成品率的任何降低，而孔径没有任何降低 光电转换元件的比例。

公开(公告)号：US20050145903A1

公开(公告)日：2005-07-07

申请号：US11071245

申请日：2005-03-04

申请人： Takamasa Ishii ,  Chiori Mochizuki

发明人： Takamasa Ishii ,  Chiori Mochizuki

IPC分类号： H01L27/146 ,  H01L31/062 ,  H01L31/113

CPC分类号： H01L27/14618 ,  H01L27/14676 ,  H01L2924/0002 ,  H01L2924/00

摘要： By forming a redundant circuit of an extra wiring accompanied with no decrease in an aperture ratio for a photoelectric conversion element, the yield is prevented from being reduced due to wire breaking during a panel manufacturing process. A gate line Vg4 and a Vg redundant wiring are electrically insulated and are arranged so as to form a crossing G of the upper and lower lines. Since a Vg redundant wiring Y is formed concurrently with a Sig line, there is no need for additional manufacturing steps to form the Vg redundant wiring Y. If a breaking occurs in the gate line Vg4, the gate line Vg4 and the Vg redundant wiring Y are electrically connected to each other by irradiating the crossing G with a laser. Therefore, a gate drive pulse is also applied to a thin film transistor on the broken line through the Vg redundant wiring Y. Thus, any lowering in yield due to a breaking of the gate line Vg4 can be prevented without any decrease in the aperture ratio for the photoelectric conversion element.

摘要翻译： 通过形成额外布线的冗余电路，伴随着光电转换元件的开口率不降低，防止了在面板制造过程中由于断线而导致的收率降低。 栅极线Vg4和Vg冗余布线是电绝缘的，并且被布置成形成上下线的交叉点G. 由于Vg冗余布线Y与Sig线同时形成，所以不需要额外的制造步骤来形成Vg冗余布线Y.如果在栅极线Vg4中发生断线，则栅极线Vg4和Vg冗余布线Y 通过用激光照射交叉点G而彼此电连接。 因此，栅极驱动脉冲也通过Vg冗余布线Y施加到虚线上的薄膜晶体管。因此，可以防止由于栅极线Vg4的断裂而导致的成品率的任何降低，而孔径比 用于光电转换元件。

公开(公告)号：US20130020494A1

公开(公告)日：2013-01-24

申请号：US13544105

申请日：2012-07-09

申请人： Masato Ofuji ,  Chiori Mochizuki ,  Minoru Watanabe ,  Keigo Yokoyama ,  Jun Kawanabe ,  Kentaro Fujiyoshi ,  Hiroshi Wayama

发明人： Masato Ofuji ,  Chiori Mochizuki ,  Minoru Watanabe ,  Keigo Yokoyama ,  Jun Kawanabe ,  Kentaro Fujiyoshi ,  Hiroshi Wayama

IPC分类号： H01L27/146

CPC分类号： H04N5/3765 ,  H01L27/14609 ,  H01L27/14663 ,  H01L27/14692 ,  H04N5/32

摘要： A detection apparatus includes a driving circuit unit in which a plurality of unit circuits each including a first circuit that supplies conducting voltage of a switch element of a pixel based on voltage included in a clock signal to a driving wire in accordance with an initiation signal and a second circuit that supplies non-conducting voltage of the switch element to the driving wire in accordance with a termination signal are provided for the plurality of corresponding driving wires and a control unit that supplies the clock signal to the driving circuit unit. The control unit supplies control voltage to the plurality of unit circuits, and each of the plurality of unit circuits further includes a third circuit that continues to supply the non-conducting voltage to the corresponding driving wire in accordance with the control voltage.

摘要翻译： 检测装置包括驱动电路单元，其中多个单元电路各自包括第一电路，该第一电路根据启动信号将基于时钟信号中包含的电压的像素的开关元件的导通电压提供给驱动线， 为多个相应的驱动线提供了根据终止信号将开关元件的非导通电压提供给驱动线的第二电路，以及将时钟信号提供给驱动电路单元的控制单元。 控制单元向多个单元电路提供控制电压，并且多个单元电路中的每一个还包括第三电路，其继续根据控制电压向相应的驱动线提供非导通电压。

公开(公告)号：US08508011B2

公开(公告)日：2013-08-13

申请号：US13405639

申请日：2012-02-27

申请人： Hiroshi Wayama ,  Chiori Mochizuki ,  Minoru Watanabe ,  Keigo Yokoyama ,  Masato Ofuji ,  Jun Kawanabe ,  Kentaro Fujiyoshi

发明人： Hiroshi Wayama ,  Chiori Mochizuki ,  Minoru Watanabe ,  Keigo Yokoyama ,  Masato Ofuji ,  Jun Kawanabe ,  Kentaro Fujiyoshi

IPC分类号： H01L31/00

CPC分类号： H01L27/14609 ,  H01L27/14603 ,  H01L27/14665 ,  H01L27/14683

摘要： A semiconductor apparatus including a substrate, a pixel array on the substrate, first and second conductive pads between which the substrate locates is provided. The apparatus also comprises an insulating layer arranged between the substrate and the first conductive pad; a third conductive pad arranged between the substrate and the insulating layer; a first conductive member which passes through the insulating layer and connects the first and third conductive pads to each other; and a second conductive member which passes through the substrate and connects the second and third conductive pads to each other. The pixel array further comprises a conductive line connected to circuit elements included in pixels aligned in a row or column direction. The first conductive pad is connected to the conductive line in an interval between the pixels.

摘要翻译： 提供了一种半导体装置，其包括基板，基板上的像素阵列，设置有基板的第一和第二导电焊盘。 该设备还包括布置在基板和第一导电焊盘之间的绝缘层; 布置在所述基板和所述绝缘层之间的第三导电焊盘; 第一导电构件，其穿过绝缘层并将第一和第三导电焊盘彼此连接; 以及第二导电构件，其穿过基板并将第二和第三导电焊盘彼此连接。 像素阵列还包括连接到包括在以行或列方向排列的像素中的电路元件的导线。 第一导电焊盘以像素之间的间隔连接到导电线。

公开(公告)号：US20120235270A1

公开(公告)日：2012-09-20

申请号：US13405639

申请日：2012-02-27

申请人： Hiroshi Wayama ,  Chiori Mochizuki ,  Minoru Watanabe ,  Keigo Yokoyama ,  Masato Ofuji ,  Jun Kawanabe ,  Kentaro Fujiyoshi

发明人： Hiroshi Wayama ,  Chiori Mochizuki ,  Minoru Watanabe ,  Keigo Yokoyama ,  Masato Ofuji ,  Jun Kawanabe ,  Kentaro Fujiyoshi

IPC分类号： H01L31/0224

CPC分类号： H01L27/14609 ,  H01L27/14603 ,  H01L27/14665 ,  H01L27/14683

摘要： A semiconductor apparatus including a substrate, a pixel array on the substrate, first and second conductive pads between which the substrate locates is provided. The apparatus also comprises an insulating layer arranged between the substrate and the first conductive pad; a third conductive pad arranged between the substrate and the insulating layer; a first conductive member which passes through the insulating layer and connects the first and third conductive pads to each other; and a second conductive member which passes through the substrate and connects the second and third conductive pads to each other. The pixel array further comprises a conductive line connected to circuit elements included in pixels aligned in a row or column direction. The first conductive pad is connected to the conductive line in an interval between the pixels.

摘要翻译： 提供了一种半导体装置，其包括基板，基板上的像素阵列，设置有基板的第一和第二导电焊盘。 该设备还包括布置在基板和第一导电焊盘之间的绝缘层; 布置在所述基板和所述绝缘层之间的第三导电焊盘; 第一导电构件，其穿过绝缘层并将第一和第三导电焊盘彼此连接; 以及第二导电构件，其穿过基板并将第二和第三导电焊盘彼此连接。 像素阵列还包括连接到包括在以行或列方向排列的像素中的电路元件的导线。 第一导电焊盘以像素之间的间隔连接到导电线。

公开(公告)号：US06909116B2

公开(公告)日：2005-06-21

申请号：US10305981

申请日：2002-11-29

申请人： Minoru Watanabe ,  Noriyuki Kaifu ,  Chiori Mochizuki

发明人： Minoru Watanabe ,  Noriyuki Kaifu ,  Chiori Mochizuki

IPC分类号： G09F9/30 ,  G02F1/133 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/77 ,  H01L21/822 ,  H01L21/84 ,  H01L27/02 ,  H01L27/04 ,  H01L27/12 ,  H01L27/13 ,  H01L27/146 ,  H01L29/786 ,  H01L29/04

CPC分类号： G02F1/136204 ,  H01L27/0288 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/14609

摘要： In a semiconductor device having a plurality of thin film transistors and matrix wiring lines formed on a substrate, the matrix wiring lines are electrically connected via resistors in order to prevent electrostatic destructions during a panel manufacture process and improve a manufacture yield.

摘要翻译： 在具有形成在基板上的多个薄膜晶体管和矩阵布线的半导体器件中，矩阵布线通过电阻器电连接，以防止在面板制造过程中的静电破坏并提高制造产量。

公开(公告)号：US20050051779A1

公开(公告)日：2005-03-10

申请号：US10969875

申请日：2004-10-22

申请人： Minoru Watanabe ,  Noriyuki Kaifu ,  Chiori Mochizuki

发明人： Minoru Watanabe ,  Noriyuki Kaifu ,  Chiori Mochizuki

IPC分类号： G09F9/30 ,  G02F1/133 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/77 ,  H01L21/822 ,  H01L21/84 ,  H01L27/02 ,  H01L27/04 ,  H01L27/12 ,  H01L27/13 ,  H01L27/146 ,  H01L29/786 ,  H01L29/04

CPC分类号： G02F1/136204 ,  H01L27/0288 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/14609

摘要： In a semiconductor device having a plurality of thin film transistors and matrix wiring lines formed on a substrate, the matrix wiring lines are electrically connected via resistors in order to prevent electrostatic destructions during a panel manufacture process and improve a manufacture yield.

公开(公告)号：US06794682B2

公开(公告)日：2004-09-21

申请号：US10108484

申请日：2002-03-29

申请人： Minoru Watanabe ,  Chiori Mochizuki

发明人： Minoru Watanabe ,  Chiori Mochizuki

IPC分类号： H01L2904

CPC分类号： H01L29/66765 ,  H01L27/14679 ,  H01L29/78618 ,  H01L31/1105 ,  H01L31/18

摘要： In a semiconductor device including bottom-gate-type thin-film transistors, each of which includes a gate electrode provided on an insulating surface of a substrate, a semiconductor layer provided on the gate electrode via a gate insulating layer, a pair of doped semiconductor layers adjacent to the semiconductor layer, and source and drain electrodes consisting of a pair of conductors adjacent to corresponding ones of the pair of doped semiconductor layers, the thickness of portions of the semiconductor layer below the source and drain electrodes is smaller than the thickness of a portion of the semiconductor layer at a gap portion between the source and drain electrodes.

摘要翻译： 在包括底栅型薄膜晶体管的半导体器件中，每个半导体器件包括设置在衬底的绝缘表面上的栅电极，经由栅极绝缘层设置在栅电极上的半导体层，一对掺杂半导体 与半导体层相邻的层，以及由与一对掺杂半导体层中的对应的一对导体相邻的一对导体组成的源极和漏极，源极和漏极之下的半导体层的部分的厚度小于 在源电极和漏电极之间的间隙部分处的半导体层的一部分。

公开(公告)号：US09190437B2

公开(公告)日：2015-11-17

申请号：US13610472

申请日：2012-09-11

申请人： Jun Kawanabe ,  Chiori Mochizuki ,  Minoru Watanabe ,  Masato Ofuji ,  Keigo Yokoyama ,  Kentaro Fujiyoshi ,  Hiroshi Wayama

发明人： Jun Kawanabe ,  Chiori Mochizuki ,  Minoru Watanabe ,  Masato Ofuji ,  Keigo Yokoyama ,  Kentaro Fujiyoshi ,  Hiroshi Wayama

IPC分类号： H01J40/14 ,  H01L27/146

CPC分类号： H01L27/14609 ,  H01L27/14665

摘要： A detection apparatus includes a transistor disposed on a substrate, a conversion element disposed above the transistor and connected to the transistor, a capacitor connected in parallel with conversion element to the transistor, the capacitor including, between the substrate and the conversion element, an ohmic contact part connected to the conversion element, a semiconductor part connected to the ohmic contact part, and an electrically conductive part disposed at a location opposite to the semiconductor part and the ohmic contact part via an insulating layer, and a potential supplying unit configured to selectively supply a first electric potential to the electrically conductive part to accumulate charge carriers in the semiconductor part and a second electric potential to the electrically conductive part to deplete the semiconductor part. The detection apparatus configured in the above-described manner is capable of controlling pixel capacitance thereby achieving a high signal-to-noise ratio.

摘要翻译： 检测装置包括设置在基板上的晶体管，设置在晶体管上方并连接到晶体管的转换元件，与转换元件并联连接到晶体管的电容器，电容器包括在基板和转换元件之间的欧姆 连接到转换元件的接触部分，连接到欧姆接触部分的半导体部分和经由绝缘层设置在与半导体部分和欧姆接触部分相对的位置处的导电部分，以及电位供给单元，被配置为选择性地 向导电部分提供第一电位，以将半导体部件中的电荷载流子积累，并且向导电部件累积第二电位以耗尽半导体部件。 以上述方式配置的检测装置能够控制像素电容，从而实现高的信噪比。