公开(公告)号：US20240373033A1

公开(公告)日：2024-11-07

申请号：US18311489

申请日：2023-05-03

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dror Porat ,  Dotan David Levi ,  Yury Shvartzman ,  Eyal Frishman

IPC: H04N19/147 ,  H04N19/136 ,  H04N19/17

Abstract: Approaches in accordance with various illustrative embodiments provide for the determination and/or optimization the quality of an image or video, such as an image that has been compressed for transmission or storage then decompressed for presentation. Weights can be determined for a set of weight-based quality metrics to produce an overall quality metric that is a weighted combination of these metrics. Because different portions of an image or video frame may have different types of features, an image or video frame can be divided into blocks of pixels, for example, with different weights being assigned to different blocks using quality metrics. Different metrics can be considered as points in a high-dimensional weight space, with each dimension corresponding to a weight of a block. A combination of these points results in an improved quality metric. Compression settings can be updated based in part upon the overall quality metric values.

公开(公告)号：US20240311183A1

公开(公告)日：2024-09-19

申请号：US18479784

申请日：2023-10-02

Applicant: Mellanox Technologies, Ltd.

Inventor： Natan Manevich ,  Ariel Shahar ,  Wojciech Wasko ,  Dotan David Levi ,  Roee Moyal ,  Eliel Peretz

IPC: G06F9/48 ,  G06F9/54

CPC classification number: G06F9/4881 ,  G06F9/542

Abstract: A work descriptor identifying a plurality of workflow tasks to be performed by a hardware device is generated by a host system. A plurality of timestamp logging tasks are added to the work descriptor. Each of the plurality of timestamp logging tasks corresponds to one of the plurality of workflow tasks and instructs the hardware device to log a timestamp in response to an event associated with a respective workflow task. The work descriptor with the plurality of timestamp logging tasks is stored in a work queue of the host system. The work queue is accessible by the hardware device.

公开(公告)号：US12081427B2

公开(公告)日：2024-09-03

申请号：US17191736

申请日：2021-03-04

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Arnon Sattinger ,  Dotan David Levi ,  Avraham Ganor ,  Shahar Givony ,  Nimer Khazen

IPC: H04L43/50 ,  H04L43/08 ,  H04L43/10

CPC classification number: H04L43/50 ,  H04L43/08 ,  H04L43/10

Abstract: A pluggable module, for testing time-synchronization signals of network elements, includes a first connector for connecting to test equipment, a second connector for connecting to a network port of a network element, and at least one driver. The at least one driver is connected between the first and second connectors and is configured to buffer and relay a time-synchronization signal between the network element and the test equipment.

公开(公告)号：US20240281022A1

公开(公告)日：2024-08-22

申请号：US18111916

申请日：2023-02-21

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Wojciech Wasko ,  Dotan David Levi ,  Natan Manevich ,  Maciek Machnikowski

IPC: G06F1/12 ,  G06F1/08

CPC classification number: G06F1/12 ,  G06F1/08

Abstract: In one embodiment, a clock synchronization system includes clock circuitry to maintain a clock running at a clock frequency, a clock controller, and a processor to execute software to generate clock update commands and provide the clock update commands to the clock controller, wherein the clock controller is configured to apply the clock update commands to the clock, store a holdover frequency command to maintain the clock during a failure of the clock update commands, apply the holdover frequency command to the clock responsively to detecting the failure.

公开(公告)号：US12068968B2

公开(公告)日：2024-08-20

申请号：US17588295

申请日：2022-01-30

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Gal Yefet ,  Saar Tarnopolsky ,  Avi Urman ,  Dotan David Levi ,  Elena Agostini

IPC: H04L47/2441 ,  H04L47/6295 ,  H04L69/22

CPC classification number: H04L47/2441 ,  H04L69/22

Abstract: In one embodiments, data communication system include a communication apparatus, which is configured to receive data from different user equipment devices a schedule of time periods, and packetize the data from respective ones of the user equipment devices for respective ones of the time periods into packets, a memory including a plurality of buffers, and a network interface controller configured to receive the packets from the communication apparatus, and scatter respective portions of the data belonging to respective groups of successive ones of the time periods to the buffers, responsively to a static set of steering rules, and timing information of respective ones of the packets, and wherein each respective portion of the data is scattered to the buffers a same scatter pattern.

公开(公告)号：US20240211426A1

公开(公告)日：2024-06-27

申请号：US18598382

申请日：2024-03-07

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Daniel Marcovitch ,  Dotan David Levi ,  Eyal Srebro ,  Eliel Peretz ,  Roee Moyal ,  Richard Graham ,  Gil Bloch ,  Sean Pieper

IPC: G06F13/42 ,  G06F7/76

CPC classification number: G06F13/42 ,  G06F7/76

Abstract: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.

公开(公告)号：US20240179029A1

公开(公告)日：2024-05-30

申请号：US18059811

申请日：2022-11-29

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Joseph Boccuzzi ,  Dotan David Levi

IPC: H04L25/02 ,  H04W24/02

CPC classification number: H04L25/0204 ,  H04W24/02

Abstract: Approaches in accordance with various embodiments enable communication functionality to be added to an existing hardware component, such as a network interface controller (NIC), data processing unit (DPA), or network switch, rather than requiring an additional component such as a Front Haul Multiplexor (FHM)-type for cellular communications. Such an approach not only avoids the cost and complexity of managing additional hardware components, but can also reduce bandwidth needed for signal transmission. For downlink communications, data can be copied to the relevant radio units of a cell in a single cell deployment architecture to be transmitted to a target client device, such as a cellular handset. For uplink communications, data received from a client device to multiple radio units can undergo decompression and channel estimation before combining the data into a single signal or data stream.

公开(公告)号：US20240168797A1

公开(公告)日：2024-05-23

申请号：US17988812

申请日：2022-11-17

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Wojciech Wasko ,  Dotan David Levi ,  Harsha Deepak Banuli Nanje Gowda ,  Natan Manevich ,  Daniel Marcovitch

IPC: G06F9/48 ,  G06F1/12 ,  G06F13/40

CPC classification number: G06F9/4881 ,  G06F1/12 ,  G06F13/405

Abstract: In one embodiment, a system includes a peripheral data connection bus configured to connect to devices and transfer data between the devices, a scheduling machine configured to connect to the peripheral data connection bus and send a read request message to a first processing device, and the first processing device configured to be connected to the peripheral data connection bus, and responsively to the read request message add a time value to a read response message, and provide the read response message to the scheduling machine, and wherein the scheduling machine is configured to read the time value from the provided read response message and schedule processing of an operation by a second processing device responsively to the read time value.

公开(公告)号：US20240154783A1

公开(公告)日：2024-05-09

申请号：US17983427

申请日：2022-11-09

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Wojciech Wasko

IPC: H04L7/00 ,  H04L7/06 ,  H04L47/62

CPC classification number: H04L7/0008 ,  H04L7/06 ,  H04L47/6225

Abstract: In one embodiment, a system includes a network interface controller to receive a first clock-synchronization message from a clock-synchronization leader device and send a second clock-synchronization messages to at least one clock-synchronization follower device, and a processor to execute software to generate the second clock-synchronization message, and generate a control dependency to condition sending the second clock-synchronization message by the network interface controller to the at least one clock-synchronization follower device on the network interface controller receiving the first clock-synchronization message from the clock-synchronization leader device.

公开(公告)号：US20240154712A1

公开(公告)日：2024-05-09

申请号：US18415883

申请日：2024-01-18

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Bar Shapira ,  Ariel Almog ,  Dotan David Levi ,  Natan Manevich ,  Thomas Kernen ,  Liron Mula

IPC: H04J3/06

CPC classification number: H04J3/0638

Abstract: A system for maintaining a Precision Time Protocol (PTP) hardware clock, the system being operative in conjunction with a network device which is external to the system, the system comprising a controller to receive information characterizing a network peer oscillator frequency, wherein the information was extracted from an RX symbol rate, and to adjust the PTP Hardware Clock's frequency responsive to the information characterizing the network peer oscillator frequency.