摘要:
Methods and systems are provided for dynamic power switching in current-steering digital-to-analog converters (DACs). A DAC circuit may be configured to apply digital-to-analog conversions based on current steering, and to particularly incorporate use of dynamic power switching during conversions. The DAC circuit may comprise a main section, which may connect a main supply voltage to a main current source. The main section may comprise a positive-side branch and a negative-side branch, which may be configured to steer positive-side and negative-side currents, such as in a differential manner, to effectuate the conversions. The dynamic power switching may be applied, for example, via a secondary section connecting a main current source in the DAC circuit to a secondary supply voltage. The secondary supply voltage may be configured such that it may be less than the main supply voltage used in driving the current steering in the DAC circuit.
摘要:
Methods and systems are provided for loop-through for multi-chip communication systems. Receiver circuitry, that is operable to receive one or more input feeds, may comprise a plurality of chips, each of which may be configurable to generate a corresponding output comprising one or more feed elements (e.g., channels) extracted from the input feed(s). However, only a first chip may be operable to handle reception and/or initial processing of the one or more input feeds, with each one of the remaining chips processing a loop-through feed generated by the first chip, in order to generate the corresponding output of that chip. The first chip generates the loop-through feed based on the one or more input feeds, such as after the initial processing thereof in the first chip. Generating the loop-through feed may comprise applying channelization (e.g., separately for each remaining chip), switching based processing, and/or interfacing based processing.
摘要:
A system for processing signals may be configured to detect occurrence of particular errors, comprising meta-stability events, during digital conversion to analog signals, and to handle any detected meta-stability event, such as by adjusting at least a portion of a corresponding digital output based on detection of the meta-stability event. The adjusting of the digital output may comprise setting at least the portion of the digital output, such as to one of a plurality of predefined digital values or patterns. The system may comprise a code generator for generating and/or outputting the predefined digital values or patterns. The system may comprise a selector for adaptively selecting, for portions of the digital output, between output of normal processing path and between predefined values or patterns.
摘要:
A satellite dish assembly may comprise a broadcast receive module and a basestation module. The broadcast receive module may be operable to receive a satellite signal, recover media carried in the satellite signal, and output the media. The basestation module may be operable to accept the media output by the broadcast receive module and transmit the media in accordance with one or more wireless protocols. In being conveyed from the broadcast receive module to the basestation, the media content may not traverse any wide area network connection. The one or more wireless protocols may comprise one or more of: a cellular protocol and IEEE 802.11 protocol. The satellite dish assembly may comprise a routing module that may be operable to route data between the broadcast receive module, the basestation, and a gateway.
摘要:
Methods and systems are provided for using localized dynamic element matching (DEM) and/or dynamic noise scaling (DNS) in digital-to-analog converters (DACs). Adaptive (localized) DEM may be applied in a DAC, by selecting one or more of a plurality DAC elements in the DAC, forcing the selected one or more of the plurality of DAC elements not to switch during digital-to-analog conversions, and scrambling remaining one or more of plurality of DAC elements when generating an output of the DAC. The adaptive DEM may be applied when the DAC input is backed off from full-scale. DNS may be applied in a DAC, by adaptively selecting one or more of a plurality DAC elements in the DAC and switching off the selected one or more of the plurality DAC elements such that the selected one or more of the plurality DAC elements do not contribute to generating an output of the DAC.
摘要:
A transmitter may comprise a first domain translation circuit, a first PAPR suppression circuit, and a descriptor generation circuit. The first domain translation circuit may convert a plurality of frequency-domain symbols of a first OFDM symbol to a corresponding plurality of first time-domain signals. The first PAPR suppression circuit may group the plurality of first time-domain signals into a plurality of sub-bands of the first time-domain. The first PAPR suppression circuit may invert one or more of the sub-bands of the first time-domain signals according to a value of a first descriptor. The descriptor generation circuit may determine the value of the first descriptor using an iterative process in which each iteration comprises random selection of a value of the first descriptor, determination of a PAPR of the first OFDM symbol processed using the randomly-selected value, and determination of whether said PAPR meets one or more determined criteria.
摘要:
One or more circuits may comprise at least one first-type analog-to-digital converter (ADC) and at least one second-type ADC. The circuit(s) may be operable to receive a plurality of signals, each of which may comprise a plurality of channels. The circuit(s) may be operable to digitize a selected one or more of the channels. Which, if any, of the selected channels are digitized via the at least one first-type ADC and which, if any, of the selected channels are digitized via the at least one second-type ADC, may be based on which of the plurality of channels are the selected channels and/or based on power consumption of the circuit(s). A bandwidth of each first-type ADC may be on the order of the bandwidth of one of the received signals. A bandwidth of each second-type ADC may be on the order of the bandwidth of one of the plurality of channels.
摘要:
A satellite reception assembly may receive signals on a block of frequencies that encompasses channels of one or more wireless networks. The satellite reception assembly may convey information about signals received on the block of frequencies to a centralized location which may utilize the information to determine characteristics, such as coverage area and/or usage, of the wireless network(s). Additionally or alternatively, such information from a plurality of satellite reception assemblies may be aggregated and made available to third parties which may use the aggregate information, in combination with knowledge about the wireless network(s), to determine characteristics of the wireless network(s).
摘要:
A signal receiver may be configured to determine when signal generation changes affecting signals being received by the signal receiver may cause performance related changes; and to modify its (the signal receiver) configuration to handle the performance related changes. In this regard, the modifying of configuration may comprise determining characteristics of performance related changes, and controlling operations of the signal receiver based on the determined characteristics of the performance related changes. The performance related changes may comprise amplitude glitches, phase glitches, and/or bit or packet errors. The signal generation changes may comprise channel-to-frequency reassignment. Controlling operations of the signal receiver based on determined characteristics of the performance related changes may comprise adjusting such parameters as amplification gain and/or tracking loop bandwidth, and/or determining whether (or not) to ignore bit/packet errors—i.e. not reacquire (e.g., based on determination that tracking loops used in the signal receiver remain locked).
摘要:
Methods and apparatus for processing multichannel signals in a multichannel receiver are described. In one implementation, a plurality of demodulator circuits may provide a plurality of outputs to a processing module, with the processing module then simultaneously estimating noise characteristics based on the plurality of outputs and generating a common noise estimate based on the plurality of outputs. This common noise estimate may then be provided back the demodulators and used to adjust the demodulation of signals in the plurality of demodulators to improve phase noise performance.