Abstract:
The present invention relates to a new use of inhibitors of leukotriene B4 receptor BLT2 for treating human cancers. More particularly, the present invention relates to a pharmaceutical composition for treating human cancers comprising BLT2 inhibitors and a method for treating human cancers using BLT2 inhibitors.The present inventors revealed the role of BLT2 as a survival factor of human cancers, such as bladder, prostate, pancreatic, and breast cancer and found that the BLT2 inhibitors can be used as anti-cancer drugs. The present inventors revealed that BLT2 has an important role in metastasis of cancer cells and angiogenesis of tumor and demonstrated that the anti-cancer activity of the BLT2 inhibitors is accomplished by inducing the apoptosis of cancer cells, inhibiting the metastasis of cancer cells, or inhibiting the angiogenesis of tumor.
Abstract:
There is provided a projector including a projection control unit which controls a projection of a background window and computes location information of at least one projection window projected on the background window, a performance sensing unit which senses an object performance on the background window and the at least one projection window, a communication unit which communicates with at least one other projector different from the projector, and an information control unit which controls an operation of each of the at least one other projector, the operation corresponding to the object performance.
Abstract:
A method for reducing a memory map table search time when employing a semiconductor memory device as a temporary memory of large capacity storage device, and a semiconductor memory device therefore, are provided. A MAP RAM is prepared for storing map table data related to the nonvolatile memory area in the volatile memory area. At an initial power-up operation, it is determined whether a logical address is searched for from the map table data while the map table data existing in a map storage area of the nonvolatile memory area is loaded into the MAP RAM. A physical address corresponding to the logical address is provided as an output, when the logical address is searched for. Search time for a memory map table is reduced and read performance in a high speed map information search is increased.
Abstract:
A method and apparatus for performing an automatic wireless connection with a second digital device by a first digital device is provided. The method includes acquiring, by the first input device, random information used for the wireless connection; checking a status of a Wireless Local Area Network (WLAN); storing the checked status; setting the WLAN to an Ad-hoc mode; setting a Service Set Identifier (SSID) of the WLAN using the random information; setting a security key of the WLAN using the random information; and setting an Internet Protocol (IP) address of the WLAN using the random information.
Abstract:
A light emitting device including a light emitting structure including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a first photonic crystal structure on the light emitting structure; a lower encapsulant on the first photonic crystal structure; and a second photonic crystal structure on the lower encapsulant.
Abstract:
A picture image providing method and a picture-taking device using the method are provided. The picture-taking device includes: a picture-taking module generating a picture image by taking a picture of a photography object via a camera; a transmission location management module managing a target image for identifying the photography object included in the picture image, and transmission location information for transmitting the picture image, in correspondence to the target image; an area selection module selecting an area on the picture image corresponding to the target image; an image identification module identifying the target image corresponding to the photography object, included in the picture image, using the target image and the selected area on the picture image; and a picture image transmission module identifying the transmission location information corresponding to the identified target image, and transmitting the picture image to a location corresponding to the transmission location information.
Abstract:
A semiconductor memory device includes a cell core storing data, a plurality of peripheral circuit components, collectively driving data to/from the cell core and providing a default state at an output signal state during an initialization process upon power-up, and an initialization circuit detecting a standby mode of operation for the semiconductor memory device, and upon detecting the standby mode controlling operation of the plurality of peripheral circuit components to provide the default state as the signal state during standby mode.
Abstract:
A method of sharing contents among devices, the method includes a first device and a second device performing a time synchronization, the first device receiving, from a user, a time stamp with respect to contents being replayed by the second device, the first device transmitting the time stamp to the second device, the second device transmitting a contents list corresponding to the time stamp to the first device, the first device requesting the second device for contents selected by the user from among the contents list, and the second device providing the requested contents to the first device.
Abstract:
A flash memory device and a method of programming the same include a memory cell array, a pass/fail check circuit and a control logic circuit. The memory cell array includes multiple memory cells arranged in rows and columns. The pass/fail check circuit verifies whether data bits selected by a column address during a column scan operation have program data values. The control logic circuit detects fail data bits from the selected data bits and stores the column address in response to the verification result of the pass/fail check circuit. The control logic circuit also compares a number of the fail data bits with a reference value and controls generation of the column address according to the comparison result.
Abstract:
Disclosed is a NAND flash memory device comprising a memory cell array connected to a page buffer via a plurality of bitlines. The page buffer stores input data to be programmed in the memory cell array. The memory cell array is programmed by establishing bitline voltages for the plurality of bitlines according to the input data and then applying a wordline voltage to the memory cell array. The bitline voltages are established by first precharging the bitlines to a power supply voltage and then selectively discharging the bitlines according to the input data. The bitlines are discharged sequentially, i.e., some of the bitlines are discharged before others.