公开(公告)号：US20010015772A1

公开(公告)日：2001-08-23

申请号：US09732196

申请日：2000-12-07

Applicant: U.S. PHILIPS CORPORATION

Inventor： Andrew T. Yule

IPC: H04N005/44

CPC classification number: H04N5/44 ,  H04B1/3805 ,  H04N21/42202 ,  H04N21/4627 ,  H04N21/6112

Abstract: TV receiver apparatus (1) and a related method are disclosed, the TV receiver apparatus comprising a video signal receiver (2) for receiving video signals transmitted from an external video signal transmitter, a GPS signal receiver (3) for receiving GPS signals transmitted from an external GPS signal transmitter and signal coupling means (4) connected to both receivers. The signal coupling means is adapted to provide both receivers with respective video and GPS signals via a common antenna (5) where the antenna is adapted to receive terrestrially broadcasted video signals.

Abstract translation: TV接收机装置（1）和相关方法被公开，TV接收机装置包括用于接收从外部视频信号发射机发送的视频信号的视频信号接收机（2），用于接收从 连接到两个接收器的外部GPS信号发射器和信号耦合装置（4）。 信号耦合装置适于经由公共天线（5）为相应视频和GPS信号提供两个接收机，其中天线适于接收地面广播的视频信号。

公开(公告)号：US20010015653A1

公开(公告)日：2001-08-23

申请号：US09790419

申请日：2001-02-22

Applicant: U.S. PHILIPS CORPORATION.

Inventor： Franciscus Gerardus Maria De Jong ,  Rodger Frank Schuttert ,  Johannes De Wilde ,  Gerrit Willem Den Besten ,  Bernardus Martinus Johannes Kup ,  Albertus Jan Paulus Maria Van Uden

IPC: G01R031/02

CPC classification number: G01R31/2853

Abstract: Integrated circuit with a test interface for testing a conductive connection between a supply pad and a supply of a functional block in the integrated circuit. A current test circuit has test inputs coupled to a first and a second point along the conductive connection, for comparing a voltage across the test inputs with a threshold. The current test circuit contains a threshold shifting circuit for shifting the threshold to a shifted value dependent on a voltage across the test inputs when the threshold shifting circuit is active. Testing is executed in two steps, making the threshold shifting circuit active when a first voltage is applied across test inputs and comparing a second voltage at the test input with the shifted threshold. One of the first and second voltage is a voltage drop across the connection when the integrated circuit is set to draw current along said connection, the other one of the first and second voltage is a reference voltage. In an embodiment the integrated circuit has a shunt circuit to provoke current through the conductive connection under test in parallel with current through the functional block.

Abstract translation: 具有测试接口的集成电路，用于测试集成电路中电源焊盘与功能块电源之间的导电连接。 当前测试电路具有耦合到沿着导电连接的第一和第二点的测试输入，用于将测试输入与阈值进行比较。 当阈值移位电路有效时，当前的测试电路包含一个阈值移位电路，用于将阈值移位到取决于测试输入端的电压的移位值。 在两个步骤中执行测试，使得当跨测试输入施加第一电压并且将测试输入处的第二电压与移位的阈值进行比较时，阈值移位电路有效。 第一和第二电压中的一个是当集成电路被设置为沿着所述连接抽取电流时连接上的电压降，第一和第二电压中的另一个是参考电压。 在一个实施例中，集成电路具有分流电路，以使与通过功能块的电流并联的待测导电连接的电流。

公开(公告)号：US20010015475A1

公开(公告)日：2001-08-23

申请号：US09782662

申请日：2001-02-13

Applicant: U.S. PHILIPS CORPORATION.

Inventor： David Sharples

IPC: H01L027/06 ,  H01L029/76 ,  H01L027/102

CPC classification number: H01L27/0761 ,  H01L24/32 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/00

Abstract: A semiconductor device comprises a semiconductor body (10) in and on which a power transistor (T; 1, 2, 3) and a suppression diode (D; 100) are integrated. A diode junction (40; 40null) is present between the back metallisation (22) and the adjacent region (2) of the power transistor so as to provide the diode in series with this region (2) and adjacent to the back surface (12) of the body. This diode junction (40; 40null) opposes the p-n junction (42) between the collector or drain region (2) of the transistor and its base region (3), so as to suppress reverse current flow in the transistor. The higher doped part (2b) of the adjacent transistor region (2) is sufficiently thick as to prevent any minority charge carriers injected by the diode junction (40; 40null) from reaching the p-n junction (42) with the base region (3). The diode junction may be a p-n junction (40) or a Schottky barrier (40null). This transistor-diode configuration also permits an anti-parallel diode (D3) to be mounted side-by-side with the power transistor in the same device package (50-53).

Abstract translation: 半导体器件包括其上集成有功率晶体管（T; 1,2,3）和抑制二极管（D; 100）的半导体本体（10）。 在功率晶体管的后金属化（22）和相邻区域（2）之间存在二极管结（40; 40'），以便提供二极管与该区域（2）串联并且邻近背表面 12）身体。 该二极管结（40; 40'）与晶体管的集电极或漏极区（2）与其基极区（3）之间的p-n结（42）相对，从而抑制晶体管中的反向电流流动。 相邻晶体管区域（2）的较高掺杂部分（2b）足够厚，以防止由二极管结（40; 40'）注入的任何少数电荷载体与基极区域（3）到达pn结（42） ）。 二极管结可以是p-n结（40）或肖特基势垒（40'）。 该晶体管二极管配置还允许反并联二极管（D3）与功率晶体管并排安装在同一器件封装（50-53）中。

公开(公告)号：US20010015462A1

公开(公告)日：2001-08-23

申请号：US09734771

申请日：2000-12-12

Applicant: U.S. Philips Corporation

Inventor： Martin J. Powell

IPC: H01L021/00 ,  H01L021/84 ,  H01L027/01 ,  H01L027/12

CPC classification number: H01L29/66757 ,  H01L21/28158 ,  H01L29/4908 ,  H01L29/66765

Abstract: A method of manufacturing a thin film transistor (TFT) is disclosed comprising source and drain electrodes joined by a semiconductor channel layer, a gate insulating layer formed from at least two sublayers and a gate electrode. The method comprising the steps of forming the gate insulating layer by depositing a thin film sublayer using a thin film technique; and depositing a printed sublayer by printing, wherein the thin film sublayer is located adjacent the semiconductor channel layer. The TFT may be a top gate TFT wherein the thin film sublayer is formed on the semiconductor channel layer, and wherein the printed sublayer is formed over the thin film sublayer. Alternatively, the TFT may be a bottom gate TFT wherein the printed sublayer is formed over the gate electrode; wherein the thin film sublayer is formed over the printed sublayer, and wherein the semiconductor channel layer is formed on the thin film sublayer.

Abstract translation: 公开了一种制造薄膜晶体管（TFT）的方法，其包括由半导体沟道层连接的源电极和漏电极，由至少两个子层和栅电极形成的栅极绝缘层。 该方法包括以下步骤：通过使用薄膜技术沉积薄膜子层来形成栅极绝缘层; 以及通过印刷沉积印刷的子层，其中所述薄膜子层位于所述半导体沟道层附近。 TFT可以是顶栅TFT，其中薄膜子层形成在半导体沟道层上，并且其中印刷的子层形成在薄膜子层上。 或者，TFT可以是底栅TFT，其中印刷的子层形成在栅电极上; 其中所述薄膜子层形成在所述印刷的子层上，并且其中所述半导体沟道层形成在所述薄膜子层上。

公开(公告)号：US20010013913A1

公开(公告)日：2001-08-16

申请号：US09406647

申请日：1999-09-27

Applicant: U.S. PHILIPS CORPORATION

Inventor： NIGEL D. YOUNG

IPC: G02F001/133

CPC classification number: G02F1/136227 ,  G02F1/133345 ,  G02F1/133504 ,  G02F1/133553 ,  G02F1/1368

Abstract: In a reflective liquid crystal display device comprising on a substrate (12) an array of reflective pixel electrodes (45) which are each connected to the output of a respective switching device (18), e.g. a TFT, carried on the substrate and which are provided on an insulating layer (40) that extends over the switching device, each pixel electrode (45) is connected to the output (31) of its associated switching device through a plurality of tapered contact openings (47) in the insulating layer (40) which form depressions (50) in the pixel electrode surface for enhancing the pixel's light reflection characteristics. The number, shape, size and relative disposition of such openings can be varied to tailor these characteristics. Preferably, a conductive layer (35) extends from the switching device output (31) beneath the area of the pixel electrode (45) for contacting the electrode at each opening and may have a rough surface resulting in asperities at the pixel electrode surface which further enhance its reflection properties.

Abstract translation: 在反射型液晶显示装置中，包括在基板（12）上的反射像素电极阵列（45），每个反射像素电极各自连接到相应的开关装置（18）的输出端。 TFT，承载在基板上，并且设置在延伸在开关装置上的绝缘层（40）上，每个像素电极（45）通过多个锥形接触件连接到其相关开关装置的输出端（31） 在像素电极表面中形成凹陷（50）的绝缘层（40）中的开口（47），用于增强像素的光反射特性。 可以改变这种开口的数量，形状，尺寸和相对布置以适应这些特征。 优选地，导电层（35）从像素电极（45）的区域下方的开关器件输出（31）延伸，用于在每个开口处接触电极，并且可能具有粗糙表面，从而在像素电极表面处形成更大的凹凸 增强其反射性能。

公开(公告)号：US20010013231A1

公开(公告)日：2001-08-16

申请号：US09757877

申请日：2001-01-10

Applicant: U.S. Philips Corporation

Inventor： Wilhelmus N.M. Selten ,  Martinus P.W. Van Roosmalen ,  Hermanus N. Tuin

IPC: C03B040/04 ,  C03B011/10

CPC classification number: C03B11/06

Abstract: A method and device for the manufacture of a hollow cone (37) with a cone tip (31) whereby a parison of viscous material (35) is molded into the shape of the hollow cone. An escape space (11) becomes accessible to the material in the vicinity of a cone tip to be formed. The moment the pressure present in the material in the vicinity of the cone tip to be formed exceeds a previously defined value. Breaking-off of the cone tip during or after molding is prevented by this. The hollow cone is suitable inter alia for use in a cathode ray tube.

Abstract translation: 一种用于制造具有锥形尖端（31）的空心锥体（37）的方法和装置，由此将粘性材料（35）的型坯模制成中空锥体的形状。 逃逸空间（11）可以在要形成的锥形尖端附近的材料上进入。 存在于要形成的锥尖附近的材料中的压力超过预先定义的值。 通过这种方式防止在模制期间或之后锥形尖端的断裂。 中空圆锥体尤其适用于阴极射线管。

公开(公告)号：US20010012195A1

公开(公告)日：2001-08-09

申请号：US09259956

申请日：1999-03-01

Applicant: U.S. PHILIPS CORPORATION

Inventor： LOIC LEFORT

IPC: H05K005/02 ,  H04B001/03 ,  H05K005/00

CPC classification number: H04M1/23 ,  G06F1/1616 ,  G06F1/1626 ,  G06F1/1662 ,  G06F1/1666 ,  G06F1/1671 ,  G06F1/1679 ,  G06F1/1683 ,  H04M1/0214 ,  H04M1/0245 ,  H04M2250/18 ,  H04M2250/22

Abstract: A main side of the device (10) has a keyboard with keys (4A, 5A, 4C) and a display (6). According to the invention, part of the keyboard (4) can be moved between two operational positions for which the device retains the same size: a first position called reduced keyboard (and large display) (FIGS. 1C, 1D) and a second position with an extended keyboard (and a small display) (FIGS. 1A, 1B). The keys that are accessible for one position are inaccessible for another position and vice versa.

Abstract translation: 设备（10）的主要侧面具有键盘（4A，5A，4C）和显示器（6）。 根据本发明，键盘（4）的一部分可以在设备保持相同尺寸的两个操作位置之间移动：称为简化键盘（和大显示器）（图1C，1D）的第一位置和第二位置 具有扩展键盘（和小显示器）（图1A，1B）。 一个位置可访问的键不可访问另一个位置，反之亦然。

公开(公告)号：US20010011860A1

公开(公告)日：2001-08-09

申请号：US09291555

申请日：1999-04-14

Applicant: U.S. PHILIPS CORPORATION

Inventor： NORBERT DETTMANN ,  GERHARD DIEFENBACH ,  FRANZ-JOSEF KUPPERS ,  CHRISTIAN REICHINGER

IPC: H01L041/04

CPC classification number: H02N2/0055 ,  H01L41/0913 ,  H02N2/103

Abstract: The invention relates to a motor having a cuboid piezoelectric element (1) which carries an actuating member (2) for transmitting a force in an actuating direction (x). In known motors the piezoelectric element (1) is restrained by four restraining elements which are disposed in the plane of vibration (x/y plane) and which exert a preloading force on the piezoelectric element (1) in a direction perpendicular to the actuating direction (x). However, this gives rise to a frictional force between the restraining elements and the piezoelectric element, which reduces the vibration quality and, as a consequence, the motor power. This is avoided by means of the invention, where the piezoelectric element (1) is restrained by means of restraining elements (20, 21, 22, 23) without preloading, i.e. with maximal slidability in the directions (y, z) perpendicular to the actuating direction (x). Preferably, such a motor is used in drive apparatuses, particularly for driving the read/write unit on a pivotable arm or on a translatable slide.

Abstract translation: 本发明涉及一种具有立方体压电元件（1）的电动机，其承载用于在致动方向（x）上传递力的致动构件（2）。 在已知的电动机中，压电元件（1）被设置在振动平面（x / y平面）中的四个限制元件约束，并且在垂直于致动方向的方向上在压电元件（1）上施加预加载力 （X）。 然而，这导致约束元件和压电元件之间的摩擦力，这降低了振动质量，结果是电动机功率。 这是通过本发明避免的，其中压电元件（1）通过约束元件（20,21,22,23）被约束而不预加载，即在垂直于该方向的方向（y，z）上具有最大滑动性 致动方向（x）。 优选地，这样的电动机用于驱动装置中，特别是用于在可枢转臂或可平移滑动件上驱动读/写单元。

公开(公告)号：US20010011723A1

公开(公告)日：2001-08-09

申请号：US09832724

申请日：2001-04-11

Applicant: U.S. PHILIPS CORPORATION

Inventor： Adam R. Brown ,  Godefridus A.M. Hurkx ,  Wiebe B. De Boer ,  Jan W. Slotboom

IPC: H01L029/16 ,  H01L021/20

CPC classification number: H01L29/885 ,  Y10S438/979

Abstract: A semiconductor device with a tunnel diode (23) is particularly suitable for various applications. Such a device comprises two mutually adjoining semiconductor regions (2, 3) of opposed conductivity types and having doping concentrations which are so high that breakdown between them leads to conduction by means of tunnelling. A disadvantage of the known device is that the current-voltage characteristic is not yet steep enough for some applications. In a device according to the invention, the portions (2A, 3A) of the semiconductor regions (2, 3) adjoining the junction (23) comprise a mixed crystal of silicon and germanium. It is surprisingly found that the doping concentration of both phosphorus and boron are substantially increased, given the same amount of dopants being offered as during the formation of the remainder of the regions (2, 3). The tunnelling efficiency is substantially improved as a result of this, and also because of the reduced bandgap of said portions (2A, 3A), and the device according to the invention has a much steeper current-voltage characteristic both in the forward and in the reverse direction. This opens perspectives for inter alia an attractive application where the tunnelling pn junction (23) is used as a transition between two conventional diodes, for example pn or pin diodes, which are used one stacked on the other and which can be formed in a single epitaxial growing process thanks to the invention. The portions (2A, 3A) adjoining the tunnelling junction (22) are preferably 5 to 30 nm thick and comprise between 10 and 50 at % germanium. The doping concentration may be 6null1019 or even more than 1020 at/cm3. The invention further relates to a simple method of manufacturing a device according to the invention. This is preferably done at a temperature of between 550null C. and 800null C.

Abstract translation: 具有隧道二极管（23）的半导体器件特别适用于各种应用。 这种器件包括相对导电类型的两个相互邻接的半导体区域（2,3），并且具有如此之高的掺杂浓度，使得它们之间的击穿导致通过隧道导通。 已知装置的缺点是电流 - 电压特性对于某些应用尚不够陡。 在根据本发明的装置中，与接合部（23）相邻的半导体区域（2,3）的部分（2A，3A）包括硅和锗的混合晶体。 令人惊奇地发现，与形成其余区域（2,3）期间相同量的掺杂剂，磷和硼两者的掺杂浓度显着增加。 因此，由于所述部分（2A，3A）的带隙减小，所以隧道效率显着提高，并且根据本发明的装置在电流 - 电压的正向和反向特性方面具有更陡峭的电流 - 电压特性 相反方向。 这揭示了一个有吸引力的应用，其中隧道pn结（23）用作两个常规二极管（例如pn或pin二极管）之间的过渡的一个有吸引力的应用，它们被一个堆叠在另一个上并且可以形成在单个 外延生长过程由于本发明。 与隧道结（22）相邻的部分（2A，3A）优选为5至30nm厚，并且包含10至50at％的锗。 掺杂浓度可以为6×1019或甚至高于1020 at / cm3。 本发明还涉及一种制造根据本发明的装置的简单方法。 这优选在550℃至800℃的温度下进行。

公开(公告)号：US20010010725A1

公开(公告)日：2001-08-02

申请号：US09769183

申请日：2001-01-25

Applicant: U.S. PHILIPS CORPORATION

Inventor： Ewald Frasl

IPC: H04R025/00 ,  H04R009/06

CPC classification number: H04R7/14

Abstract: In an electroacoustic transducer (1) having a magnet system (7) and having a moving coil (15), which is disposed in the air gap (14) of the magnet system (7), and having a diaphragm (17) attached to the moving coil (15) the diaphragm (17) has a mounting zone (24) for mounting the moving coil (15), the diaphragm (17) having projections (25) in the mounting zone (24) and the diaphragm (17) having an interspace between every two projections (25), two stabilizing walls (32, 33), which are inclined with respect to the diaphragm axis (18), are arranged each interspace and are arranged so as to form a roof shape and are formed so as to project beyond the mounting zone (24) in radial directions.

Abstract translation: 在具有磁体系统（7）并且具有设置在磁体系统（7）的气隙（14）中的运动线圈（15）的电声换能器（1）中，并且具有附接到 动圈（15），隔膜（17）具有用于安装动圈（15）的安装区（24），在安装区（24）和隔膜（17）中具有突起（25）的隔膜（17） 在每两个突起（25）之间具有间隙，相对于隔膜轴线（18）倾斜的两个稳定壁（32,33）布置成每个间隙，并且被布置成形成屋顶形状并形成 以便在径向方向上突出超过安装区域（24）。