Abstract:
A chip package comprises a semiconductor chip, a plurality of pins coupled to the semiconductor chip, and a conductive structure configured to form an electrical connection between the pins, wherein the electrical connection is configured to be disabled as the chip package is inserted into a socket. Since the pins are electrically connected by the conductive structure, the surge current caused by an ESD event can be distributed to all pins rather than to a single pin as the ESD event occurs. Consequently, all ESD protection circuits connected to the pins can be used to dissipate the surge current during the ESD event, and the circuit damage caused by the ESD can be dramatically reduced.
Abstract:
A time counting assembly with a display for world time zones includes a power source, a second counter, a minute counter, an hour counter, and a time zone display for displaying a correct time over a faceplate. Stirring the time zone adjustable ring with the hand ultimately turns a hour hand to the time in accordance with the time zone corresponding to a second landmark.
Abstract:
A method of cleaning a wafer after an etching process is provided. A substrate having an etching stop layer, a dielectric layer, a patterned metal hard mask sequentially formed thereon is provided. Using the patterned metal hard mask, an opening is defined in the dielectric layer. The opening exposes a portion of the etching stop layer. A dry etching process is performed in the environment of helium to remove the etching stop layer exposed by the opening. A dry cleaning process is performed on the wafer surface using a mixture of nitrogen and hydrogen as the reactive gases. A wet cleaning process is performed on the wafer surface using a cleaning solution containing a trace amount of hydrofluoric acid.
Abstract:
A fiber side-coupling apparatus can be spliced with active fiber as a fiber-based side-coupler in series at both sides for distributively-pumped monolithic fiber lasers. This side-coupling apparatus includes a large-mode-area double-clad passive optical fiber. A cladding grating, formed on the cladding surface of the passive fiber, comprises a plurality of grating members and a reflection layer formed thereon. A laser diode bar array is disposed on one side of the optical fiber opposite the cladding grating. A collimation device, placed between the optical fiber and the laser diode bar array, is used to collect the pump beam to the cladding grating as much as possible in fast axis and collimate the pump beam to be incident to the cladding grating in slow axis as normally as possible. The collimated pump beams emitted from a laser diode bar array are normally incident to the cladding grating within the alignment tolerance of ±2 to ±4 degrees. Without the reentrance loss effect, the pump beams diffracted and reflected by the cladding grating propagates in the inner cladding of the passive fiber due to total internal reflection. In one embodiment, the grating member can be a binary or blazed cross section.
Abstract:
The present invention is related to a light-emitting keyboard, comprising: a light guide having a light entrance surface, a bottom surface and a light exit surface; a light source provided adjacent to the light entrance surface of the light guide; a first reflector disposed underneath the bottom surface of the light guide to reflect the light originated from the light source to enter into said light guide; a second reflector disposed on top of said light exit surface of the light guide; a membrane circuit board disposed on top of said second reflector, said membrane circuit board being provided with an elastic member; a supporting plate disposed on top of the membrane circuit board; a scissor assembly engaged with said supporting plate and provided thereon; and a keycap supported by said scissor assembly.
Abstract:
A LED lamp includes a main body surrounded by a fin assembly on the periphery at an upper side and a lower side, a power supply holder located at the upper side and a plurality of LED lamp assemblies located at the lower side. The LED lamp assemblies are encased by a light converging plate which is further encased by a transparent lamp shade fastening to the lower side of the main body. The LED lamp thus formed may be fastened to a ceiling for indoor use through an upper cap of a fastening assembly, or an outdoor electric wire pole through a fastening tray. Each of the LED lamp assemblies has a heat transfer tube to transfer the generated heat to the main body for dispersing through the fin assembly. Thus desired heat dissipation can be accomplished.
Abstract:
An error detection method for a computer system includes the steps of: enabling an error-detecting computer to communicate with a keyboard controller of a computer-under-test through a communication interface; enabling the error-detecting computer to issue an error detection command to the keyboard controller that causes the keyboard controller to issue a request command to the basic input/output system (BIOS) of the computer-under-test; enabling the BIOS, in response to the request command, to access the keyboard controller and determine hardware status information that is being requested from the error detection command, and subsequently, to obtain the hardware status information of the computer-under-test, and to transmit the hardware status information to the keyboard controller; and enabling the keyboard controller to transmit the hardware status information received thereby to the error-detecting computer through the communication interface.
Abstract:
A semiconductor structure includes a semiconductor substrate; a first high-voltage well (HVW) region of a first conductivity type overlying the semiconductor substrate; a second HVW region of a second conductivity type opposite the first conductivity type overlying the substrate and laterally adjoining the first HVW region; a gate dielectric extending from over the first HVW region to over the second HVW region; a gate electrode on the gate dielectric; a drain region in the second HVW region; a source region at an opposite side of the gate dielectric than the drain region; and a deep well region of the first conductivity type underlying the second HVW region. Substantially no deep well region is formed directly underlying the drain region.
Abstract:
An exemplary embodiment of a semiconductor device capable of high-voltage operation includes a substrate with a well region therein. A gate stack with a first side and a second side opposite thereto, overlies the well region. Within the well region, a doped body region includes a channel region extending under a portion of the gate stack and a drift region is adjacent to the channel region. A drain region is within the drift region and spaced apart by a distance from the first side thereof and a source region is within the doped body region near the second side thereof. There is no P-N junction between the doped body region and the well region.
Abstract:
A data processing method is disclosed. A first stream data including a first part and a second part is received. The second part is processed according to the first part of the first stream data. The processed first stream data is transformed into a second stream data.