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公开(公告)号：US20250061834A1
公开(公告)日：2025-02-20
申请号：US18409012
申请日：2024-01-10
Applicant: Shanghai AVIC OPTO Electronics Co., Ltd.
Inventor： Huijun JIN , Linzhi WANG , Haotian LU
IPC: G09G3/20
Abstract: Display panel, driving method thereof and display device are provided. The display panel includes a display area and a non-display area. The display area includes a plurality of pixel units and a plurality of gate lines electrically connected to the plurality of pixel units. The non-display area includes a boost circuit including a plurality of boost units. A boost unit of the plurality of the boost units includes a charging module, a bootstrap module, and an initialization module that are electrically connected. The bootstrap module at least includes a first module and a first capacitor.
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公开(公告)号：US12057324B2
公开(公告)日：2024-08-06
申请号：US18090918
申请日：2022-12-29
Inventor： Xuhui Peng , Kerui Xi , Tingting Cui , Feng Qin , Jie Zhang
IPC: H01L21/48 , H01L21/56 , H01L23/00 , H01L23/498
CPC classification number: H01L21/4853 , H01L21/486 , H01L21/4896 , H01L21/561 , H01L23/49816 , H01L23/49822 , H01L24/81 , H01L24/96 , H01L24/97 , H01L2924/37001
Abstract: A semiconductor package includes a semiconductor element, a wiring structure, an encapsulation structure, and a solder ball. The semiconductor element includes a plurality of pins. A side of the wiring structure is electrically connected to the plurality of pins of the semiconductor element. The wiring structure includes at least two first wiring layers. A first insulating layer is disposed between adjacent two first wiring layers of the at least two first wiring layers. The first insulating layer includes a plurality of first through-holes. The adjacent two first wiring layers are electrically connected to each other through the plurality of first through-holes. The encapsulation structure at least partially surrounds the semiconductor element. The solder ball is located on a side of the wiring structure away from the semiconductor element. The solder ball is electrically connected to the at least two first wiring layers.
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公开(公告)号：US11901324B2
公开(公告)日：2024-02-13
申请号：US17451621
申请日：2021-10-20
Applicant: Shanghai AVIC OPTO Electronics Co., Ltd.
Inventor： Kerui Xi , Feng Qin , Jine Liu , Xiaohe Li , Tingting Cui
CPC classification number: H01L24/20 , H01L23/3135 , H01L24/13 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/13023 , H01L2224/2101
Abstract: Chip package structure is provided. The chip package structure includes: a chip, the chip including metal pins; an organic polymer material layer, the organic polymer material layer being located on a side of the metal pins away from the chip, the organic polymer material layer including a first via hole, and the organic polymer material layer including a first surface away from the chip; metal parts, at least a portion of the metal parts being located in the first via hole, the metal parts and metal pins being electrically connected, the metal parts including a second surface away from the chip, and the second surface and the first surface being flush to each other; and an encapsulating layer, the encapsulating layer being located on a side of the metal parts away from the organic polymer material layer.
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公开(公告)号：US11899055B2
公开(公告)日：2024-02-13
申请号：US17656427
申请日：2022-03-25
Applicant: Shanghai AVIC OPTO Electronics Co., Ltd.
Inventor： Pengfei Qiu , Lihua Wang , Yimiao Ding , Tingting Li , Shumian Xu , Yang Nan
CPC classification number: G01R31/2815 , G01R31/2818 , G09G3/006 , H05K1/18 , H05K2201/10128
Abstract: A circuit board and a method for electrical performance detection thereof, a display panel, a method for fabricating a display panel, and a method for driving the display panel are provided. In the electrical performance detection, the signal output terminal is electrically connected to the detection terminal, and detection is performed on the drive signal by the electrical performance detection circuit to determine whether the circuit board is abnormal, achieving the electrical performance detection of the circuit board. In addition, in a process other than the electrical performance detection, the signal output terminal is disconnected from the detection terminal to avoid affecting a normal operation of the circuit board. The electrical performance detection of the circuit board is realized, a defective circuit board is prevented from flowing into a subsequent fabricating procedure, and waste of assembling resources is avoided.
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公开(公告)号：US11826755B2
公开(公告)日：2023-11-28
申请号：US17363792
申请日：2021-06-30
Applicant: Shanghai AVIC OPTO Electronics Co., Ltd.
Inventor： Kerui Xi , Feng Qin , Xiangjian Kong , Jiubin Zhou , Guicai Wang , Yajie Wang , Tingting Cui
CPC classification number: B01L3/502715 , B01L3/50273 , G01N27/228 , G09G3/348 , H01L27/124 , H01L27/1255 , H03K17/687 , H05B45/30 , B01L2400/0427 , G09G2300/0426
Abstract: A panel includes a substrate, an array layer and an electrode array layer. The array layer is on a side of the substrate; the electrode array layer is on a side of the array layer away from the substrate; and the array layer includes an active layer, a gate metal layer and a source/drain metal layer. The substrate includes drive units arranged in an array, scan line groups, data lines extending in a second direction; and common signal lines extending in the second direction. The scan line group includes first scan lines and second scan lines, extending in a first direction. The first direction is perpendicular with the second direction. The electrode array layer includes drive electrodes arranged in an array; the drive electrodes correspond to the drive units; and the drive unit includes a first transistor, a second transistor, a third transistor, a first capacitor and a second capacitor.
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Patent Agency Ranking
公开(公告)号：US11824262B2
公开(公告)日：2023-11-21
申请号：US17361356
申请日：2021-06-29
Inventor： Kerui Xi , Xuhui Peng , Feng Qin , Tingting Cui , Baiquan Lin
CPC classification number: H01Q1/005 , H01Q5/371 , H01Q21/065
Abstract: Provided are an antenna, a phase shifter, and a communication device. The antenna includes a first metal electrode, a second metal electrode, and a photo-sensitive layer. The first metal electrode and the second metal electrode are respectively located on two opposite sides of the photo-sensitive layer. The first metal electrode includes multiple transmission electrodes. The multiple transmission electrodes are configured to transmit electrical signals. The photo-sensitive layer includes at least one photo-sensitive unit and the at least one photo-sensitive unit overlaps the transmission electrodes. The antenna provides more possibilities for large-scale commercialization.
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公开(公告)号：US11705643B2
公开(公告)日：2023-07-18
申请号：US17530425
申请日：2021-11-18
Inventor： Kerui Xi , Xuhui Peng , Feng Qin , Tingting Cui , Zhenyu Jia
CPC classification number: H01Q21/065 , H01Q1/38 , H01Q1/422 , H01Q3/36
Abstract: Disclosed antenna unit includes first substrate and second substrate opposite to each other, phase shifting units and driver circuit. Region facing the first substrate and the second substrate form phase shifting region. In first direction, the first substrate formed with first step region, and used for connecting radio-frequency signal terminal; in second direction, the second substrate formed with second step region, and included angle between the first direction and the second direction greater than or equal to 0° and smaller than 180°. At least part of the first step region does not overlap at least part of the second step region. Phase shifting units used for radiating radio-frequency signal and distributed in phase shifting region, each phase shifting unit. At least part of the driver circuit disposed in the second step region and the driver circuit electrically connected to each phase shifting unit to adjust radio-frequency signal.
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公开(公告)号：US11660597B2
公开(公告)日：2023-05-30
申请号：US17231842
申请日：2021-04-15
Applicant: Shanghai AVIC OPTO Electronics Co., Ltd.
Inventor： Baiquan Lin , Kerui Xi , Zhenyu Jia , Junting Ouyang , Feng Qin , Xuhui Peng
CPC classification number: B01L3/502715 , G01N21/01 , G01N21/59 , H10K65/00 , B01L2300/0663
Abstract: A microfluidic device includes: first substrate, microfluidic channel layer, and second substrate; the first substrate includes light source layer including a plurality of light source structures, the light source structure includes first electrode, second electrode, and an electroluminescence module, and when being turned on, emits light passing through the microfluidic channel layer and irradiating the second substrate; the second substrate includes photoelectric detection layer including a plurality of photoelectric detection structures and driving electrode layer including a plurality of driving electrodes and a plurality of driving circuits, the photoelectric detection structure includes third electrode, fourth electrode, and photoelectric conversion module arranged therebetween, and when being turned on, generates an electrical signal according to an incident light signal; the driving circuit is configured to apply a voltage to each driving electrode such that a droplet moves in a microfluidic channel of the microfluidic channel layer.
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公开(公告)号：US20220293544A1
公开(公告)日：2022-09-15
申请号：US17829619
申请日：2022-06-01
Inventor： Feng QIN , Kerui XI , Tingting CUI , Jie ZHANG , Xuhui PENG
Abstract: Provided are a semiconductor package and a method for fabricating the semiconductor package. The method includes the followings steps: a first workpiece is provided, where the first workpiece includes a first substrate and multiple first rewiring structures arranged on the first substrate at intervals, and each first rewiring structure includes at least two first rewiring layers; an encapsulation layer is formed on the first rewiring structures, where the encapsulation layer is provided with multiple first through holes, and the first through holes expose one first rewiring layer; at least two second rewiring layers are disposed on a side of the encapsulation layer facing away from the first rewiring layer; multiple semiconductor elements are provided, where the semiconductor elements are arranged on a side of the first rewiring structures facing away from the encapsulation layer, where the first rewiring layers are electrically connected to pins of the semiconductor elements.
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140.发明授权公开(公告)号：US11380644B2
公开(公告)日：2022-07-05
申请号：US16917155
申请日：2020-06-30
Inventor： Feng Qin , Kerui Xi , Tingting Cui , Jie Zhang , Xuhui Peng
Abstract: Provided are a semiconductor package and a method for fabricating the semiconductor package. The method includes followings steps: a first workpiece is provided, where the first workpiece includes a first substrate and multiple first rewiring structures arranged on the first substrate at intervals, and each first rewiring structure includes at least two first rewiring layers; an encapsulation layer is formed on the first rewiring structures, where the encapsulation layer is provided with multiple first through holes, and the first through holes exposes one first rewiring layer; at least two second rewiring layers are disposed on a side of the encapsulation layer facing away from the first rewiring layer; multiple semiconductor elements are provided, where the semiconductor elements are arranged on a side of the first rewiring structures facing away from the encapsulation layer, where the first rewiring layers are electrically connected to pins of the semiconductor elements.
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