Abstract:
Methods and devices useful in discharging an aberrant charge on the VCOM of an electronic display and harvesting energy from the VCOM of the electronic display are provided. By way of example, a method may include supplying an activation signal to an active switching device of an electronic display. The active switching device is configured to discharge an aberrant charge on a common electrode of the electronic display. The method further includes discharging the aberrant charge by way of the active switching device. Discharging the aberrant charge comprises preventing a possible occurrence of image artifacts from becoming apparent on the electronic display.
Abstract:
A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.
Abstract:
A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.
Abstract:
A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.
Abstract:
An organic light-emitting diode display may contain an array of display pixels. Each display pixel may have a respective organic light-emitting diode that is controlled by a drive transistor. At low temperatures, it may be necessary to increase the amount of current through an organic light-emitting diode to achieve a desired luminance level. In order to increase the current through the light-emitting diode, the ground voltage level may be lowered. However, this may lead to thin-film transistors within the pixel leaking, which may result in undesirable display artifacts such as bright dots being displayed in a dark image. In order to prevent leakage in the transistors, the transistors may be coupled to separate reference voltage supplies or separate control lines. Additionally, the transistors may be positioned to minimize leakage even at low ground voltage levels.
Abstract:
An organic light-emitting diode display may contain an array of display pixels. Each display pixel may have a respective organic light-emitting diode that is controlled by a drive transistor. At low temperatures, it may be necessary to increase the amount of current through an organic light-emitting diode to achieve a desired luminance level. In order to increase the current through the light-emitting diode, the ground voltage level may be lowered. However, this may lead to thin-film transistors within the pixel leaking, which may result in undesirable display artifacts such as bright dots being displayed in a dark image. In order to prevent leakage in the transistors, the transistors may be coupled to separate reference voltage supplies or separate control lines. Additionally, the transistors may be positioned to minimize leakage even at low ground voltage levels.
Abstract:
A display may have an array of pixels controlled by display driver circuitry. The pixels may have pixel circuits. In liquid crystal display configurations, each pixel circuit may have an electrode that applies electric fields to an associated portion of a liquid crystal layer. In organic light-emitting diode displays, each pixel circuit may have a drive transistor that applies current to an organic light-emitting diode in the pixel circuit. The pixel circuits and display driver circuitry may have thin-film transistor circuitry that includes transistor such as silicon transistors and semiconducting-oxide transistors. Semiconducting-oxide transistors and silicon transistors may be formed on a common substrate. Semiconducting-oxide transistors may have polysilicon layers with doped regions that serve as gates. Semiconducting-oxide channel regions overlap the gates. Transparent conductive oxide and metal may be used to form source-drain terminals that are coupled to opposing edges of the semiconducting oxide channel regions.
Abstract:
A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack. The TFT stack includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes removing the first photoresist layer, and depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area. The method further includes doping the second portion of the doped semiconductor layer with a third doping dose, the first dose being higher than the second dose and the third dose.
Abstract:
A touch screen display may include gate line driver circuitry coupled to a display pixel array. The display may be provided with intra-frame pausing (IFP) capabilities, where touch or other operations may be performed during one or more intra-frame blanking intervals. In one suitable arrangement, a gate driver may be operable in a high impedance mode, where the output of the gate driver is left floating during touch or IFP intervals. In another suitable arrangement, the gate driver may be operable in an IFP reduced stress mode, where a digital pass gate in the gate driver is deactivated during IFP intervals. In yet another suitable arrangement, the gate driver may be operable in an all-gate-high (AGH) power-down mode, where the output of each gate driver in the driver circuitry is driven high in parallel when the displayed is being powered off. These arrangements may be implemented in any suitable combination.
Abstract:
A touch screen display may include gate line driver circuitry coupled to a display pixel array. The display may be provided with intra-frame pausing (IFP) capabilities, where touch or other operations may be performed during one or more intra-frame blanking intervals. In one suitable arrangement, a gate driver circuit may include multiple gate line driver segments each of which is activated by a separate gate start pulse is that received through a demultiplexing circuit. In another suitable embodiment, the gate driver circuit may include analog or digital gate driver units that include control circuits for selectively (dis)charging internal nodes in the gate driver circuit so as to balance the amount of stress that is experienced by a drive transistor in gate driver units at or near an IFP row and the amount of stress that is experienced by the remaining gate driver units.