公开(公告)号：US07592666B2

公开(公告)日：2009-09-22

申请号：US10850408

申请日：2004-05-21

申请人： Mitsuhiro Noguchi ,  Akira Goda ,  Masayuki Tanaka

发明人： Mitsuhiro Noguchi ,  Akira Goda ,  Masayuki Tanaka

IPC分类号： H01L29/792

CPC分类号： H01L27/11568 ,  G11C16/0466 ,  G11C16/0483 ,  H01L27/115 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/792

摘要： A semiconductor memory having an electrically writable/erasable memory cell includes a first gate insulating layer made from a compound containing silicon and oxygen; a first charge-storage layer being in contact with the first gate insulating layer made from a silicon nitride film, a silicon oxynitride film, or an alumina film; a second insulating layer thicker than the first gate insulting layer; a second charge-storage layer being in contact with the second insulating layer; a third insulating layer thicker than the first gate insulating layer being in contact with the second charge-storage layer; and a control electrode upon the third insulating layer.

摘要翻译： 具有电可写/可擦除存储单元的半导体存储器包括由含硅和氧的化合物制成的第一栅极绝缘层; 与由氮化硅膜，氮氧化硅膜或氧化铝膜构成的第一栅极绝缘层接触的第一电荷存储层; 比第一栅极绝缘层厚的第二绝缘层; 与第二绝缘层接触的第二电荷存储层; 比所述第一栅极绝缘层更厚的与所述第二电荷存储层接触的第三绝缘层; 以及在所述第三绝缘层上的控制电极。

公开(公告)号：US20090080805A1

公开(公告)日：2009-03-26

申请号：US11666605

申请日：2005-10-17

申请人： Masayuki Tanaka ,  Masatoshi Okutomi

发明人： Masayuki Tanaka ,  Masatoshi Okutomi

IPC分类号： G06K9/32

CPC分类号： H04N1/3935 ,  G06T3/4069

摘要： A method is provided for speeding up a super-resolution processing by reducing the number of times for convolution operation that is the number of times for estimation calculation.A fast method of super-resolution processing for speeding up a super-resolution processing that estimates a high-resolution image from multiple low-resolution images with a displacement, which comprising: a first step for performing a registration of said multiple low-resolution images in a high-resolution image space and treating all pixels of said multiple low-resolution images after the registration as pixels sampled at unequal interval within said high-resolution image space; a second step for dividing said high-resolution image space into multiple small areas with a predefined size; and a third step for defining an estimated value at a predefined representative position within said small area as an estimated value of all pixels that exist within said small area for each small area divided in said second step.

摘要翻译： 提供了一种通过减少作为估计计算次数的卷积运算次数来加速超分辨率处理的方法。 一种超分辨率处理的快速方法，用于加速从具有位移的多个低分辨率图像估计高分辨率图像的超分辨率处理，其包括：第一步骤，用于执行所述多个低分辨率图像的登记 在高分辨率图像空间中，并且将所述多个低分辨率图像的所有像素处理为所述高分辨率图像空间中以不等间隔采样的像素; 用于将所述高分辨率图像空间划分成具有预定尺寸的多个小区域的第二步骤; 以及第三步骤，用于在所述小区域内的预定代表性位置处定义估计值，作为在所述第二步骤中划分的每个小区域，存在于所述小区域内的所有像素的估计值。

公开(公告)号：US20080279617A1

公开(公告)日：2008-11-13

申请号：US11547542

申请日：2005-03-31

申请人： Masayuki Tanaka ,  Satoshi Hosogi

发明人： Masayuki Tanaka ,  Satoshi Hosogi

IPC分类号： F16J15/00 ,  C08L83/04

CPC分类号： C08L83/04 ,  C08F220/18 ,  C08F2220/1825 ,  C08F2220/285 ,  C08G77/12 ,  C08L33/04 ,  C08L33/14 ,  C08L83/00 ,  C08L101/02 ,  C08L2205/02 ,  C08L2666/02 ,  C09J133/04 ,  C09J133/14 ,  C09J183/04 ,  C09K3/10 ,  C09K2200/0247 ,  C09K2200/0615 ,  Y10T403/28

摘要： The present invention provides a curable composition comprising (a) a vinyl-based polymer containing, in its molecule, at least one alkenyl group which can be hydrosilylated, and having a number average molecular weight of 500 to 1,000,000, (b) a hydrosilyl group-containing compound and (c) a silicone powder, and a sealing method using the curable composition. According to the invention, there can be provided a curable composition excellent in on-site formability, excellent in heat resistance, chemical resistance and oil resistance, and low in compression set.

摘要翻译： 本发明提供了一种可固化组合物，其包含（a）乙烯基类聚合物，其分子中含有至少一个可被氢化硅烷化并且数均分子量为500〜1,000,000的烯基，（b）氢化甲硅烷基 （c）硅酮粉末和使用该固化性组合物的密封方法。 根据本发明，可提供现场成型性优异，耐热性，耐化学性，耐油性优异，压缩变形性低的固化性组合物。

公开(公告)号：US20080149932A1

公开(公告)日：2008-06-26

申请号：US11946606

申请日：2007-11-28

申请人： Katsuaki Natori ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Masayuki Tanaka ,  Kazuaki Nakajima ,  Yoshio Ozawa ,  Akihito Yamamoto

发明人： Katsuaki Natori ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Masayuki Tanaka ,  Kazuaki Nakajima ,  Yoshio Ozawa ,  Akihito Yamamoto

IPC分类号： H01L27/115

CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115 ,  H01L29/513 ,  H01L29/7881

摘要： A semiconductor device includes a semiconductor substrate, and a memory cell array provided on the semiconductor substrate and including a plurality of memory cells arranged on the semiconductor substrate, each of the plurality of the memory cells including a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a second insulating film provided on the charge storage layer, and a control electrode containing metal or metal silicide provided on the charge storage layer via the second insulating film, wherein a corner of a lower part of the control electrode includes semiconductor and fails to contain the metal or the metal silicide in a channel width direction view of the memory cell.

摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底上并且包括布置在半导体衬底上的多个存储单元的存储单元阵列，多个存储单元中的每一个包括设置在半导体衬底上的第一绝缘膜， 设置在所述第一绝缘膜上的电荷存储层，设置在所述电荷存储层上的第二绝缘膜，以及经由所述第二绝缘膜设置在所述电荷存储层上的含有金属或金属硅化物的控制电极， 的控制电极包括半导体，并且在存储单元的沟道宽度方向视图中不能容纳金属或金属硅化物。

公开(公告)号：US20080102616A1

公开(公告)日：2008-05-01

申请号：US11999958

申请日：2007-12-07

申请人： Yoshitaka Tsunashima ,  Seiji Ihumiya ,  Yasumasa Suizu ,  Yoshio Ozawa ,  Kiyotaka Miyano ,  Masayuki Tanaka

发明人： Yoshitaka Tsunashima ,  Seiji Ihumiya ,  Yasumasa Suizu ,  Yoshio Ozawa ,  Kiyotaka Miyano ,  Masayuki Tanaka

IPC分类号： H01L21/283

CPC分类号： H01L21/82345 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L21/31604 ,  H01L21/823462 ,  H01L21/823475 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/6656

摘要： Claimed and disclosed is a semiconductor device including a transistor having a gate insulating film structure containing nitrogen or fluorine in a compound, such as metal silicate, containing metal, silicon and oxygen, a gate insulating film structure having a laminated structure of an amorphous metal oxide film and metal silicate film, or a gate insulating film structure having a first gate insulating film including an oxide film of a first metal element and a second gate insulating film including a metal silicate film of a second metal element.

摘要翻译： 权利要求和公开的是一种半导体器件，包括具有在包含金属，硅和氧的金属硅酸盐的化合物中含有氮或氟的栅极绝缘膜结构的晶体管，具有非晶态金属氧化物层叠结构的栅极绝缘膜结构 膜和金属硅酸盐膜，或具有包括第一金属元素的氧化物膜的第一栅极绝缘膜和包括第二金属元素的金属硅酸盐膜的第二栅极绝缘膜的栅极绝缘膜结构。

公开(公告)号：US20070267682A1

公开(公告)日：2007-11-22

申请号：US11802114

申请日：2007-05-21

申请人： Masayuki Tanaka ,  Hirokazu Ishida

发明人： Masayuki Tanaka ,  Hirokazu Ishida

IPC分类号： H01L29/788

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： According to an aspect of the invention, there is provided a semiconductor device comprising a semiconductor substrate, a first insulating layer formed on the semiconductor substrate, a first conductive layer formed as a floating gate on the first insulating layer, a second insulating layer formed as an interelectrode insulating film on the first conductive layer, and comprising three layers of a first film mainly including silicon and oxygen, a second film mainly including silicon and nitrogen, and a third film mainly including silicon and oxygen, wherein a silicon and nitrogen composition ratio of the second film is in a state in which the silicon is in excess of a stoichiometric composition, and a second conductive layer formed as a control gate on the second insulating film.

摘要翻译： 根据本发明的一个方面，提供一种半导体器件，包括半导体衬底，形成在半导体衬底上的第一绝缘层，在第一绝缘层上形成为浮栅的第一导电层，形成为第一绝缘层的第二绝缘层 在第一导电层上的电极间绝缘膜，并且包括三层主要包括硅和氧的第一膜，主要包括硅和氮的第二膜和主要包括硅和氧的第三膜，其中硅和氮的组成比 所述第二膜处于所述硅超过化学计量组成的状态，以及在所述第二绝缘膜上形成为控制栅极的第二导电层。

公开(公告)号：US20070251452A1

公开(公告)日：2007-11-01

申请号：US10555813

申请日：2004-05-13

申请人： Masayuki Tanaka ,  Kouzo Kai ,  Seischi Murakami ,  Tetsuya Miyashita

发明人： Masayuki Tanaka ,  Kouzo Kai ,  Seischi Murakami ,  Tetsuya Miyashita

IPC分类号： C23C16/455 ,  H01L21/285

CPC分类号： C23C16/45561 ,  C23C16/4412 ,  H01L21/28556 ,  H01L21/28562

摘要： The present invention relates to a processing apparatus for performing a film-deposition process or the like for an object to be processed (such as a semiconductor wafer) by means of a source gas and a reactive gas. The processing apparatus includes: a processing vessel (22) that contains therein an object to be processed (W); a source gas supply system (50) that selectively supplies a source gas into the processing vessel; a reactive gas supply system (52) that selectively supplies a reactive gas into the processing vessel; and a vacuum evacuating system (36) having vacuum pumps (44, 46), the system exhausting an atmosphere in the processing vessel to form a vacuum. The processing apparatus further includes: a source gas by-pass line (62) that selectively feeds the source gas into the vacuum evacuating system with the source gas bypassing the processing vessel; and a reactive gas by-pass line that selectively feeds the reactive gas to the vacuum evacuating system with the reactive gas bypassing the processing vessel. The source gas by-pass line (62) has a source gas escape prevention valve (X1) that prevents an escape of the source gas from the by-pass line into the vacuum evacuating system when the valve is in the closed condition. The reactive gas by-pass line (66) has a reactive gas escape prevention valve (Y1) that prevents an escape of the reactive gas from the by-pass line into the vacuum evacuating system when the valve is in the closed condition.

摘要翻译： 本发明涉及一种用于通过源气体和反应性气体对被处理物体（例如半导体晶片）进行成膜处理等的处理装置。 处理装置包括：处理容器（22），其中容纳有待处理物体（W）; 源气体供应系统（50），其选择性地将源气体供应到处理容器中; 反应气体供应系统（52），其选择性地将反应性气体供应到处理容器中; 和具有真空泵（44,46）的真空排气系统（36），所述系统排出处理容器中的气氛以形成真空。 所述处理装置还包括：源气体旁通管线（62），其选择性地将所述源气体进料到所述真空抽气系统中，所述源气体绕过所述处理容器; 以及反应气体旁通管线，其选择性地将反应气体输送到真空抽气系统，反应气体绕过处理容器。 源气体旁通管线（62）具有源气体排放防止阀（X 1），其防止当阀处于关闭状态时源气体从旁路管线逸出到真空排气系统中。 反应性气体旁通管线（66）具有防止气体逸出防止阀（Y 1），当阀处于关闭状态时，防止反应气体从旁路管线逸出到真空排气系统中。

公开(公告)号：US20070117169A1

公开(公告)日：2007-05-24

申请号：US11600734

申请日：2006-11-17

申请人： Hiroshi Tamura ,  Masayuki Tanaka ,  Tatsushi Muta

发明人： Hiroshi Tamura ,  Masayuki Tanaka ,  Tatsushi Muta

IPC分类号： G01N33/569 ,  C07H21/04 ,  C12P21/06 ,  C07K16/14

CPC分类号： G01N33/56961 ,  C07K14/43509 ,  G01N33/579 ,  G01N33/582

摘要： A (1→3)-β-D-glucan binding protein, a fluorescence-labeled (1→3)-β-D-glucan binding domain protein, a (1→3)-β-D-glucan measuring agent comprising the same, a method for measuring (1→3)-β-D-glucan using the same, and a (1→3)-β-D-glucan assay kit comprising the same.

摘要翻译： （1-> 3）-β-D-葡聚糖结合蛋白，荧光标记的（1-> 3）-β-D-葡聚糖结合结构域蛋白，（1-> 3）-β-D-葡聚糖测量 包含其的药剂，使用其的β-（1→3）-β-D-葡聚糖的测定方法，以及包含其的（1-> 3）-β-D-葡聚糖测定试剂盒。

公开(公告)号：US20060273320A1

公开(公告)日：2006-12-07

申请号：US11443275

申请日：2006-05-31

申请人： Katsuaki Natori ,  Masayuki Tanaka

发明人： Katsuaki Natori ,  Masayuki Tanaka

IPC分类号： H01L29/76

CPC分类号： H01L29/513 ,  C23C16/40 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02194 ,  H01L21/0228 ,  H01L21/3141 ,  H01L21/31616 ,  H01L27/115 ,  H01L27/11521

摘要： According to an aspect of the invention, there is provided a method of manufacturing a semiconductor device including simultaneously supplying a source gas of an oxide insulating film and H2 to a semiconductor substrate when the oxide insulating film is formed on the semiconductor substrate by a CVD method.

摘要翻译： 根据本发明的一个方面，提供一种制造半导体器件的方法，该半导体器件包括在形成氧化物绝缘膜时同时向半导体衬底提供氧化物绝缘膜和H 2 O 3的源气体 通过CVD法在半导体衬底上。

公开(公告)号：US20050118838A1

公开(公告)日：2005-06-02

申请号：US10633615

申请日：2003-08-05

申请人： Masayuki Tanaka

发明人： Masayuki Tanaka

IPC分类号： H01L21/28 ,  H01L21/318 ,  H01L21/3205 ,  H01L21/336 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8247 ,  H01L23/52 ,  H01L23/522 ,  H01L27/085 ,  H01L27/115 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  H01L23/58 ,  H01L21/44 ,  H01L21/31 ,  H01L21/469

CPC分类号： H01L21/76834 ,  H01L21/3185 ,  H01L21/76801 ,  H01L21/76828 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device comprises a semiconductor substrate, source/drain regions provided in the semiconductor substrate, a gate insulating film provided on a channel region between the source/drain regions, a gate electrode provided on the gate insulating film, a conductive layer of a metal silicide provided on the gate electrode and the source/drain regions, an insulating film containing carbon provided on the semiconductor substrate so as to be in contact with at least the conductive layer, and an interlayer insulating film provided on the semiconductor substrate so as to cover the insulating film containing carbon.

摘要翻译： 半导体器件包括半导体衬底，设置在半导体衬底中的源/漏区，设置在源极/漏极区之间的沟道区上的栅极绝缘膜，设置在栅极绝缘膜上的栅电极，金属的导电层 设置在栅极电极和源极/漏极区域上的硅化物，包含设置在半导体衬底上的至少与导电层接触的碳的绝缘膜和设置在半导体衬底上的层间绝缘膜以覆盖 绝缘膜含有碳。