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    ROTOR STRUCTURE FOR INTERIOR PERMANENT MAGNET ELECTROMOTIVE MACHINE
    141.
    发明申请
    ROTOR STRUCTURE FOR INTERIOR PERMANENT MAGNET ELECTROMOTIVE MACHINE 审中-公开
    内置永磁电机的转子结构

    公开(公告)号：US20090224624A1

    公开(公告)日：2009-09-10

    申请号：US12396822

    申请日：2009-03-03

    Applicant: AJITH KUTTANNAIR KUMAR ,  Ramasamy Anbarasu ,  Anshuman Tripathi ,  Arvind Kumar Tiwari ,  Roy David Schultz ,  Patrick Lee Jansen ,  Rammohan Rao Kalluri ,  Shishir Chandrasekhar Menon

    Inventor： AJITH KUTTANNAIR KUMAR ,  Ramasamy Anbarasu ,  Anshuman Tripathi ,  Arvind Kumar Tiwari ,  Roy David Schultz ,  Patrick Lee Jansen ,  Rammohan Rao Kalluri ,  Shishir Chandrasekhar Menon

    IPC: H02K1/27

    CPC classification number: H02K1/246 ,  H02K1/276

    Abstract: A rotor structure for an interior permanent magnet (IPM) electromotive machine is provided. The rotor structure includes at least one rotor lamination including a first group of slots and a second group of slots arranged to form a magnetic pole. The first group of slots may be arranged to form a magnetic flux along a direct axis of the magnetic pole resulting from the first and second group of slots. At least some of the first group of slots is arranged to receive a respective permanent magnet. The second group of slots is arranged to provide a separation for the magnetic flux from adjacent magnetic poles and lying along a quadrature axis of said magnetic pole. At least some of the second group of slots is arranged without a permanent magnet. The rotor structure further includes a magneto-mechanical barrier arranged to reduce a peak level of mechanical stress occurring by the first and/or the second group of slots and/or impede a flow of magnetic flux through the barrier.

    Abstract translation: 提供了一种用于内部永磁（IPM）电动机的转子结构。 转子结构包括至少一个包括第一组槽的转子叠片和布置成形成磁极的第二组槽。 第一组槽可以被布置成沿着由第一组槽和第二组槽产生的磁极的直接轴线形成磁通量。 第一组槽中的至少一些布置成接收相应的永磁体。 第二组槽被布置成提供用于来自相邻磁极的磁通的分离并且沿着所述磁极的正交轴线。 第二组槽中的至少一些排列无永久磁铁。 转子结构还包括磁 - 机械阻挡层，其设置成减小由第一和/或第二组槽发生的机械应力的峰值水平和/或阻碍通过阻挡层的磁通量。

    Substrate solution for back gate controlled SRAM with coexisting logic devices
    143.
    发明授权
    Substrate solution for back gate controlled SRAM with coexisting logic devices 有权
    用于具有共存逻辑器件的背栅控制SRAM的衬底解决方案

    公开(公告)号：US07417288B2

    公开(公告)日：2008-08-26

    申请号：US11311462

    申请日：2005-12-19

    Applicant: Robert H. Dennard ,  Wilfried E. Haensch ,  Arvind Kumar ,  Robert J. Miller

    Inventor： Robert H. Dennard ,  Wilfried E. Haensch ,  Arvind Kumar ,  Robert J. Miller

    IPC: H01L29/76

    CPC classification number: H01L27/1108

    Abstract: A semiconductor structure that includes at least one logic device region and at least one static random access memory (SRAM) device region wherein each device region includes a double gated field effect transistor (FET) wherein the back gate of each of the FET devices is doped to a specific level so as to improve the performance of the FET devices within the different device regions is provided. In particular, the back gate within the SRAM device region is more heavily doped than the back gate within the logic device region. In order to control short channel effects, the FET device within the logic device region includes a doped channel, while the FET device within the SRAM device region does not. A none uniform lateral doping profile with a low net doping beneath the source/drain regions and a high net doping underneath the channel would provide additional SCE control for the logic device.

    Abstract translation: 一种半导体结构，其包括至少一个逻辑器件区域和至少一个静态随机存取存储器（SRAM）器件区域，其中每个器件区域包括双门控场效应晶体管（FET），其中每个FET器件的背栅极掺杂 提供了特定的水平，以提高不同器件区域内的FET器件的性能。 特别地，SRAM器件区域内的背栅极比逻辑器件区域内的后栅极重掺杂。 为了控制短沟道效应，逻辑器件区域内的FET器件包括掺杂沟道，而SRAM器件区域内的FET器件不是。 在源极/漏极区域之下具有低净掺杂的非均匀横向掺杂分布和在沟道下方的高净掺杂将为逻辑器件提供附加的SCE控制。

    Service creator apparatus, systems, and methods
    145.
    发明授权
    Service creator apparatus, systems, and methods 有权
    服务创建者设备，系统和方法

    公开(公告)号：US07389342B2

    公开(公告)日：2008-06-17

    申请号：US10210199

    申请日：2002-07-31

    Applicant: Murali Sundar ,  Arvind Kumar ,  Alok Prakash

    Inventor： Murali Sundar ,  Arvind Kumar ,  Alok Prakash

    IPC: G06F15/173

    CPC classification number: H04L67/16 ,  H04L29/06 ,  H04L69/329

    Abstract: A service creation apparatus may include an adapter communicatively coupled to a provider module by way of a uniform interface. The adapter may also be coupled to a tool via the tool's native interface. A system may include a processor coupled to a memory including the apparatus. A method for creating a service may include selecting a plurality of features provided by a native interface of a tool, collecting the plurality of features from the native interface to form a service having a uniform interface, and providing the service to a plurality of users using the uniform interface.

    Abstract translation: 服务创建装置可以包括通过统一接口通信地耦合到提供者模块的适配器。 适配器还可以经由工具的本机接口耦合到工具。 系统可以包括耦合到包括该装置的存储器的处理器。 用于创建服务的方法可以包括选择由工具的本机接口提供的多个特征，从本地接口收集多个特征以形成具有统一接口的服务，并且使用 统一界面。

    Method and apparatus for optimizing heat transfer with electronic components
    146.
    发明授权
    Method and apparatus for optimizing heat transfer with electronic components 有权
    用于优化电子部件传热的方法和装置

    公开(公告)号：US07382620B2

    公开(公告)日：2008-06-03

    申请号：US11249911

    申请日：2005-10-13

    Applicant: Vijayeshwar Das Khanna ,  Joseph Kuczynski ,  Arvind Kumar Sinha ,  Sri M. Sri-Jayantha

    Inventor： Vijayeshwar Das Khanna ,  Joseph Kuczynski ,  Arvind Kumar Sinha ,  Sri M. Sri-Jayantha

    IPC: H05K7/20 ,  F28F7/00 ,  H01L23/34

    CPC classification number: H01L23/42 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A heat transfer assembly includes a printed circuit board assembly supporting an electronic component assembly including one or more semiconductor chips. A heat sink assembly is adapted to be placed in thermal engagement with the one or more semiconductor chips. Included is a loading assembly for loading the one or more semiconductor chips toward engagement with the heat sink assembly. An encapsulating mechanism is provided that contains a sufficient amount of a thermally conductive medium to transfer heat between a surface of one or more of the semiconductor chips and the heat sink assembly, wherein the thermally conductive medium fills any gaps or space between the one or more semiconductor chips and the heat sink assembly.

    Abstract translation: 传热组件包括支撑包括一个或多个半导体芯片的电子部件组件的印刷电路板组件。 散热器组件适于与一个或多个半导体芯片热接合。 包括用于将一个或多个半导体芯片加载以与散热器组件接合的装载组件。 提供了一种封装机构，其包含足够量的导热介质以在半导体芯片和散热器组件中的一个或多个的表面之间传递热量，其中导热介质填充一个或多个半导体芯片之间的任何间隙或空间 半导体芯片和散热器组件。

    Integrated circuit package resistance measurement
    147.
    发明授权
    Integrated circuit package resistance measurement 有权
    集成电路封装电阻测量

    公开(公告)号：US07327150B2

    公开(公告)日：2008-02-05

    申请号：US11248775

    申请日：2005-10-11

    Applicant: Arvind Kumar ,  Kambiz Munshi

    Inventor： Arvind Kumar ,  Kambiz Munshi

    IPC: G01R27/08 ,  G01R31/26

    CPC classification number: G01R31/3004 ,  G01R27/00 ,  G01R31/2884 ,  G01R31/2896

    Abstract: For one embodiment, an integrated circuit includes a node to couple one or more components to the integrated circuit to carry current through a package for the integrated circuit. The integrated circuit also includes a monitor to measure a resistance of the package based at least in part on a reference resistance of the package and a resistance of one or more components that are to carry current through the package. For another embodiment, current through one or more components that are to carry current through a package for an integrated circuit is controlled. A resistance of the package is measured based at least in part on a reference resistance of the package and a resistance of one or more components that are to carry current through the package.

    Abstract translation: 对于一个实施例，集成电路包括将一个或多个组件耦合到集成电路以将电流传送通过集成电路的封装的节点。 集成电路还包括至少部分地基于封装的参考电阻和用于承载电流通过封装的一个或多个部件的电阻来测量封装的电阻的监视器。 对于另一实施例，控制通过用于集成电路的用于承载电流通过封装的一个或多个部件的电流。 封装的电阻至少部分地基于封装的参考电阻和用于承载电流通过封装的一个或多个部件的电阻来测量。

    Internet based network topology discovery
    148.
    发明授权
    Internet based network topology discovery 有权
    基于互联网的网络拓扑发现

    公开(公告)号：US07272644B1

    公开(公告)日：2007-09-18

    申请号：US09675622

    申请日：2000-09-29

    Applicant: Arvind Kumar

    Inventor： Arvind Kumar

    IPC: G06F15/173 ,  G06F15/177

    CPC classification number: H04L41/12 ,  H04L41/0266

    Abstract: A method and apparatus for internet based network topology discovery. Extensible Markup Language (XML) based data is used to share the discovery information of devices on a network over Internet transport. XML based search engines are used to search for the discovery information. Discovery information, such as identification, location, or capability data, for example, is stored on the devices of a network in the form of XML documents. Network topology maps may be created based on the information discovered.

    Abstract translation: 一种基于互联网的网络拓扑发现的方法和装置。 基于可扩展标记语言（XML）的数据用于通过互联网传输共享网络上设备的发现信息。 基于XML的搜索引擎用于搜索发现信息。 例如，识别，位置或能力数据的发现信息以XML文档的形式存储在网络的设备上。 可以基于发现的信息创建网络拓扑图。

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