公开(公告)号：US20060054886A1

公开(公告)日：2006-03-16

申请号：US11221026

申请日：2005-09-06

Applicant: Guillermo Bazan ,  Alan Heeger ,  Parameswar Iyer ,  Bin Liu

Inventor： Guillermo Bazan ,  Alan Heeger ,  Parameswar Iyer ,  Bin Liu

IPC: H01L29/08 ,  H01L35/24

CPC classification number: C08G73/0694 ,  C08G61/124 ,  C08G61/126 ,  C08G73/00 ,  C08G73/02 ,  C08G73/08 ,  H01L51/0034 ,  H01L51/0035 ,  H01L51/0036 ,  H01L51/0037 ,  H01L51/0038 ,  H01L51/0039 ,  H01L51/0042 ,  H01L51/0043 ,  H01L51/007 ,  H01L51/0085 ,  H01L51/5048 ,  H01L51/56

Abstract: Methods, compositions and articles of manufacture involving soluble conjugated polymers are provided. The conjugated polymers have a sufficient density of polar substituents to render them soluble in a polar medium, for example water and/or methanol. The conjugated polymers may desirably comprise monomers which alter their conductivity properties. The different solubility properties of these polymers allow their deposition in solution in multilayer formats with other conjugated polymers. Also provided are articles of manufacture comprising multiple layers of conjugated polymers having differing solubility characteristics. Embodiments of the invention are described further herein.

Abstract translation: 提供涉及可溶性共轭聚合物的方法，组合物和制品。 共轭聚合物具有足够的极性取代基密度，使其可溶于极性介质，例如水和/或甲醇。 共轭聚合物可以理想地包含改变其导电性能的单体。 这些聚合物的不同溶解度特性允许它们以多层形式沉积在其它共轭聚合物中。 还提供了包含具有不同溶解度特性的多层共轭聚合物的制品。 本文进一步描述本发明的实施例。

公开(公告)号：US20050076122A1

公开(公告)日：2005-04-07

申请号：US10678976

申请日：2003-10-03

Applicant: Charbel Khawand ,  Jianping Miller ,  Jean Khawand ,  Bin Liu

Inventor： Charbel Khawand ,  Jianping Miller ,  Jean Khawand ,  Bin Liu

IPC: H04L29/08 ,  G06F15/173

CPC classification number: H04L67/14 ,  H04L69/329

Abstract: An IPC protocol/network allows for intelligent targeting of nodes in order to reduce overhead and provide for improved power management. The IPC server keeps track of the IPC network's node activity and using an operational state table (2000) it can determine which node can handle a service request (e.g., MP3 decode). By keeping track of the current operational condition of the nodes within the network, the processors can have better battery life and application latency can be improved. The IPC server will keep track not only of which nodes can handle which services, but it will also know which node can handle the service request given its knowledge of the operational state of each of the nodes.

Abstract translation: IPC协议/网络允许节点的智能目标，以减少开销并提供改进的电源管理。 IPC服务器跟踪IPC网络的节点活动并使用操作状态表（2000），它可以确定哪个节点可以处理服务请求（例如，MP3解码）。 通过跟踪网络中节点的当前操作条件，处理器可以具有更好的电池寿命并且可以提高应用延迟。 IPC服务器不仅将跟踪哪些节点可以处理哪些服务，而且还将知道哪个节点可以处理服务请求，因为它知道每个节点的操作状态。

公开(公告)号：US06778594B1

公开(公告)日：2004-08-17

申请号：US09592016

申请日：2000-06-12

Applicant: Bin Liu

Inventor： Bin Liu

IPC: H04B138

CPC classification number: H04L27/22 ,  H03D3/009

Abstract: A communications receiver architecture characterized by a relatively low intermediate frequency (IF) and a polyphase filter. The receiver includes an input amplifier coupled to a carrier signal. Respective I and Q demodulators are coupled to the output of the input amplifier. A quadrature local oscillator (LO) generator provides respective LO_I and LO_Q inputs to the I demodulator and LO_Q inputs to the I demodulator and to the Q demodulator. The quadrature LO generator is driven by a phase-locked LO, and the LO frequency is such that an IF of, in one embodiment, approximately 1 MHz results. The I demodulator and Q demodulator outputs are applied through respective A/D converters to a polyphase filter. The polyphase filter outputs are then processed by a digital I/Q demodulator. Although a low IF is not generally understood to promote the image rejection performance of a receiver, substantial image rejection is afforded by the polyphase filter, thereby enabling the receiver to be realized almost entirely as a monolithic integrated semiconductor device.

Abstract translation: 一种以相对低的中频（IF）和多相滤波器为特征的通信接收机架构。 接收机包括耦合到载波信号的输入放大器。 相应的I和Q解调器耦合到输入放大器的输出端。 正交本地振荡器（LO）发生器向I解调器提供相应的LO_I和LO_Q输入，并向I解调器和Q解调器提供LO_Q输入。 正交LO发生器由锁相LO驱动，LO频率使得在一个实施例中，IF的IF约为1MHz。 I解调器和Q解调器输出通过相应的A / D转换器应用于多相滤波器。 多相滤波器输出由数字I / Q解调器处理。 虽然通常不理解低IF以促进接收机的镜像抑制性能，但是由多相滤波器提供了大量的图像抑制，从而使接收机几乎完全可以实现为单片集成半导体器件。

公开(公告)号：US06680962B2

公开(公告)日：2004-01-20

申请号：US10136925

申请日：2002-04-29

Applicant: Bin Liu ,  Ali Shakouri

Inventor： Bin Liu ,  Ali Shakouri

IPC: H01S3083

CPC classification number: H01S5/10 ,  H01S5/1032 ,  H01S5/1071 ,  H01S5/4056

Abstract: A ring resonator coupled laser is described, which has a gain region for creating light radiation, ring resonators for providing a strong mode selection and Vernier effect for wide wavelength tunability, passive waveguides for coupling the light and a pair of reflective mirrors for forming a laser cavity. By combining the ring resonators with the reflective mirrors, a strongly frequency-dependent passive mirror with complex amplitude reflectivity is formed and this ring resonator coupled laser exhibits single longitudinal mode operation with a high side mode suppression ratio, narrow linewidth and reduced frequency chirp. By using two slightly different ring resonators, the wavelength tunability is greatly enhanced. Thus, electro-optic effect is preferred for high speed wavelength tuning in the ring resonator coupled laser.

Abstract translation: 描述了一种环形谐振器耦合激光器，其具有用于产生光辐射的增益区域，用于为宽波长可调性提供强模式选择和游标效应的环形谐振器，用于耦合光的无源波导和用于形成激光的一对反射镜 腔。 通过将环形谐振器与反射镜组合，形成具有复振幅反射率的强频率相关无源镜，该环形谐振器耦合激光器具有高侧模抑制比，窄线宽和降低频率啁啾的单纵模运行。 通过使用两个稍微不同的环形谐振器，波长可调性大大提高。 因此，在环形谐振器耦合激光器中的高速波长调谐中，优选电光效应。

公开(公告)号：US06560449B1

公开(公告)日：2003-05-06

申请号：US09591925

申请日：2000-06-12

Applicant: Bin Liu

Inventor： Bin Liu

IPC: H04B110

CPC classification number: H04L27/0014 ,  H04L2027/0016 ,  H04L2027/0024

Abstract: In a communications receiver for quadrature demodulation, a feedback technique for reducing the image response of the receiver. The communications receiver includes an I demodulator and a Q demodulator. A local oscillator (LO) signal is provided by a PLL to a quadrature LO generator that provides an LO_I signal to an I demodulator and an LO_Q signal to a Q demodulator. The LO_I and LO_Q signals are amplitude and phase-controlled versions of the LO signal. An image/signal ratio (I/S) detector detects the relative phase difference and the relative amplitude difference between the respective output terminals of the I demodulator and the Q demodulator and applies an amplitude control signal and a phase control signal to corresponding amplitude control and phase control inputs of the quadrature LO generator. The I/S detector calibrates the quadrature LO generator during the interstitial interval between the reception of data packets. The control signals from the I/S detector adjust the relative amplitude and phase of the LO_I and LO_Q signals in a manner that reduces the image response of the communications receiver.

Abstract translation: 在用于正交解调的通信接收机中，用于减小接收机的图像响应的反馈技术。 通信接收机包括I解调器和Q解调器。 本地振荡器（LO）信号由PLL提供给正交LO发生器，其向I解调器提供LO_I信号，并向Q解调器提供LO_Q信号。 LO_I和LO_Q信号是LO信号的幅度和相位控制版本。 图像/信号比（I / S）检测器检测I解调器和Q解调器的各个输出端之间的相对相位差和相对幅度差，并将幅度控制信号和相位控制信号施加到对应的幅度控制， 正交LO发生器的相位控制输入。 I / S检测器在接收数据包之间的间隔间隔期间校准正交LO发生器。 来自I / S检测器的控制信号以减少通信接收机的图像响应的方式调节LO_I和LO_Q信号的相对幅度和相位。

公开(公告)号：US06414557B1

公开(公告)日：2002-07-02

申请号：US09507114

申请日：2000-02-17

Applicant: Bin Liu

Inventor： Bin Liu

IPC: H03B502

CPC classification number: H03F3/45183 ,  H03F3/4565 ,  H03F3/72 ,  H03F2203/7203 ,  H03K3/0231 ,  H03K3/0322 ,  H03K5/133 ,  H03K2005/00208 ,  H03L7/0995

Abstract: A ring oscillator circuit, such as a VCO, with a relatively high level of noise rejection for noise originating from both the voltage supply and ground. The ring oscillator circuit is composed of a plurality of differential delay circuits, each differential delay circuit generating a differential output signal that is a delayed (and preferably inverted) version of a differential input signal. Each differential delay circuit includes first and second input transistors for receiving the differential input signal. Each differential delay circuit also includes first and second load transistors coupled in parallel with the respective first and second input transistors. Each differential delay circuit further includes a first current source coupled between the first input transistor and a first power supply terminal (e.g., a voltage supply terminal), a second current source coupled between the second input transistor and the first power supply terminal and a third current source coupled between the first and second input transistors and a second power supply terminal (e.g., a ground terminal). The first and second current sources reduce the coupling of noise from the first power supply terminal to the output. The third current source reduces the coupling of noise from the second power supply terminal to the output.

公开(公告)号：US06385376B1

公开(公告)日：2002-05-07

申请号：US09425543

申请日：1999-10-22

Applicant: John E. Bowers ,  Bin Liu ,  Patrick Abraham ,  Boo-Gyoun Kim ,  Ali Shakouri

Inventor： John E. Bowers ,  Bin Liu ,  Patrick Abraham ,  Boo-Gyoun Kim ,  Ali Shakouri

IPC: G02B642

CPC classification number: G02B6/12 ,  G02B6/12002 ,  G02B6/12007 ,  G02B6/125 ,  G02B2006/12078 ,  G02B2006/12097 ,  G02F1/3132 ,  G02F2001/3135

Abstract: A vertical directional coupler fabricated using wafer fusion with a very short coupling length for fabrication of switches, filters and other electro-optic devices. Using the fused vertical coupler, planar waveguides can be fabricated on two different substrates in a three-dimensional structure in which there is vertical coupling between arrays through fused regions. Switches, including crossbar switches based on coupling between independent arrays of waveguides, as well as filters, can be fabricated.

Abstract translation: 使用具有非常短的耦合长度的晶片熔合件制造开关，滤波器和其它电光器件的垂直定向耦合器。 使用熔融垂直耦合器，平面波导可以在三维结构中的两个不同的衬底上制造，其中通过熔融区域在阵列之间存在垂直耦合。 可以制造包括基于独立的波导阵列之间的耦合的交叉开关的开关以及滤波器。

公开(公告)号：US5804489A

公开(公告)日：1998-09-08

申请号：US679196

申请日：1996-07-12

Applicant: Fu-Liang Yang ,  Erik S. Jeng ,  Yu-Chun Ho ,  Bin Liu ,  Chao-Ming Koh

Inventor： Fu-Liang Yang ,  Erik S. Jeng ,  Yu-Chun Ho ,  Bin Liu ,  Chao-Ming Koh

IPC: H01L21/8242 ,  H01L27/108

CPC classification number: H01L27/10852 ,  H01L27/10817

Abstract: The present invention is a method of manufacturing crown shape capacitors in the semiconducter memories. Using a single step etching to farbricate the capacitor in a DRAM cell. The method can form side wall polymers and etching byproductions on the surface of the first polysilicon, using the side wall polymers and the etching byproductions as a mask to form the crown shape capacitors with pillars. Moreover, this present invention can form the crown shape structure and pillars in the same step, the crown shape structure and the pillars increase the surface area of the capacitor. Therefore the present invention will increase the performance of the capacitor.

Abstract translation: 本发明是在半导体存储器中制造冠状电容器的方法。 使用单步蚀刻来超越DRAM单元中的电容器。 该方法可以使用侧壁聚合物和蚀刻副产物作为掩模形成侧壁聚合物并在第一多晶硅的表面上蚀刻副产物，以形成具有支柱的冠状电容器。 此外，本发明可以在相同的步骤中形成冠状结构和柱，冠状结构和柱增加电容器的表面积。 因此，本发明将增加电容器的性能。

公开(公告)号：US5780339A

公开(公告)日：1998-07-14

申请号：US850908

申请日：1997-05-02

Applicant: Bin Liu ,  Wen-Jya Liang ,  Yeh-Sen Lin

Inventor： Bin Liu ,  Wen-Jya Liang ,  Yeh-Sen Lin

IPC: H01L21/8242

CPC classification number: H01L27/10852

Abstract: This present invention is a method of fabricating a semiconductor memory cell in a DRAM. This invention utilizes a inter plug technique and nitride sidewall spacers to improve deep node contact etching damage and reduce the number of mask steps for typical landing pad processes. Thus, the method of this invention allows the manufacture of a semiconductor memory cell that reduces the difficulties due to the high aspect ratio of the contact hole of a storage node.

Abstract translation: 本发明是一种在DRAM中制造半导体存储单元的方法。 本发明利用插塞技术和氮化物侧壁间隔物来改善深层接触蚀刻损伤并减少典型的着陆焊盘工艺的掩模步骤的数量。 因此，本发明的方法允许制造半导体存储单元，其减少由于存储节点的接触孔的高纵横比引起的困难。

公开(公告)号：USD1070479S1

公开(公告)日：2025-04-15

申请号：US29968250

申请日：2024-10-15

Applicant: Bin Liu

Designer： Bin Liu