Transmission method using parity packets, transmitter and repeater
    142.
    发明授权
    Transmission method using parity packets, transmitter and repeater 有权
    传输方式采用奇偶校验分组,发射机和中继器

    公开(公告)号:US09300437B2

    公开(公告)日:2016-03-29

    申请号:US14079988

    申请日:2013-11-14

    Inventor: Yutaka Murakami

    Abstract: Problem: A packet error rate in a receiver needs to be effectively reduced.Solution to Problem: A transmitter 11 inserts error detection codes into information packets on one-to-one basis, at a certain layer at which signal processing is performed earlier than at a physical layer, to obtain first information packets. The transmitter 11 codes the first information packets at the physical layer to obtain second information packets, and transmits the second information packets. At the certain layer, the transmitter 11 generates parity packets by coding the information packets and inserts the error detection codes into the parity packets on one-to-one basis to obtain first parity packets. The transmitter codes the first parity packets at the physical layer to obtain second parity packets. The transmitter 11 transmits the second parity packets in accordance with a transmission request from each of one or more receivers.

    Abstract translation: 问题:接收机中的数据包错误率需要有效降低。 问题的解决方案:发射机11在比物理层更早执行信号处理的特定层,以一对一的方式将错误检测码插入到信息分组中,以获得第一信息分组。 发射机11对物理层的第一信息分组进行编码,获得第二信息分组,发送第二信息分组。 在特定层,发射机11通过对信息分组进行编码来生成奇偶校验分组,并将错误检测码一一对应地插入到奇偶分组中,以获得第一奇偶分组。 发射机对物理层的第一个奇偶校验分组进行编码,以获得第二个奇偶校验分组。 发射机11根据来自一个或多个接收机中的每一个的发送请求发送第二奇偶分组。

    Data processing method, precoding method, and communication device
    145.
    发明授权
    Data processing method, precoding method, and communication device 有权
    数据处理方法,预编码方法和通信装置

    公开(公告)号:US09178650B2

    公开(公告)日:2015-11-03

    申请号:US14382879

    申请日:2013-12-27

    Abstract: An encoder outputs a first bit sequence having N bits. A mapper generates a first complex signal s1 and a second complex signal s2 with use of bit sequence having X+Y bits included in an input second bit sequence, where X indicates the number of bits used to generate the first complex signal s1, and Y indicates the number of bits used to generate the second complex signal s2. A bit length adjuster is provided after the encoder, and performs bit length adjustment on the first bit sequence such that the second bit sequence has a bit length that is a multiple of X+Y, and outputs the first bit sequence after the bit length adjustment as the second bit sequence. As a result, a problem between a codeword length of a block code and the number of bits necessary to perform mapping by a set of modulation schemes is solved.

    Abstract translation: 编码器输出具有N位的第一比特序列。 映射器使用包含在输入第二位序列中的具有X + Y位的位序列来生成第一复信号s1和第二复信号s2,其中X表示用于产生第一复信号s1的位数,Y 表示用于生成第二复合信号s2的位数。 在编码器之后提供比特长度调节器,并对第一比特序列执行比特长度调整,使得第二比特序列具有作为X + Y的倍数的比特长度,并且在比特长度调整之后输出第一比特序列 作为第二位序列。 结果,解决了块码的码字长度与通过一组调制方式进行映射所必需的位数之间的问题。

    Transmission apparatus and reception apparatus
    146.
    发明授权
    Transmission apparatus and reception apparatus 有权
    发送装置和接收装置

    公开(公告)号:US09059743B2

    公开(公告)日:2015-06-16

    申请号:US13872787

    申请日:2013-04-29

    Abstract: A transmitter apparatus wherein a relatively simple structure is used to suppress burst errors without changing the block sizes of encoded blocks even when the number of modulation multi-values is increased. An encoding part subjects transport data to a block encoding process to form block encoded data. A modulating part modulates the block encoded data to form data symbols; and an arranging (interleaving) part arranges(interleaves) the block encoded data in such a manner that the intra-block encoded data of the encoded blocks, which include their respective single different data symbol, get together, and then supplies the arranged(interleaved) block encoded data to the modulating part. In this way, there can be provided a transmitter apparatus wherein a relatively simple structure is used to suppress burst errors without changing the block sizes of encoded blocks even when the number of modulation multi-values is increased.

    Abstract translation: 一种发射机装置,即使当调制多值的数量增加时,使用相对简单的结构来抑制突发错误,而不改变编码块的块大小。 编码部分将传输数据转移到块编码处理以形成块编码数据。 调制部分调制块编码数据以形成数据符号; 并且排列(交织)部分以这样的方式布置(交织)块编码数据,使得包括它们各自的单个不同数据符号的编码块的块内编码数据在一起,然后提供所安排的(交织的 )块编码数据到调制部分。 以这种方式,可以提供一种发射机装置,即使当调制多值的数量增加时,使用相对简单的结构来抑制突发错误,而不改变编码块的块大小。

    DATA PROCESSING METHOD, PRECODING METHOD, AND COMMUNICATION DEVICE
    148.
    发明申请
    DATA PROCESSING METHOD, PRECODING METHOD, AND COMMUNICATION DEVICE 有权
    数据处理方法,预处理方法和通信装置

    公开(公告)号:US20150010103A1

    公开(公告)日:2015-01-08

    申请号:US14382879

    申请日:2013-12-27

    Abstract: An encoder outputs a first bit sequence having N bits. A mapper generates a first complex signal s1 and a second complex signal s2 with use of bit sequence having X+Y bits included in an input second bit sequence, where X indicates the number of bits used to generate the first complex signal s1, and Y indicates the number of bits used to generate the second complex signal s2. A bit length adjuster is provided after the encoder, and performs bit length adjustment on the first bit sequence such that the second bit sequence has a bit length that is a multiple of X+Y, and outputs the first bit sequence after the bit length adjustment as the second bit sequence. As a result, a problem between a codeword length of a block code and the number of bits necessary to perform mapping by a set of modulation schemes is solved.

    Abstract translation: 编码器输出具有N位的第一比特序列。 映射器使用包含在输入第二位序列中的具有X + Y位的位序列来生成第一复信号s1和第二复信号s2,其中X表示用于产生第一复信号s1的位数,Y 表示用于生成第二复合信号s2的位数。 在编码器之后提供比特长度调节器,并对第一比特序列执行比特长度调整,使得第二比特序列具有作为X + Y的倍数的比特长度,并且在比特长度调整之后输出第一比特序列 作为第二位序列。 结果,解决了块码的码字长度与通过一组调制方式进行映射所必需的位数之间的问题。

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