公开(公告)号：US11462484B2

公开(公告)日：2022-10-04

申请号：US17066408

申请日：2020-10-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung Yen ,  Bernd Karl Appelt ,  Kay Stephan Essig

IPC: H01L23/552 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L23/498

Abstract: An electronic package and manufacturing method thereof are provided. The electronic package includes a substrate, a first encapsulant, a wettable flank and a shielding layer. The substrate includes a first surface, a second surface opposite to the first surface and a side surface connecting the first surface and the second surface. The first encapsulant is disposed on the first surface of the substrate. The wettable flank is exposed from the side surface of the substrate. The shielding layer covers a side surface of the first encapsulant, wherein on the side surface of the substrate, the shielding layer is spaced apart from the wettable flank.

公开(公告)号：US20220310521A1

公开(公告)日：2022-09-29

申请号：US17840435

申请日：2022-06-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chao Wei LIU

IPC: H01L23/538 ,  H01L23/31 ,  H01L25/16 ,  H01L21/56 ,  H01L23/00 ,  H01L21/48

Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a first carrier, an encapsulant, a second carrier and one or more supporters. The first carrier has a first surface and a first side contiguous with the first surface. The encapsulant is on the first surface of the first carrier, and the first side of the first carrier is exposed from the encapsulant. The second carrier is disposed over the first carrier. The one or more supporters are spaced apart from the first side of the first carrier and connected between the first carrier and the second carrier. The one or more supporters are arranged asymmetrically with respect to the geographic center of the first carrier. The one or more supporters are fully sealed in the encapsulant.

公开(公告)号：US20220302022A1

公开(公告)日：2022-09-22

申请号：US17204829

申请日：2021-03-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung HUANG

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/00

Abstract: A semiconductor substrate structure and a method of manufacturing a semiconductor substrate structure are provided. The semiconductor substrate structure includes a substrate, an electronic device, and a filling material. The substrate defines a cavity. The electronic device is disposed in the cavity and spaced apart from the substrate by a gap. The filling material is disposed in the gap and covers a first region of an upper surface of the electronic device.

公开(公告)号：US11444032B2

公开(公告)日：2022-09-13

申请号：US16917335

申请日：2020-06-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yencheng Kuo ,  Shao-Lun Yang

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/48 ,  H01L23/498 ,  B81B7/00 ,  H01L25/16

Abstract: A semiconductor package device and a method of manufacturing a semiconductor package device are provided. The semiconductor package device includes a substrate, a first electronic component, a first dielectric layer, and a first hole. The substrate has a first surface and a second surface opposite to the first surface. The first electronic component is disposed on the first surface. The first dielectric layer is disposed on the second surface and has a third surface away from the substrate. The first hole extends from the first dielectric layer and the substrate. The first hole is substantially aligned with the first electronic component.

公开(公告)号：US11424212B2

公开(公告)日：2022-08-23

申请号：US16514966

申请日：2019-07-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien-Wei Chang ,  Shang-Wei Yeh ,  Chung-Hsi Wu ,  Min Lung Huang

IPC: H01L23/00 ,  H01L21/768 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065 ,  H01L25/07 ,  H01L25/11

Abstract: A semiconductor package structure includes a conductive structure, at least one semiconductor element, an encapsulant, a redistribution structure and a plurality of bonding wires. The semiconductor element is disposed on and electrically connected to the conductive structure. The encapsulant is disposed on the conductive structure to cover the semiconductor element. The redistribution structure is disposed on the encapsulant, and includes a redistribution layer. The bonding wires electrically connect the redistribution structure and the conductive structure.

公开(公告)号：US11424167B2

公开(公告)日：2022-08-23

申请号：US17067565

申请日：2020-10-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chen-Chao Wang ,  Chih-Yi Huang ,  Keng-Tuan Chang

IPC: H01L21/56 ,  H01L21/66 ,  H01L25/00 ,  H01L23/485 ,  H01L23/498 ,  H01L25/065

Abstract: A semiconductor package structure and a method for manufacturing the same are provided. The method includes: providing a package body includes a first semiconductor device, wherein the first semiconductor device includes a plurality of first electrical contacts disposed adjacent to an active surface of the first semiconductor device; measuring the actual positions of the first electrical contacts of the first semiconductor device; providing a plurality of second electrical contacts outside the first semiconductor device; and forming an interconnection structure based on the actual positions of the first electrical contacts of the first semiconductor device and the positions of the second electrical contacts satisfying a predetermined electrical performance criterion by a mask-less process, so as to connect the first electrical contacts and the second electrical contacts and maintain signal integrity during transmission.

公开(公告)号：US11410944B2

公开(公告)日：2022-08-09

申请号：US16557993

申请日：2019-08-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang

IPC: H01L23/31 ,  H01L23/66 ,  H01L23/498 ,  H01L21/48 ,  H01Q1/38 ,  H01L23/00

Abstract: A stacked structure includes a lower structure and an upper structure. The lower structure includes at least one lower dielectric layer and at least one lower metal layer in contact with the lower dielectric layer. The upper structure includes at least one upper dielectric layer and at least one upper metal layer in contact with the upper dielectric layer. The upper dielectric layer includes a first upper dielectric layer attached to the lower structure. The first upper dielectric layer includes a first portion and a second portion. A difference between a thickness of the first portion and a thickness of the second portion is greater than a gap between a highest point of a top surface of the first upper dielectric layer and lowest point of the top surface of the first upper dielectric layer.

公开(公告)号：US11410899B2

公开(公告)日：2022-08-09

申请号：US16751139

申请日：2020-01-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yi Chen ,  Chang-Lin Yeh ,  Jen-Chieh Kao

IPC: H01L23/31 ,  H01L23/498 ,  H01L23/66 ,  H01Q1/22 ,  H01L23/00 ,  H01Q19/10 ,  H01Q13/10 ,  H01L23/10 ,  H01Q21/06

Abstract: A semiconductor package device includes a first substrate, a second substrate and a first spacer. The first substrate includes a first divided pad. The second substrate includes a second divided pad disposed above the first divided pad. The first spacer is disposed between the first divided pad and the second divided pad. The first spacer is in contact with the first divided pad and the second divided pad.

公开(公告)号：US20220243992A1

公开(公告)日：2022-08-04

申请号：US17163217

申请日：2021-01-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hung-Hsien HUANG ,  Shin-Luh TARNG ,  Ian HU ,  Chien-Neng LIAO ,  Jui-Cheng YU ,  Po-Cheng HUANG

IPC: F28D15/04 ,  F28D15/02 ,  F28F13/18

Abstract: A heat transfer element, a method for manufacturing the same and a semiconductor structure including the same are provided. The heat transfer element includes a housing, a chamber, a dendritic layer and a working fluid. The chamber is defined by the housing. The dendritic layer is disposed on an inner surface of the housing. The working fluid is located within the chamber.

公开(公告)号：US11387213B2

公开(公告)日：2022-07-12

申请号：US16894630

申请日：2020-06-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Shun Sing Liao

IPC: H01L21/78 ,  H01L23/00 ,  H01L21/56 ,  H01L23/498

Abstract: A method for manufacturing a semiconductor package includes: (a) providing a substrate structure, wherein the substrate structure includes a chip attach area, a bottom area opposite to the chip attach area, a lower side rail surrounding the bottom area, a first lower structure and a second lower structure, wherein the first lower structure is disposed in a first lower region of the lower side rail, and a second lower occupancy ratio is greater than a first lower occupancy ratio; (b) attaching at least one semiconductor chip to the chip attach area; and (c) forming an encapsulant to cover the at least one semiconductor chip.