SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20210082782A1

    公开(公告)日:2021-03-18

    申请号:US16572340

    申请日:2019-09-16

    Abstract: A semiconductor device package includes a first substrate, a second substrate, and a first electronic component between the first substrate and the second substrate. The first electronic component has a first surface facing the first substrate and a second surface facing the second substrate. The semiconductor device package also includes a first electrical contact disposed on the first surface of the first electronic component and electrically connecting the first surface of the first electronic component with the first substrate. The semiconductor device package also includes a second electrical contact disposed on the second surface of the first electronic component and electrically connecting the second surface of the first electronic component with the second substrate. A method of manufacturing a semiconductor device package is also disclosed.

    SEMICONDUCTOR PACKAGE STRUCTURE AND SEMICONDUCTOR MANUFACTURING PROCESS

    公开(公告)号:US20210166987A1

    公开(公告)日:2021-06-03

    申请号:US17174209

    申请日:2021-02-11

    Abstract: A semiconductor package structure includes a semiconductor die, at least one wiring structure, a metal support, a passive element, a plurality of signal vias, and a plurality of thermal structures. The semiconductor die has an active surface. The at least one wiring structure is electrically connected to the active surface of the semiconductor die. The metal support is used for supporting the semiconductor die. The passive element is electrically connected to the semiconductor die. The signal vias are electrically connecting the passive element and the semiconductor die. The thermal structures are connected to the passive element, and the thermal structures are disposed on a periphery of the at least one wiring structure.

    SEMICONDUCTOR PACKAGE STRUCTURE
    5.
    发明申请

    公开(公告)号:US20200091036A1

    公开(公告)日:2020-03-19

    申请号:US16566495

    申请日:2019-09-10

    Abstract: A semiconductor package structure includes a package substrate, a semiconductor die, a vapor chamber and a heat dissipating device. The package substrate has a first surface and a second surface opposite to the first surface. The semiconductor die is electrically connected to the first surface of the package substrate. The vapor chamber is thermally connected to a first surface of the semiconductor die. The vapor chamber defines an enclosed chamber for accommodating a first working liquid. The heat dissipating device is thermally connected to the vapor chamber. The heat dissipating device defines a substantially enclosed space for accommodating a second working liquid.

    MULTI-MOLDINGS FAN-OUT PACKAGE AND PROCESS
    10.
    发明申请

    公开(公告)号:US20190080975A1

    公开(公告)日:2019-03-14

    申请号:US15701394

    申请日:2017-09-11

    Abstract: A semiconductor device package includes a semiconductor device, a conductive bump, a first encapsulant and a second encapsulant. The semiconductor device has a first surface, a second surface and a lateral surface. The second surface is opposite to the first surface. The lateral surface extends between the first surface and the second surface. The semiconductor device comprises a conductive pad adjacent to the first surface of the semiconductor device. The conductive bump is electrically connected to the conductive pad. The first encapsulant covers the first surface of the semiconductor device and a first portion of the lateral surface of the semiconductor device, and surrounds the conductive bump. The second encapsulant covers the second surface of the semiconductor device and a second portion of the lateral surface of the semiconductor device.

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