公开(公告)号：US20090112497A1

公开(公告)日：2009-04-30

申请号：US12168869

申请日：2008-07-07

Applicant: SHEN-CHUN LI ,  SHOU-KUO HSU

Inventor： SHEN-CHUN LI ,  SHOU-KUO HSU

IPC: G01R19/00

CPC classification number: G01R19/2506 ,  G01R19/16528

Abstract: A computer-based method for measuring a ringup, a ringdown and a ringback of an electronic signal is provided. The method includes fitting a ringdown fitting curve to approximate a first ringdown data, and fitting a ringup fitting curve to approximate a first ringup data. The method further includes calculating an approximate ringdown value according to the ringdown fitting curve, and calculating an approximate ringup value according to the ringup fitting curve. The approximate ringup and ringdown values are then used to obtain an accurate ringup value and an accurate ringup value respectively. An accurate ringback value is calculated by subtracting the accurate ringup value from the accurate ringdown value.

Abstract translation: 提供了一种用于测量电子信号的振铃，铃声和回铃的基于计算机的方法。 该方法包括拟合一个环形拟合曲线以近似第一个振铃数据，以及拟合一个振铃拟合曲线近似第一个振铃数据。 该方法还包括根据振铃拟合曲线计算近似振铃值，并根据振铃拟合曲线计算近似振铃值。 然后使用近似的振铃和振铃值获得准确的振铃值和准确的振铃值。 通过从准确的振铃值中减去准确的振铃值来计算精确的回铃值。

公开(公告)号：US20090103385A1

公开(公告)日：2009-04-23

申请号：US11965753

申请日：2007-12-28

Applicant: SHOU-KUO HSU ,  DUEN-YI HO ,  CHENG-SHIEN LI

Inventor： SHOU-KUO HSU ,  DUEN-YI HO ,  CHENG-SHIEN LI

IPC: G11C5/14 ,  H05K1/11

CPC classification number: G06F13/4072 ,  G06F13/4239 ,  H05K1/0262 ,  H05K1/14 ,  H05K2201/044 ,  H05K2201/09954 ,  H05K2201/10159

Abstract: An exemplary motherboard includes a driving module, at least two first slots arranged for mounting two first type of memories, at least two second slots arranged for mounting two second type of memories, and a voltage regulator. The driving module is electronically connected to the at least two first slots, the at least two second slots, and the voltage regulator in turn via a channel. The first type of memories and the second type of memories are alternatively mounted on the motherboard, the voltage regulator detects which type memory is currently mounted on the motherboard and outputs voltages suitable for the type of memory mounted on the motherboard accordingly.

Abstract translation: 示例性主板包括驱动模块，布置成用于安装两个第一类型存储器的至少两个第一槽，布置成安装两个第二类型存储器的至少两个第二槽和电压调节器。 驱动模块通过通道电连接到至少两个第一插槽，至少两个第二插槽和电压调节器。 第一类型的存储器和第二类型的存储器交替地安装在母板上，电压调节器检测当前安装在母板上的哪种类型的存储器，并相应地输出适合于安装在母板上的存储器类型的电压。

公开(公告)号：US20090076778A1

公开(公告)日：2009-03-19

申请号：US12172258

申请日：2008-07-13

Applicant: SHOU-KUO HSU ,  YING-TSO LAI ,  DUEN-YI HO

Inventor： SHOU-KUO HSU ,  YING-TSO LAI ,  DUEN-YI HO

IPC: G06F17/50

CPC classification number: G06F17/5036

Abstract: A computer-implemented method for designing a voltage regulator module (VRM) is disclosed. The method includes receiving design parameters and a component data for each component and storing the design parameters and the component data for each component into a component selection table, calculating a work efficiency of the VRM, and storing the work efficiency into a power computation table. The method further includes simulating a derating of each component according to a corresponding rated stress of each component if the work efficiency is greater than or equal to a predetermined work efficiency, calculating a stress ratio of each component, and storing the stress ratio into a component derating table. The component selection table, the power computation table and the component derating table are stored to form a desired VRM model if the stress ratio of each component meets a corresponding derating specification.

Abstract translation: 公开了一种用于设计电压调节器模块（VRM）的计算机实现的方法。 该方法包括接收每个组件的设计参数和组件数据，并将每个组件的设计参数和组件数据存储到组件选择表中，计算VRM的工作效率，并将工作效率存储在功率计算表中。 该方法还包括如果工作效率大于或等于预定工作效率，则计算每个部件的应力比，并将应力比存储到部件中，根据每个部件的相应的额定应力来模拟每个部件的降额 降额表。 存储组件选择表，功率计算表和组件降额表，以形成所需的VRM模型，如果每个组件的应力比满足相应的降额规范。

公开(公告)号：US20090065238A1

公开(公告)日：2009-03-12

申请号：US11957416

申请日：2007-12-15

Applicant: CHIEN-HUNG LIU ,  SHOU-KUO HSU ,  CHIA-NAN PAI

Inventor： CHIEN-HUNG LIU ,  SHOU-KUO HSU ,  CHIA-NAN PAI

IPC: H05K1/00

CPC classification number: H05K1/0245 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/09672

Abstract: An exemplary PCB includes a first reference layer, a first signal layer, a second signal layer, and a third signal layer in that order, a first differential pair is arranged in the first signal layer in edge-coupled structure and references the first reference layer, a distance between the first signal layer and the second signal layer is greater than a distance between the first reference layer and the first signal layer, a second differential pair is arranged in the second signal layer and the third signal layer in broad-coupled structure. The PCB has a high density layout of transmission lines.

Abstract translation: 示例性PCB包括第一参考层，第一信号层，第二信号层和第三信号层，第一差分对以边缘耦合结构布置在第一信号层中，并参考第一参考层 第一信号层和第二信号层之间的距离大于第一参考层和第一信号层之间的距离，第二差分对被布置在第二信号层中，第三信号层以广泛耦合结构 。 PCB具有传输线高密度布局。

公开(公告)号：US20090046418A1

公开(公告)日：2009-02-19

申请号：US11952139

申请日：2007-12-07

Applicant: CHUN-SHENG CHEN ,  SHOU-KUO HSU ,  CHENG-SHIEN LI ,  DUEN-YI HO ,  YU-CHANG PAI

Inventor： CHUN-SHENG CHEN ,  SHOU-KUO HSU ,  CHENG-SHIEN LI ,  DUEN-YI HO ,  YU-CHANG PAI

IPC: G06F1/16 ,  H05K1/18

CPC classification number: H05K1/0295 ,  H05K1/0262 ,  H05K1/14 ,  H05K2201/044 ,  H05K2201/09954 ,  H05K2201/10159

Abstract: An exemplary motherboard includes a first slot arranged for mounting a first type of memory, a second slot arranged for mounting a second type of memory, and a voltage regulator electronically connected to the first slot and the second slot. The first memory and the second memory are alternatively mounted on the motherboard, the voltage regulator detects which type memory is currently mounted on the motherboard and outputs voltages suitable for the type of the memory mounted on the motherboard accordingly.

Abstract translation: 示例性母板包括布置用于安装第一类型存储器的第一槽，布置用于安装第二类型存储器的第二槽和电连接到第一槽和第二槽的电压调节器。 第一存储器和第二存储器替代地安装在母板上，电压调节器检测当前安装在母板上的哪种类型的存储器，并相应地输出适合安装在母板上的存储器类型的电压。

公开(公告)号：US20080309354A1

公开(公告)日：2008-12-18

申请号：US11963873

申请日：2007-12-24

Applicant: SHOU-KUO HSU

Inventor： SHOU-KUO HSU

IPC: G01R27/02

CPC classification number: G01R27/04

Abstract: An apparatus for testing characteristic impedance of transmission lines includes a variable resistor, a first comparator, a second comparator, and a counter. One terminal of the variable resistor is coupled to a signal source, another terminal of the variable resistor is coupled to one terminal of a transmission line, and another terminal of the transmission line is idle. The one terminal of the transmission line is coupled to the input terminals of the first and second comparators. The output terminals of the first and second comparators are respectively coupled to input terminals of the counter. An output terminal of the counter is coupled to an adjusting terminal of the variable resistor, the counter adjusts the resistance of the variable resistor according to signals output from the first and second comparators.

Abstract translation: 用于测试传输线路特性阻抗的装置包括可变电阻器，第一比较器，第二比较器和计数器。 可变电阻器的一个端子耦合到信号源，可变电阻器的另一个端子耦合到传输线的一个端子，并且传输线路的另一个端子空闲。 传输线的一个端子耦合到第一和第二比较器的输入端。 第一和第二比较器的输出端分别耦合到计数器的输入端。 计数器的输出端子耦合到可变电阻器的调整端子，该计数器根据从第一和第二比较器输出的信号来调节可变电阻器的电阻。

公开(公告)号：US20080259553A1

公开(公告)日：2008-10-23

申请号：US11766105

申请日：2007-06-21

Applicant: SHOU-KUO HSU ,  DUEN-YI HO ,  CHENG-SHIEN LI

Inventor： SHOU-KUO HSU ,  DUEN-YI HO ,  CHENG-SHIEN LI

IPC: H05K7/00

CPC classification number: G06F1/26

Abstract: An exemplary motherboard includes a first slot arranged for mounting a first type of memory, a second slot arranged for mounting a second type of memory, a voltage regulator electronically connected to the first slot and the second slot, and a serial presence detect (SPD) unit connected to the voltage regulator. The first memory and the second memory alternatively mounted on the motherboard, the SPD detects which type of memory is mounted on the motherboard, and the voltage regulator outputs voltages suitable for the type of the memory mounted on the motherboard according to a detection result of the SPD.

Abstract translation: 示例性主板包括布置用于安装第一类型存储器的第一槽，布置用于安装第二类型存储器的第二槽，电连接到第一槽和第二槽的电压调节器，以及串联存在检测（SPD） 单元连接到电压调节器。 第一存储器和第二存储器交替地安装在母板上，SPD检测在主板上安装哪种类型的存储器，并且电压调节器根据检测结果输出适合安装在母板上的存储器类型的电压 SPD。

公开(公告)号：US20080116994A1

公开(公告)日：2008-05-22

申请号：US11838238

申请日：2007-08-14

Applicant: SHOU-KUO HSU ,  CHIA-NAN PAI ,  HSIAO-CHUAN TU

Inventor： SHOU-KUO HSU ,  CHIA-NAN PAI ,  HSIAO-CHUAN TU

IPC: H03H7/38

CPC classification number: H05K1/0246 ,  H05K1/0237 ,  H05K2201/09254 ,  H05K2201/10022

Abstract: A circuit topology for multiple loads is provided. In an embodiment, the circuit topology includes a driving terminal (50), a first node (A), a first receiving terminal (10), and a second receiving terminal (20). The driving terminal is coupled to the first node via a main transmission line (11), the first node is respectively coupled to the first and second receiving terminals via a first branch transmission line (13) and a second branch transmission line (12). A first resistor (R2) is mounted on the second branch transmission line, a distance the signal travels from the driving terminal to the second receiving terminal via the main transmission line and the second branch transmission line is greater than a distance the signal travels from the driving terminal to the first receiving terminal via the main transmission and the first branch transmission line.

Abstract translation: 提供了多个负载的电路拓扑。 在一个实施例中，电路拓扑包括驱动终端（50），第一节点（A），第一接收终端（10）和第二接收终端（20）。 驱动终端经由主传输线（11）耦合到第一节点，第一节点经由第一分支传输线（13）和第二分支传输线（12）分别耦合到第一和第二接收终端。 第一电阻器（R 2）安装在第二分支传输线上，信号经由主传输线从驱动端到达第二接收端的距离，第二分支传输线大于信号从 所述驱动终端经由所述主发送和所述第一分支传输线路发送到所述第一接收终端。

公开(公告)号：US20080115964A1

公开(公告)日：2008-05-22

申请号：US11829972

申请日：2007-07-30

Applicant: LIANG-YAO CHANG ,  SHOU-KUO HSU

Inventor： LIANG-YAO CHANG ,  SHOU-KUO HSU

IPC: H05K1/00

CPC classification number: H05K1/0225 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/09972

Abstract: An exemplary printed circuit board includes a power plane, and a ground plane. The power plane includes two power modules, and an insulating medium for insulating the two power modules from each other. The ground plane is insulated from the power plane, a plurality of slots is defined in the ground plane and located close to facing edges of the two power modules, and the slots are arranged in rows along the facing edges of the two power modules.

Abstract translation: 示例性印刷电路板包括电源平面和接地平面。 电力平面包括两个电源模块和用于将两个电源模块彼此绝缘的绝缘介质。 接地层与电源平面绝缘，多个槽位于接地平面内，靠近两个电源模块的相对边缘，并沿着两个电源模块的相对边缘排成行。

公开(公告)号：US20080053687A1

公开(公告)日：2008-03-06

申请号：US11760800

申请日：2007-06-11

Applicant: LIANG-YAO CHANG ,  SHOU-KUO HSU

Inventor： LIANG-YAO CHANG ,  SHOU-KUO HSU

IPC: H05K1/00

CPC classification number: H05K1/0216 ,  H05K1/0237 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/09663

Abstract: A printed circuit board includes a power plane, a ground plane insulated from the power plane, and at least one via. The power plane includes two power modules, an insulating medium for insulating the two power modules, and a signal transmission line positioned between the two power modules and insulated from the two power modules by the insulating medium. The at least one via connects the signal transmission line with the ground plane for conducting simultaneous switching noise (SSN) transmitted to the power modules to the ground plane.

Abstract translation: 印刷电路板包括电源平面，与电源平面绝缘的接地平面以及至少一个通孔。 电力平面包括两个电源模块，用于绝缘两个电源模块的绝缘介质，以及位于两个电源模块之间并通过绝缘介质与两个电源模块绝缘的信号传输线。 至少一个通孔将信号传输线与接地平面相连接，用于将传输到电源模块的同时开关噪声（SSN）传输到接地层。