公开(公告)号：US20230170245A1

公开(公告)日：2023-06-01

申请号：US17457074

申请日：2021-12-01

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  JinHee Jung ,  DaePark Lee ,  YoungKang Lee ,  YongJin Jeong

IPC: H01L21/683 ,  H01L23/552 ,  H01L21/48

CPC classification number: H01L21/6836 ,  H01L23/552 ,  H01L21/4814

Abstract: A semiconductor device is formed using a jig. The jig includes a metal frame, a polymer film, and an adhesive layer disposed between the metal frame and polymer film. An opening is formed through the adhesive layer and polymer film. A groove is formed around the opening. A semiconductor package is disposed on the jig over the opening with a side surface of the semiconductor package adjacent to the groove. A shielding layer is formed over the semiconductor package and jig. The semiconductor package is removed from the jig.

公开(公告)号：US11664327B2

公开(公告)日：2023-05-30

申请号：US16950295

申请日：2020-11-17

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak Lee ,  KyungHwan Kim ,  HeeSoo Lee ,  ChangOh Kim ,  KyoungHee Park ,  JinHee Jung ,  OMin Kwon ,  JiWon Lee ,  YuJeong Jang

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/498

CPC classification number: H01L23/552 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/49822

Abstract: A semiconductor package has a substrate, a first component disposed over the substrate, an encapsulant deposited over the first component, and a second component disposed over the substrate outside the encapsulant. A metal mask is disposed over the second component. A shielding layer is formed over the semiconductor package. The metal mask after forming the shielding layer. The shielding layer is optionally formed on a contact pad of the substrate while a conic area above the contact pad that extends 40 degrees from vertical remains free of the encapsulant and metal mask while forming the shielding layer. Surfaces of the metal mask and encapsulant oriented toward the contact pad can be sloped. The metal mask can be disposed and removed using a pick-and-place machine.

公开(公告)号：US20230081706A1

公开(公告)日：2023-03-16

申请号：US17447336

申请日：2021-09-10

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak Lee ,  Gwang Kim ,  Junho Ye ,  YouJoung Choi ,  MinKyung Kim ,  Yongwoo Lee ,  Namgu Kim

IPC: H01L23/552 ,  H01L23/31 ,  H01L21/56 ,  H01L23/498 ,  H01Q1/40

Abstract: A semiconductor device has a substrate and an electrical component disposed over a surface of the substrate. An antenna interposer is disposed over the substrate. A first encapsulant is deposited around the antenna interposer. The first encapsulant has a high dielectric constant. The antenna interposer has a conductive layer operating as an antenna and an insulating layer having a low dielectric constant less than the high dielectric constant of the first encapsulant. The antenna interposer is made from an antenna substrate having a plurality of antenna interposers. Bumps are formed over the antenna substrate and the antenna substrate is singulated to make the plurality of antenna interposers. A second encapsulant is deposited over the electrical component. The second encapsulant has a low dielectric constant less than the high dielectric constant of the first encapsulant. A shielding layer is disposed over the second encapsulant.

公开(公告)号：US11594438B2

公开(公告)日：2023-02-28

申请号：US17339210

申请日：2021-06-04

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Hyeonchul Lee ,  Kyounghee Park ,  Kyunghwan Kim

IPC: H01L21/673

Abstract: A semiconductor manufacturing equipment has an outer case housing including a lower case extension to support a semiconductor panel. The lower case extension is fixed in position within the outer case housing. An inner case housing having an upper case extension is disposed within the outer case housing in proximity to the lower case extension. A mechanism draws the upper case extension toward the lower case extension and locks the semiconductor panel in place between the upper case extension and lower case extension. The mechanism has a cam assembly disposed above the inner case housing and operatable with a handle to rotate the cam assembly and apply pressure to the inner case housing and upper case extension to lock the semiconductor panel in place between the upper case extension and lower case extension. A spring or other elastic mechanism is disposed under the inner case housing to load the pressure.

公开(公告)号：US11569136B2

公开(公告)日：2023-01-31

申请号：US16218823

申请日：2018-12-13

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Yaojian Lin ,  Kang Chen

IPC: H01L21/44 ,  H01L23/48 ,  H01L23/52 ,  H01L21/66 ,  H01L21/56 ,  H01L23/498 ,  H01L23/00 ,  H01L23/538 ,  H01L25/10 ,  H01L23/31 ,  H01L23/28 ,  H01L21/48 ,  H01L21/78

Abstract: A semiconductor device has a substrate with first and second conductive layers formed over first and second opposing surfaces of the substrate. A plurality of bumps is formed over the substrate. A semiconductor die is mounted to the substrate between the bumps. An encapsulant is deposited over the substrate and semiconductor die. A portion of the bumps extends out from the encapsulant. A portion of the encapsulant is removed to expose the substrate. An interconnect structure is formed over the encapsulant and semiconductor die and electrically coupled to the bumps. A portion of the substrate can be removed to expose the first or second conductive layer. A portion of the substrate can be removed to expose the bumps. The substrate can be removed and a protection layer formed over the encapsulant and semiconductor die. A semiconductor package is disposed over the substrate and electrically connected to the substrate.

公开(公告)号：US20220406675A1

公开(公告)日：2022-12-22

申请号：US17349135

申请日：2021-06-16

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： TaeKeun Lee ,  Youngcheol Kim ,  Youngmin Kim ,  Yongmin Kim

IPC: H01L23/367 ,  H01L23/498 ,  H01L23/373 ,  H01L21/48 ,  H01L23/00

Abstract: A semiconductor device has an electrical component and a first TIM with a first compliant property is disposed over a surface of the electrical component. A second TIM having a second compliant property greater than the first compliant property is disposed over the surface of the electrical component within the first TIM. A third TIM can be disposed over the surface of the electrical component along the first TIM. A heat sink is disposed over the first TIM and second TIM. The second TIM has a shape of a star pattern, grid of dots, parallel lines, serpentine, or concentric geometric shapes. The first TIM provides adhesion for joint reliability and the second TIM provides stress relief. Alternatively, a heat spreader is disposed over the first TIM and second TIM and a heat sink is disposed over a third TIM and fourth TIM on the heat spreader.

公开(公告)号：US20220392795A1

公开(公告)日：2022-12-08

申请号：US17339210

申请日：2021-06-04

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Hyeonchul Lee ,  Kyounghee Park ,  Kyunghwan Kim

IPC: H01L21/673

Abstract: A semiconductor manufacturing equipment has an outer case housing including a lower case extension to support a semiconductor panel. The lower case extension is fixed in position within the outer case housing. An inner case housing having an upper case extension is disposed within the outer case housing in proximity to the lower case extension. A mechanism draws the upper case extension toward the lower case extension and locks the semiconductor panel in place between the upper case extension and lower case extension. The mechanism has a cam assembly disposed above the inner case housing and operatable with a handle to rotate the cam assembly and apply pressure to the inner case housing and upper case extension to lock the semiconductor panel in place between the upper case extension and lower case extension. A spring or other elastic mechanism is disposed under the inner case housing to load the pressure.

公开(公告)号：US20220375886A1

公开(公告)日：2022-11-24

申请号：US17817481

申请日：2022-08-04

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Pandi Chelvam Marimuthu ,  Andy Chang Bum Yong ,  Aung Kyaw Oo ,  Yaojian Lin

IPC: H01L23/66 ,  H01L21/48 ,  H01L23/498 ,  H01L21/56 ,  H01L23/522 ,  H01L23/528 ,  H01L23/00 ,  H01L23/538 ,  H01L23/552 ,  H01L21/683

Abstract: A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first conductive layer is formed with an antenna over a first surface of the encapsulant. A second conductive layer is formed with a ground plane over a second surface of the encapsulant with the antenna located within a footprint of the ground plane. A conductive bump is formed on the ground plane. A third conductive layer is formed over the first surface of the encapsulant. A fourth conductive layer is formed over the second surface of the encapsulant. A conductive via is disposed adjacent to the semiconductor die prior to depositing the encapsulant. The antenna is coupled to the semiconductor die through the conductive via. The antenna is formed with the conductive via between the antenna and semiconductor die. A PCB unit is disposed in the encapsulant.

公开(公告)号：US20220364222A1

公开(公告)日：2022-11-17

申请号：US17814796

申请日：2022-07-25

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： OhHan Kim ,  HunTeak Lee ,  SeIl Jung ,  HeeSoo Lee

IPC: C23C14/50 ,  H01L23/00 ,  H01L23/498 ,  H01L23/552 ,  C23C14/34

Abstract: A semiconductor manufacturing device has a cooling pad with a plurality of movable pins. The cooling pad includes a fluid pathway and a plurality of springs disposed in the fluid pathway. Each of the plurality of springs is disposed under a respective movable pin. A substrate includes an electrical component disposed over a surface of the substrate. The substrate is disposed over the cooling pad with the electrical component oriented toward the cooling pad. A force is applied to the substrate to compress the springs. At least one of the movable pins contacts the substrate. A cooling fluid is disposed through the fluid pathway.

公开(公告)号：US20220359420A1

公开(公告)日：2022-11-10

申请号：US17314916

申请日：2021-05-07

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  KyoungHee Park ,  SeongHwan Park ,  JinHee Jung

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/66 ,  H01Q1/22 ,  H01L21/56 ,  H01L21/48

Abstract: A semiconductor device has a first package layer. A first shielding layer is formed over the first package layer. The first shielding layer is patterned to form a redistribution layer. An electrical component is disposed over the redistribution layer. An encapsulant is deposited over the electrical component. A second shielding layer is formed over the encapsulant. The second shielding layer is patterned. The patterning of the first shielding layer and second shielding layer can be done with a laser. The second shielding layer can be patterned to form an antenna.