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公开(公告)号:US20230178449A1
公开(公告)日:2023-06-08
申请号:US17643023
申请日:2021-12-07
Applicant: GlobalFoundries U.S. Inc.
Inventor: Mark D. Levy , Rajendran Krishnasamy , Michael J. Zierak , Siva P. Adusumilli
IPC: H01L23/367 , H01L29/732 , H01L23/373 , H01L29/417
CPC classification number: H01L23/367 , H01L29/7325 , H01L23/3736 , H01L29/41708
Abstract: A structure includes an electrical device, and an active contact landed on a portion of the electrical device. The active contact includes a first body of a first material. A thermal dissipation pillar is adjacent the active contact and unlanded on but over the portion of the electrical device. The thermal dissipation pillar includes a second body of a second material having a higher thermal conductivity than the first material. The thermal dissipation pillar may be in thermal communication with a wire in a dielectric layer over the active contact and the thermal dissipation pillar. The electrical device can be any integrated circuit device that generates heat.
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公开(公告)号:US11646348B2
公开(公告)日:2023-05-09
申请号:US17473164
申请日:2021-09-13
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: John J. Pekarik , Vibhor Jain
IPC: H01L29/10 , H01L29/66 , H01L29/08 , H01L29/737
CPC classification number: H01L29/1004 , H01L29/0817 , H01L29/66242 , H01L29/7371
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a heterojunction bipolar transistor and methods of manufacture. The structure includes: a sub-collector region; a collector region above the sub-collector region; an intrinsic base region composed of intrinsic base material located above the collector region; an emitter located above and separated from the intrinsic base material; and a raised extrinsic base having a stepped configuration and separated from and self-aligned to the emitter.
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公开(公告)号:US11644695B2
公开(公告)日:2023-05-09
申请号:US17091394
申请日:2020-11-06
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Yusheng Bian
CPC classification number: G02F1/011 , G02F1/0102 , G02F1/0126 , G02F1/0147
Abstract: Structures including an edge coupler and methods of fabricating a structure including an edge coupler. The edge coupler includes a waveguide core having an end surface that terminates proximate to an edge of a substrate. The waveguide core contains a material having a first state with a first refractive index in response to an applied stimulus and a second state with a second refractive index different from the first refractive index.
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公开(公告)号:US11637181B2
公开(公告)日:2023-04-25
申请号:US17509327
申请日:2021-10-25
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Vibhor Jain , Alvin J. Joseph , Alexander Derrickson , Judson R. Holt , John J. Pekarik
IPC: H01L29/08 , H01L29/735 , H01L29/66 , H01L29/417
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to lateral bipolar transistors and methods of manufacture. The structure includes: an extrinsic base comprising semiconductor material; an intrinsic base comprising semiconductor material which is located below the extrinsic base; a polysilicon emitter on a first side of the extrinsic base; a raised collector on a second side of the extrinsic base; and sidewall spacers on the extrinsic base which separate the extrinsic base from the polysilicon emitter and the raised collector.
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公开(公告)号:US20230117802A1
公开(公告)日:2023-04-20
申请号:US18083716
申请日:2022-12-19
Applicant: GlobalFoundries U.S. Inc.
Inventor: Yusheng Bian , Roderick A. Augur , Kenneth J. Giewont , Karen Nummy
Abstract: Structures for an edge coupler and methods of forming a structure for an edge coupler. The structure includes a waveguide core over a dielectric layer, and a back-end-of-line stack over the waveguide core and the dielectric layer. The back-end-of-line stack includes an interlayer dielectric layer, a side edge, a first feature, a second feature, and a third feature laterally arranged between the first feature and the second feature. The first feature, the second feature, and the third feature are positioned on the interlayer dielectric layer adjacent to the side edge, and the third feature has an overlapping relationship with a tapered section of the waveguide core.
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公开(公告)号:US11621035B1
公开(公告)日:2023-04-04
申请号:US17447841
申请日:2021-09-16
Applicant: GlobalFoundries U.S. Inc.
Inventor: Vivek Raj , Vinayak Rajendra Ganji , Shivraj Gurpadappa Dharne
IPC: G11C8/10 , G11C11/418 , G11C11/419 , G11C8/08 , G11C7/10
Abstract: Embodiments of the present disclosure provide a memory circuit structure including a transistor array for writing a plurality of bits to a memory element. The transistor array includes a first transistor having a first source/drain terminal for receiving a supply voltage. A first word line is coupled between a decoder and the first source/drain terminal of the first transistor. The first word line transmits a voltage output from the decoder to the first transistor as the supply voltage.
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公开(公告)号:US20230097528A1
公开(公告)日:2023-03-30
申请号:US17448804
申请日:2021-09-24
Applicant: GlobalFoundries U.S. Inc.
Inventor: Aboketaf Abdelsalam , Yusheng Bian
IPC: G02B6/27
Abstract: Embodiments of the disclosure provide an optical polarizer with a varying vertical thickness, and methods to form the same. An optical polarizer according to the disclosure may include a first waveguide core over a semiconductor substrate. A first cladding material is on at least an upper surface of the first waveguide core. A second waveguide core over the first waveguide core and above the first cladding material. The second waveguide core includes a first segment having a vertical thickness that varies along a length of the first segment. A second cladding material is at least partially surrounding the second waveguide core. Transfer of one of a transverse electric (TE) mode signal and a transverse magnetic (TM) mode signal from the first waveguide core to the second waveguide core occurs between the first segment of the second waveguide core and the first waveguide core.
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公开(公告)号:US11616127B2
公开(公告)日:2023-03-28
申请号:US17650854
申请日:2022-02-13
Applicant: GlobalFoundries U.S. Inc.
Inventor: Johnatan Avraham Kantarovsky , Rajendran Krishnasamy , Siva P. Adusumilli , Steven Bentley , Michael Joseph Zierak , Jeonghyun Hwang
IPC: H01L29/40 , H01L29/778 , H01L29/66 , H01L29/423 , H01L29/78 , H01L29/417
Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to semiconductor devices having field plates that are arranged symmetrically around a gate. The present disclosure provides a semiconductor device including an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region and laterally between the source and drain electrodes, a first field plate between the source electrode and the gate, a second field plate between the drain electrode and the gate, in which the gate is spaced apart laterally and substantially equidistant from the first field plate and the second field plate.
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公开(公告)号:US11609379B2
公开(公告)日:2023-03-21
申请号:US17076358
申请日:2020-10-21
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Yangyang Liu , Tymon Barwicz
Abstract: Structures for managing light polarization on a photonics chip and methods of forming a structure for managing light polarization on a photonics chip. A single-mode waveguiding structure is formed that includes a first waveguide core region and a second waveguide core region positioned above the first waveguide core region. The second waveguide core region includes a first section, a second section connected to the first section, and a third section connected to the second section. The second section has a first width at an intersection with the first section and a second width at an intersection with the third section. The second width is greater than the first width. The first and second waveguide core regions contain materials of different composition.
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公开(公告)号:US20230083198A1
公开(公告)日:2023-03-16
申请号:US17475689
申请日:2021-09-15
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Yusheng Bian , Roderick A. Augur
IPC: G02B6/42
Abstract: Structures including an optical coupler and methods of fabricating a structure including an optical coupler. The structure includes a substrate, a first dielectric layer on the substrate, and an optical coupler having a first grating and a second grating. The first grating has a first plurality of segments positioned in a first level over the first dielectric layer. The second grating has a second plurality of segments positioned in a second level over the first dielectric layer. The second level differs in elevation above the first dielectric layer from the first level. The second plurality of segments are positioned in the second level to overlap with the first plurality of segments of the first grating, and the second plurality of segments comprise a metal. A second dielectric layer is positioned in a vertical direction between the first level and the second level.
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