公开(公告)号：US20080235939A1

公开(公告)日：2008-10-02

申请号：US12033851

申请日：2008-02-19

申请人： Siew S. Hiew ,  Charles C. Lee ,  Paul Hsueh ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： Siew S. Hiew ,  Charles C. Lee ,  Paul Hsueh ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H05K3/20 ,  G11C11/34

CPC分类号： H05K3/284 ,  H01L21/561 ,  H01L24/97 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/1815 ,  H05K1/117 ,  H05K3/0032 ,  H05K3/0052 ,  H05K2201/09154 ,  H05K2201/10159 ,  H05K2203/0228 ,  H05K2203/0746 ,  H05K2203/1316 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49171 ,  Y10T29/49789 ,  Y10T29/49798 ,  H01L2224/85 ,  H01L2924/00

摘要： A method for fabricating MicroSD devices includes forming a PCB panel having multiple PCB regions arranged in parallel rows. Passive components are attached by conventional surface mount technology (SMT) techniques. IC chips, including a MicroSD controller chip and a flash memory chip, are attached to the PCB by wire bonding or other chip-on-board (COB) technique. A molded layer is then formed over the IC chips and passive components using a mold that prevents formation of plastic on the upper surface of each PCB. The panel is then singulated using one of a laser cutting method, an abrasive water jet cutting method, and a mechanical grinding method such that the resulting PCB substrate and plastic housing have the width, height and length specified by MicroSD specifications. A front edge chamfer process is then performed.

摘要翻译： 一种用于制造MicroSD器件的方法包括形成具有平行排布置的多个PCB区域的PCB面板。 无源元件通过常规表面贴装技术（SMT）技术连接。 包括MicroSD控制器芯片和闪存芯片在内的IC芯片通过引线接合或其他芯片上的（COB）芯片技术连接到PCB。 然后使用防止在每个PCB的上表面上形成塑料的模具在IC芯片和无源部件上形成模制层。 然后使用激光切割方法，磨料水射流切割方法和机械研磨方法之一将面板切片，使得所得PCB基板和塑料外壳具有由MicroSD规格规定的宽度，高度和长度。 然后执行前沿倒角处理。

公开(公告)号：US20080215800A1

公开(公告)日：2008-09-04

申请号：US11926743

申请日：2007-10-29

申请人： Charles C. Lee ,  David Q. Chow ,  Abraham Chih-Kang Ma ,  I-Kang Yu ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  David Q. Chow ,  Abraham Chih-Kang Ma ,  I-Kang Yu ,  Ming-Shiang Shen

IPC分类号： G06F12/00

CPC分类号： G06F12/1416 ,  G06F3/0613 ,  G06F3/0643 ,  G06F3/0688 ,  G06F12/0246 ,  G06F12/0866 ,  G06F21/32 ,  G06F21/78 ,  G06F2212/2022 ,  G06F2212/7202 ,  G07C9/00087 ,  G11C2211/5641

摘要： Hybrid solid state drives (SSD) using a combination of single-level cell (SLC) and multi-level cell (MLC) flash memory arrays are described. According to one aspect of the present invention, a hybrid SSD is built using a combination SLC and MLC flash memory arrays. The SSD also includes a micro-controller to control and coordinate data transfer from a host computing device to either the SLC flash memory array of the MLC flash memory array. A memory selection indicator is determined by triaging data file based on one or more criteria, which include, but is not limited to, storing system files and user directories in the SLC flash memory array and storing user files in the MLC flash memory array; or storing more frequent access files in the SLC flash memory array, while less frequent accessed files in the MLC flash memory array.

摘要翻译： 描述了使用单级单元（SLC）和多级单元（MLC）闪存阵列的组合的混合固态驱动器（SSD）。 根据本发明的一个方面，使用组合SLC和MLC闪存阵列构建混合SSD。 SSD还包括一个微控制器，用于控制和协调从主机计算设备到MLC闪存阵列的SLC闪存阵列的数据传输。 存储器选择指示符通过基于一个或多个标准进行分类数据文件来确定，所述标准包括但不限于将系统文件和用户目录存储在SLC闪速存储器阵列中并将用户文件存储在MLC闪速存储器阵列中; 或将更频繁的访问文件存储在SLC闪存阵列中，而在MLC闪存阵列中访问的文件较少。

公开(公告)号：US20080071978A1

公开(公告)日：2008-03-20

申请号：US11929847

申请日：2007-10-30

申请人： David Q. Chow ,  Frank I. Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Frank I. Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F2212/7202 ,  G06F2212/7208 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

摘要翻译： 电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

公开(公告)号：US20080010465A1

公开(公告)日：2008-01-10

申请号：US11901055

申请日：2007-09-13

申请人： Ming-Shiang Shen

发明人： Ming-Shiang Shen

IPC分类号： H04K1/00

CPC分类号： G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data storage medium is adapted to be accessed by a data terminal, and includes a processing unit connected to a memory device that stores a data file and security reference data possessed by a person authorized to access the data file, and an input-output interface circuit activable so as to establish communication with the data terminal. The processing unit is operable selectively in a programming mode and a data retrieving mode. The electronic data storage medium also includes a function key set for manually switching the electronic data storage medium between the programming mode and the data retrieving mode.

公开(公告)号：US20080005584A1

公开(公告)日：2008-01-03

申请号：US11900940

申请日：2007-09-13

申请人： Ming-Shiang Shen

发明人： Ming-Shiang Shen

IPC分类号： H04K1/00

CPC分类号： G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data storage medium is adapted to be accessed by a data terminal, and includes a processing unit connected to a memory device that stores a data file and security reference data possessed by a person authorized to access the data file, and an input-output interface circuit activable so as to establish communication with the data terminal. The processing unit is operable selectively in a programming mode and a data retrieving mode. The electronic data storage medium also includes a function key set for manually switching the electronic data storage medium between the programming mode and the data retrieving mode.

摘要翻译： 电子数据存储介质适于被数据终端访问，并且包括连接到存储设备的处理单元，存储设备存储被授权访问数据文件的人所拥有的数据文件和安全参考数据，以及输入输出 接口电路可激活，以建立与数据终端的通信。 处理单元在编程模式和数据检索模式中有选择地操作。 电子数据存储介质还包括用于在编程模式和数据检索模式之间手动切换电子数据存储介质的功能键。

公开(公告)号：US20080005471A1

公开(公告)日：2008-01-03

申请号：US11466759

申请日：2006-08-23

申请人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F21/79 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

摘要翻译： 电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

公开(公告)号：US20070300030A1

公开(公告)日：2007-12-27

申请号：US11849342

申请日：2007-09-03

申请人： Ming-Shiang Shen

发明人： Ming-Shiang Shen

IPC分类号： G06F12/14

CPC分类号： G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data storage medium is adapted to be accessed by a data terminal, and includes a processing unit connected to a memory device that stores a data file and security reference data possessed by a person authorized to access the data file, and an input-output interface circuit activable so as to establish communication with the data terminal. The processing unit is operable selectively in a programming mode and a data retrieving mode. The electronic data storage medium also includes a function key set for manually switching the electronic data storage medium between the programming mode and the data retrieving mode.

公开(公告)号：US08108590B2

公开(公告)日：2012-01-31

申请号：US12139842

申请日：2008-06-16

申请人： David Q. Chow ,  Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F21/32 ,  G06F21/78 ,  G06F2212/1036 ,  G06F2212/7202 ,  G06F2212/7208 ,  G06K19/07 ,  G06K19/07354

摘要： A flash system has multiple channels of flash memory chips that can be accessed in parallel. Host data is assigned to one of the channels by a multi-channel controller processor and accumulated in a multi-channel page buffer. When a page boundary in the page buffer is reached, the page buffer is written to a target physical block if full, or combined with old data fragments in an Aggregating Flash Block (AFB) when the logical-sector addresses (LSA's) match. Thus small fragments are aggregated using the AFB, reducing erases and wear of flash blocks. The page buffer is copied to the AFB when a STOP command occurs. Each channel has one or more AFB's, which are tracked by an AFB tracking table.

摘要翻译： 闪存系统具有可以并行访问的多个闪存芯片的通道。 主机数据被多通道控制器处理器分配给一个通道，并且累积在多通道页缓冲器中。 当到达页面缓冲区中的页面边界时，如果逻辑扇区地址（LSA）匹配，则页缓冲区将被写入目标物理块（如果已满）或与聚合闪存块（AFB）中的旧数据片段组合。 因此，使用AFB聚集小片段，减少闪存块的擦除和磨损。 发生STOP命令时，页面缓冲区被复制到AFB。 每个通道都有一个或多个AFB，它们由AFB跟踪表进行跟踪。

公开(公告)号：US07953931B2

公开(公告)日：2011-05-31

申请号：US12035398

申请日：2008-02-21

申请人： I-Kang Yu ,  David Q. Chow ,  Charles C. Lee ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

发明人： I-Kang Yu ,  David Q. Chow ,  Charles C. Lee ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/12

CPC分类号： G06F13/161 ,  G06F12/0246 ,  G06F12/0862 ,  G06F12/123 ,  G06F2212/7203 ,  G11C11/5621 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2211/5641 ,  G11C2211/5643

摘要： High endurance non-volatile memory devices (NVMD) are described. A high endurance NVMD includes an I/O interface, a NVM controller, a CPU along with a volatile memory subsystem and at least one non-volatile memory (NVM) module. The volatile memory cache subsystem is configured as a data cache subsystem. The at least one NVM module is configured as a data storage when the NVMD is adapted to a host computer system. The I/O interface is configured to receive incoming data from the host to the data cache subsystem and to send request data from the data cache subsystem to the host. The at least one NVM module may comprise at least first and second types of NVM. The first type comprises SLC flash memory while the second type MLC flash. The first type of NVM is configured as a buffer between the data cache subsystem and the second type of NVM.

摘要翻译： 描述了高耐久性非易失性存储器件（NVMD）。 高耐久性NVMD包括I / O接口，NVM控制器，CPU以及易失性存储器子系统和至少一个非易失性存储器（NVM）模块。 易失性存储器缓存子系统被配置为数据高速缓存子系统。 当NVMD适用于主机系统时，至少一个NVM模块被配置为数据存储器。 I / O接口被配置为从主机接收数据缓存子系统的传入数据，并将请求数据从数据缓存子系统发送到主机。 至少一个NVM模块可以包括至少第一和第二类型的NVM。 第一种类型包括SLC闪存，而第二种类型的MLC闪存。 NVM的第一种类型被配置为数据高速缓存子系统和第二类NVM之间的缓冲区。

公开(公告)号：US07890846B2

公开(公告)日：2011-02-15

申请号：US11739613

申请日：2007-04-24

申请人： Charles C. Lee ,  I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H03M13/00

CPC分类号： H03M13/1545 ,  G06F11/1068 ,  G06F11/1076 ,  H03M13/153 ,  H03M13/1535 ,  H03M13/6561

摘要： One embodiment of the present includes a electronic data storage card having a Reed Solomon (RS) decoder having a syndrome calculator block responsive to a page of information, the page being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections. The syndrome calculator generates a syndrome for each of the data sections. The decoder further includes a root finder block responsive to the calculated syndrome and for generating at least two roots, a polynomial calculator block responsive to the at least two roots and operative to generate at least one error address, identifying a location in the data wherein the error lies, and an error symbol values calculator block coupled to the root finder and the polynomial calculator block and for generating a second error address, identifying a second location in the data wherein the error(s) lie.

摘要翻译： 本发明的一个实施例包括具有Reed Solomon（RS）解码器的电子数据存储卡，该解码器具有响应于信息页的校正子计算器块，该页被组织成多个数据段，并且开销被组织成多个 架空部分。 综合征计算器为每个数据部分产生综合征。 解码器还包括响应于所计算的校正子并用于生成至少两个根的根取景器块，响应于至少两个根并且可操作地生成至少一个错误地址的多项式计算器块，识别数据中的位置，其中， 并且错误符号值计算器块耦合到根查找器和多项式计算器块，并用于产生第二错误地址，识别错误所在的数据中的第二位置。