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公开(公告)号:US20220293500A1
公开(公告)日:2022-09-15
申请号:US17199025
申请日:2021-03-11
Applicant: Mellanox Technologies, Ltd.
Inventor: Pavel Vilner , Dmitry Fliter , Jacov Brener
IPC: H01L23/498 , H01L23/31 , H05K3/34
Abstract: Embodiments are disclosed for providing a ball grid array pattern for an integrated circuit. An example integrated circuit apparatus includes an integrated circuit and a ball grid array. The integrated circuit includes at least a package substrate and a silicon chip. The ball grid array is disposed on the package substrate of the integrated circuit. The ball grid array includes a first set of solder balls that is configured to provide electrical connections for communication channels and a second set of the solder balls associated with an electrical ground. The first set of solder balls includes a first subset of solder balls configured in a first orientation and a second subset of solder balls configured in a second orientation. Furthermore, at least one solder ball from the second set of the solder balls is disposed between the first subset of solder balls and the second subset of solder balls.
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公开(公告)号:US20220283973A1
公开(公告)日:2022-09-08
申请号:US17636484
申请日:2019-08-21
Applicant: Mellanox Technologies, Ltd.
Inventor: Dotan LEVI , Elad MENTOVICH , Ran RAVID , Roee SHAPIRO , Avraham GANOR , Paraskevas BAKOPOULOS , Dimitrios KALAVROUZIOTIS
Abstract: Apparatuses, systems, and associated methods of manufacturing are described that provide a dynamic data interconnect and networking cable configuration. The dynamic data interconnect includes a substrate, transmitters supported on the substrate configured to generate signals, and receivers supported on the substrate configured to receive signals. The dynamic data interconnect further includes a number of connection pads that receive data cables attached thereto and a number of transmission lanes that operably couple the transmitters and receivers to the connection pads. The dynamic data interconnect further includes transmission circuitry in communication with each of the transmitters and receivers such that, in an operational configuration, the transmission circuitry determines a transmission state of the dynamic data interconnect and selectively disables operation of at least a portion of the transmitters or at least a portion of the receivers.
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公开(公告)号:US20220283964A1
公开(公告)日:2022-09-08
申请号:US17189303
申请日:2021-03-02
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Idan Burstein , Dotan David Levi , Ariel Shahar , Lior Narkis , Igor Voks , Noam Bloch , Shay Aisman
IPC: G06F13/16 , G06F13/38 , G06F13/42 , G06F12/1045 , G06F15/173 , G06F9/46 , G06F9/455
Abstract: A computing system includes at least one peripheral bus, a peripheral device connected to the at least one peripheral bus, at least one memory, and first and second system components. The first system component is (i) associated with a first address space in the at least one memory and (ii) connected to the peripheral device via the at least one peripheral bus. The second system component is (i) associated with a second address space in the at least one memory and (ii) connected to the peripheral device via the at least one peripheral bus. The first system component is arranged to cause the peripheral device to access the second address space that is associated with the second system component.
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公开(公告)号:US20220276452A1
公开(公告)日:2022-09-01
申请号:US17649849
申请日:2022-02-03
Applicant: Mellanox Technologies, Ltd.
Inventor: Barak Freedman , Henning Lysdal , Amir Silber , Nizan Meitav
IPC: G02B6/42
Abstract: Various embodiments of silicon photonic (SiP) chips are provided that are configured for backside or frontside optical fiber coupling. An SiP chip includes a photonic integrated circuit formed on a first surface of a first substrate. The photonic integrated circuit includes at least one optical component and at least one coupling element. The at least one optical component is configured to propagate an optical signal therethrough in a waveguide propagation direction that is substantially parallel to a plane defined by the first surface. The at least one coupling element is configured to couple an optical signal propagating along an optical path transverse to the waveguide propagation direction into the at least one optical component to enable the backside or frontside coupling of an optical fiber to the SiP chip.
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公开(公告)号:US11418422B1
公开(公告)日:2022-08-16
申请号:US17169591
申请日:2021-02-08
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Amir Dabbagh , Eran Notkin , Albert Gorshtein , Nir Sheffi
IPC: H04L43/0888 , H04L47/11 , H04L47/10 , H04L43/0811 , H04L25/02 , H04L43/16
Abstract: A rate Detection Apparatus (RDA) includes a power spectral density (PSD) estimator and a rate selector. The PSD estimator is configured to receive samples of a signal, and to estimate a PSD of the signal. The rate selector is configured to identify a transmission rate of the signal responsively to the estimated PSD.
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公开(公告)号:US20220244471A1
公开(公告)日:2022-08-04
申请号:US17162471
申请日:2021-01-29
Applicant: Mellanox Technologies, Ltd.
Inventor: Nimer KHAZEN , Alon ROKACH
Abstract: Optical splitting adaptors and associated methods of manufacturing are provided. An example optical splitting adaptor includes a first connector housing that interfaces with a first optical transceiver having a first data rate, and the first connector housing accommodates a first type multi-fiber ferrule of a first number of fibers. The example optical splitting adaptor also includes a second connector housing that defines dual receptacles for interfacing with a second optical transceiver and a third optical transceiver, and the dual receptacles receive respective multi-fiber ferrules. The example optical splitting adaptor further includes a plurality of fibers operably connecting the first connector housing and the second connector housing such that, in operation, the plurality of fibers perform optical splitting between the first type multi-fiber ferrule of the first connector housing and the multi-fiber ferrules received by the dual receptacles of the second connector housing.
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公开(公告)号:US11388263B2
公开(公告)日:2022-07-12
申请号:US17067690
申请日:2020-10-11
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dotan David Levi , Daniel Marcovitch , Lior Narkis , Avi Urman
IPC: H04L49/90 , H04L67/5681 , H04W72/12
Abstract: A Network-Connected Device (NCD) includes a network interface, a host interface, an NCD memory and an NCD processor. The network interface is configured for communicating over a network. The host interface is configured for communicating with a host. The NCD memory is configured to buffer packet information that originates from the host and pertains to a packet to be transmitted to the network at a specified transmission time. The NCD processor is configured to process the buffered packet information before the specified transmission time, and to transmit the packet to the network at the specified time. Processing of the packet information and transmission of the packet are decoupled from buffering of the packet information.
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公开(公告)号:US20220209943A1
公开(公告)日:2022-06-30
申请号:US17227321
申请日:2021-04-11
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dimitrios Syrivelis , Paraskevas Bakopoulos , Ioannis (Giannis) Patronas , Elad Mentovich , Dotan David Levi
Abstract: In one embodiment, a secure computing system comprises a key generation sub-system configured to generate cryptographic keys and corresponding key labels for distribution to computer dusters, each computer cluster including a plurality of respective endpoints, a plurality of quantum key distribution (QKD) devices connected via respective optical fiber connections, and configured to securely distribute the generated cryptographic keys among the computer clusters, and a key orchestration sub-system configured to manage caching of the cryptographic keys in advance of receiving key requests from applications running on ones of the endpoints, and provide respective ones of the cryptographic keys to the applications to enable secure communication among the applications.
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公开(公告)号:US20220200859A1
公开(公告)日:2022-06-23
申请号:US17129978
申请日:2020-12-22
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Ido Gilboa , Shay Aisman , Sagi Arieli , Oren Vaserberger , Amit Mandelbaum , Doron Haritan Kazakov , Natali Shechtman , Iftah Levi , Amir Ancel
IPC: H04L12/24 , H04L12/841
Abstract: A network device (ND) includes packet processing circuitry and performance optimization circuitry. The packet processing circuitry is connected to a network and is configured to process communication packets for communicating over the network. The packet processing circuitry includes a plurality of configuration registers for setting one or more operation parameters of the ND. The performance optimization circuitry is configured to improve a performance measure of the ND by iteratively calculating the performance measure and adjusting values of one or more of the configuration registers based on the performance measure.
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公开(公告)号:US11368768B2
公开(公告)日:2022-06-21
申请号:US16823387
申请日:2020-03-19
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Paraskevas Bakopoulos , Ioannis (Giannis) Patronas , Eitan Zahavi , Elad Mentovich
Abstract: In one embodiment, an optical network system including a plurality of optical switches configured to switch beams of light which are modulated to carry information, a plurality of host computers comprising respective optical network interface controllers (NICs), optical fibers connecting the optical NICs and the optical switches forming an optically-switched communication network, over which optical circuit connections are established between pairs of the optical NICs over ones of the optical fibers via ones of the optical switches, the optically-switched communication network which including the optical NICs and the optical switches.
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