公开(公告)号：US06710669B2

公开(公告)日：2004-03-23

申请号：US10134897

申请日：2002-04-29

Applicant: Eiichi Hasegawa ,  Kazuhisa Oyama

Inventor： Eiichi Hasegawa ,  Kazuhisa Oyama

IPC: H03B100

CPC classification number: H03B5/06 ,  H03B2201/0208 ,  H03B2201/025

Abstract: To provide a voltage controlled oscillator having a large variable width of oscillation frequency while ensuring oscillation starting performance, a P-channel MOS transistor Tr is made ON by detecting that an oscillation signal is provided with a predetermined amplitude value and oscillating operation is shifted from an initial state to a steady state by a detecting circuit OPC and a capacitor CA is connected in series with a series circuit constituted by a crystal resonator XL and a varicap diode CV. In the initial state, a load capacitance is reduced to thereby cancel an amount of reducing conductance gm of an oscillation amplifying portion to correspond to operation of the crystal resonator by a low amplitude and negative resistance necessary for maintaining excellent oscillation starting performance is provided and in the steady state, a width of changing the oscillation frequency is enlarged by enhancing an effect of the varicap diode CV.

Abstract translation: 为了提供振荡频率可变宽度大的压控振荡器，同时确保振荡起动性能，通过检测到振荡信号被设置有预定的振幅值，使P沟道MOS晶体管Tr成为导通，并且振荡操作从 由检测电路OPC和电容器CA的初始状态稳定状态与由晶体谐振器XL和变容二极管CV构成的串联电路串联连接。 在初始状态下，减小负载电容从而抵消振荡放大部分的电导率gm的减小量，以便与振荡放电部分的运行相对应，并且保持优异的振荡开始性能所需的低振幅和负电阻，并且在 通过增加变容二极管CV的影响，稳定状态，改变振荡频率的宽度被扩大。

公开(公告)号：US20030224747A1

公开(公告)日：2003-12-04

申请号：US10303384

申请日：2002-11-25

Applicant: Broadcom Corporation, a California Corporation

Inventor： Seema Butala Anand

IPC: H04B001/16

CPC classification number: H03L7/099 ,  H03B2201/025 ,  H03J2200/10 ,  H03L7/0891 ,  H03L7/10 ,  H03L7/187 ,  H04B1/30 ,  H04B1/408

Abstract: A phase-locked loop circuit includes an array of selectable capacitors formed within the phase-locked loop circuit to enable the phase-locked loop circuit to provide a degree of coarse frequency control by adding or removing capacitors and a degree of fine frequency control by sinking or sourcing current from a charge pump into a loop filter. A finite state machine is provided within a voltage controlled oscillator calibration circuit that communicates with an external baseband processor to initiate a calibration process, and further to determine how many capacitors of an array of capacitors if formed within the phase-locked loop circuit should be coupled to provide the coarse frequency control.

Abstract translation: 锁相环电路包括形成在锁相环电路内的可选择电容阵列，以使得锁相环电路能够通过添加或除去电容器提供一定程度的粗略频率控制，并通过下沉提供一定程度的精细频率控制 或将电流从电荷泵送入环路滤波器。 在压控振荡器校准电路内提供有限状态机，该校准电路与外部基带处理器进行通信以启动校准过程，并进一步确定如果在锁相环电路内形成的电容器阵列中的多个电容器应当耦合 提供粗略的频率控制。

公开(公告)号：US20030194973A1

公开(公告)日：2003-10-16

申请号：US10420167

申请日：2003-04-21

Applicant: BridgeWave Communications, Inc.

Inventor： Eliezer Pasternak

IPC: H04B001/40

CPC classification number: H04B1/18 ,  H03B2201/0208 ,  H03B2201/025

Abstract: A tunable element in the microwave frequency range is described that may include one or more tunable elements that are directly digitally controlled by a digital bus connecting a digital control circuit to each controlled element. In particular, each digital signal is filtered by a digital isolation technique so that the signal reaches the tunable elements with very low noise. The low noise digital signals are then converted to analog control voltages. The direct D/A conversion is accomplished by a special D/A converter which is manufactured as an integral part of a substrate. This D/A converter in accordance with the invention may consist of a resistor ladder or a directly digitally controlled capacitor. The direct digitally controlled capacitor may be a cantilevered type capacitor having multiple separate electrodes or sub-plates representing binary bits that may be used to control the capacitor. A low cost microwave oscillator is disclosed in which some of the filters and oscillators are direct digitally tuned elements.

公开(公告)号：US20030137356A1

公开(公告)日：2003-07-24

申请号：US10052856

申请日：2002-01-18

Applicant: Broadcom Corporation

Inventor： Mike Kappes ,  Terje Gloerstad

IPC: H03L007/00 ,  H03B005/20

CPC classification number: H03L7/00 ,  H03B2201/0208 ,  H03B2201/025 ,  H03K3/0231

Abstract: An integrated oscillator that may be used as a time clock includes circuitry that oscillates about an RC time constant, which RC time constant is adjustable to provide a desired frequency of oscillation. More specifically, the oscillator includes a capacitor array that has a plurality of capacitors coupled in parallel wherein each capacitor may be selectively included into the RC time constant or selectively excluded there from. Rather than setting the capacitance values to a desired capacitance value, a system for adjusting the time constant includes circuitry for measuring an output frequency and for comparing that to a certified frequency source wherein the time constant is adjusted by adding or removing capacitors from the capacitor array until the frequency of the internal clock matches an expected frequency.

Abstract translation: 可用作时钟的集成振荡器包括围绕RC时间常数振荡的电路，RC时间常数可调，以提供期望的振荡频率。 更具体地说，振荡器包括电容器阵列，其具有并联耦合的多个电容器，其中每个电容器可被选择性地包括在RC时间常数中或者选择性地被包括在其中。 不是将电容值设置为期望的电容值，而是用于调整时间常数的系统包括用于测量输出频率并将其与经认证的频率源进行比较的电路，其中通过从电容器阵列中添加或去除电容器来调整时间常数 直到内部时钟的频率与预期频率相匹配。

公开(公告)号：US20020158701A1

公开(公告)日：2002-10-31

申请号：US09936322

申请日：2002-01-14

Inventor： Terumoto Akatsuka

IPC: H03B001/00

CPC classification number: H03B5/1231 ,  H03B5/1209 ,  H03B5/1243 ,  H03B5/1262 ,  H03B2201/025

Abstract: An object of the present invention is to provide a multi-band voltage-controlled oscillator in which switching means can certainly be turned on and off. For achieving the above object, the oscillator of the present invention includes a negative source generator (67) coupled to an output of a buffer transistor (22) from which an oscillation frequency of an oscillating transistor (21) is released, switching means (40) for selectively switching between an output of the negative source generator (67) and a positive power source, and mode switching means (66) receiving an output frequency switching signal from the outside. An output of the switching means (40) controls an opening and short-circuiting operation of first switching means (38a) to selectively release oscillation outputs in a low frequency band and high frequency band from an output port (49).

Abstract translation: 本发明的目的是提供一种多频带压控振荡器，其中切换装置当然可以被接通和断开。 为了实现上述目的，本发明的振荡器包括耦合到缓冲晶体管（22）的输出端的负电源发生器（67），摆放晶体管（21）的振荡频率从该缓冲晶体管的输出释放，切换装置 ），用于选择性地切换负源发生器（67）的输出与正电源之间，以及从外部接收输出频率切换信号的模式切换装置（66）。 开关装置（40）的输出控制第一开关装置（38a）的断开和短路操作，以选择性地从输出端口（49）释放低频带和高频带中的振荡输出。

公开(公告)号：US06433658B1

公开(公告)日：2002-08-13

申请号：US09542183

申请日：2000-04-04

Applicant: Ali Rastegar

Inventor： Ali Rastegar

IPC: H03J320

CPC classification number: H03F1/56 ,  H03B5/08 ,  H03B2201/0208 ,  H03B2201/025 ,  H03B2201/0266 ,  H03F3/191 ,  H03J1/0008 ,  H03J5/246 ,  H03J2200/10 ,  H03M1/804

Abstract: A structure (110, 150) for enhancing the quality factor (Q) of a capacitive circuit (112, 152). The capacitive circuit (112, 152) includes a first resistance (122, 164), a capacitance (124, 166), and a second resistance (126, 168). The capacitance (124, 166) represents the net capacitance of the capacitive circuit (112, 152), and the first resistance (122, 164) and second resistance (126, 168) represent elements of the intrinsic resistance of the capacitive circuit (112, 152). In a one embodiment the structure (110) includes a first capacitor (128) which is connected in parallel with the capacitive circuit (112), and second capacitor (130) which is connected in series with the capacitive circuit (112). In a second embodiment the structure (150) includes a first inductor (164), connected in series between the capacitive circuit (152) and a node (162) where the first capacitor (174) and one end of the second capacitor (176) connect, and a second inductor (172) connected in series between the capacitive circuit (152) and the other end of the second capacitor (130).

Abstract translation: 一种用于增强电容电路（112,152）的品质因数（Q）的结构（110,150）。 电容电路（112,152）包括第一电阻（122,164），电容（124,166）和第二电阻（126,168）。 电容（124,166）表示电容电路（112,152）的净电容，第一电阻（122,164）和第二电阻（126,168）表示电容电路（112）的固有电阻的元件 ，152）。 在一个实施例中，结构（110）包括与电容电路（112）并联连接的第一电容器（128）和与电容电路（112）串联连接的第二电容器（130）。 在第二实施例中，结构（150）包括串联连接在电容电路（152）和节点（162）之间的第一电感器（164），其中第一电容器（174）和第二电容器（176）的一端 连接，并且串联连接在电容电路（152）和第二电容器（130）的另一端之间的第二电感器（172）。

公开(公告)号：US20020060601A1

公开(公告)日：2002-05-23

申请号：US09542183

申请日：2000-04-04

Inventor： Ali Rastegar

IPC: G05F003/02

CPC classification number: H03F1/56 ,  H03B5/08 ,  H03B2201/0208 ,  H03B2201/025 ,  H03B2201/0266 ,  H03F3/191 ,  H03J1/0008 ,  H03J5/246 ,  H03J2200/10 ,  H03M1/804

Abstract: A structure (110, 150) for enhancing the quality factor (Q) of a capacitive circuit (112, 152). The capacitive circuit (112, 152) includes a first resistance (122, 164), a capacitance (124, 166), and a second resistance (126, 168). The capacitance (124, 166) represents the net capacitance of the capacitive circuit (112, 152), and the first resistance (122, 164) and second resistance (126, 168) represent elements of the intrinsic resistance of the capacitive circuit (112, 152). In a one embodiment the structure (110) includes a first capacitor (128) which is connected in parallel with the capacitive circuit (112), and second capacitor (130) which is connected in series with the capacitive circuit (112). In a second embodiment the structure (150) includes a first inductor (164), connected in series between the capacitive circuit (152) and a node (162) where the first capacitor (174) and one end of the second capacitor (176) connect, and a second inductor (172) connected in series between the capacitive circuit (152) and the other end of the second capacitor (130).

Abstract translation: 一种用于增强电容电路（112,152）的品质因数（Q）的结构（110,150）。 电容电路（112,152）包括第一电阻（122,164），电容（124,166）和第二电阻（126,168）。 电容（124,166）表示电容电路（112,152）的净电容，第一电阻（122,164）和第二电阻（126,168）表示电容电路（112）的固有电阻的元件 ，152）。 在一个实施例中，结构（110）包括与电容电路（112）并联连接的第一电容器（128）和与电容电路（112）串联连接的第二电容器（130）。 在第二实施例中，结构（150）包括串联连接在电容电路（152）和节点（162）之间的第一电感器（164），其中第一电容器（174）和第二电容器（176）的一端 连接，并且串联连接在电容电路（152）和第二电容器（130）的另一端之间的第二电感器（172）。

公开(公告)号：US06356135B1

公开(公告)日：2002-03-12

申请号：US09490599

申请日：2000-01-25

Applicant: Ali Rastegar

Inventor： Ali Rastegar

IPC: G06F718

CPC classification number: H03B5/08 ,  H03B2201/0208 ,  H03B2201/025 ,  H03B2201/0266 ,  H03F3/191 ,  H03J1/0008 ,  H03J2200/10 ,  H03M1/804

Abstract: An electronically trimable capacitor (10) having a plurality of branch circuits (30) each including a capacitor (32) which may be selectively controlled by a switch (34) to contribute or not to the net capacitance exhibited by the trimable capacitor (10). Operation of the switches (34) is under direction of an interface (36), which can receive a program signal containing digital instruction for programming via a program terminal (22). An optional memory (38) permits storing a program of states for the switches (34), so that the interface (36) maybe instructed to reset the switches (34) and thus cause the trimable capacitor (10) again provide a previously programmed net capacitance, say, in the event of power on or a power loss. An optional enable terminal (24) provides protection against inadvertent programming.

Abstract translation: 一种具有多个分支电路（30）的电子可调电容器（10），每个分支电路（30）均包括可由开关（34）选择性地控制的电容器（32），用于对可修整电容器（10）所呈现的净电容作出贡献， 。 开关（34）的操作在接口（36）的方向上，其可以接收包含用于经由程序终端（22）编程的数字指令的程序信号。 可选择的存储器（38）允许存储用于开关（34）的状态程序，使得可以指示接口（36）复位开关（34），并且因此使可修整电容器（10）再次提供预先编程的网络 电容，例如在上电或断电的情况下。 可选的使能端子（24）提供防止无意编程的保护。

公开(公告)号：US06232847B1

公开(公告)日：2001-05-15

申请号：US09086181

申请日：1998-05-28

Applicant: Henry O. Marcy, 5th ,  Kenneth D. Pedrotti ,  David R. Pehlke ,  Charles W. Seabury ,  Jun J. Yao ,  James L. Bartlett ,  Mau Chung F. Chang ,  Deepak Mehrotra ,  J. L. Julian Tham

Inventor： Henry O. Marcy, 5th ,  Kenneth D. Pedrotti ,  David R. Pehlke ,  Charles W. Seabury ,  Jun J. Yao ,  James L. Bartlett ,  Mau Chung F. Chang ,  Deepak Mehrotra ,  J. L. Julian Tham

IPC: H03J320

CPC classification number: H01H59/0009 ,  H01G5/18 ,  H01H2001/0084 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03B2201/025 ,  H03J2200/10

Abstract: A high-Q precision integrated reversibly trimmable singleband oscillator and tunable multiband oscillator are presented that overcome the problems laser trimming and solid state switches. This is accomplished using micro-electromechanical system (MEMS) technology to integrate an amplifier and its tunable LC network on a common substrate. The LC network can be configured to provide a very narrow bandwidth frequency response which peaks at one or more very specific predetermined frequencies without de-Qing the oscillator.

Abstract translation: 提出了高Q精密集成可逆微调单频振荡器和可调谐多频振荡器，克服了激光微调和固态开关的问题。 这是通过使用微机电系统（MEMS）技术来实现的，以将放大器及其可调谐LC网络集成在公共基板上。 LC网络可以被配置为提供非常窄的带宽频率响应，其在一个或多个非常特定的预定频率处达到峰值，而没有去清振荡器。

公开(公告)号：US11652443B2

公开(公告)日：2023-05-16

申请号：US17587127

申请日：2022-01-28

Applicant: Seiko Epson Corporation

Inventor： Yuichi Toriumi ,  Hideo Haneda ,  Teppei Higuchi ,  Atsushi Tanaka

IPC: H03B5/04 ,  H03B5/32

CPC classification number: H03B5/04 ,  H03B5/32 ,  H03B2200/005 ,  H03B2201/025 ,  H03B2201/0208

Abstract: A circuit device includes an oscillation circuit and a processing circuit that generates capacitance control data. The oscillation circuit includes a variable capacitance circuit whose capacitance value is variably controlled based on the capacitance control data, and an oscillation frequency thereof is controlled based on the capacitance value of the variable capacitance circuit. The variable capacitance circuit includes a capacitor array. The capacitor array includes a plurality of capacitors each having a binary-weighted capacitance value, and a plurality of switches that are on-off controlled based on the capacitance control data. The processing circuit outputs the capacitance control data, which is subjected to dithering, so as to switch the capacitance value of the variable capacitance circuit between a first capacitance value and a second capacitance value in a time division manner.