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28 条记录 (耗时 0.017 秒)

    Oscillator circuit and integrated circuit for oscillation
    1.
    发明授权
    Oscillator circuit and integrated circuit for oscillation 有权

    公开(公告)号：US06556094B2

    公开(公告)日：2003-04-29

    申请号：US10015823

    申请日：2001-10-26

    申请人： Eiichi Hasegawa ,  Masahisa Kimura ,  Kazuhisa Oyama ,  Kunihiko Tsukagoshi

    发明人： Eiichi Hasegawa ,  Masahisa Kimura ,  Kazuhisa Oyama ,  Kunihiko Tsukagoshi

    IPC分类号： H03B532

    CPC分类号： H03K3/0307 ,  H03B5/36

    摘要： An oscillator circuit adapted for a piezoelectric oscillator which has a weak oscillation output for generating high frequencies is provided. The speed of operation of the oscillator circuit is increased. An integrated circuit for such an oscillator circuit is also provided. The oscillator circuit has an amplifier portion consisting of CMOS inverters connected in cascade. MOS transistors forming the CMOS inverters have channel widths that decrease successively from the first stage to the last stage to improve the amplification factor of the amplifier portion at high frequencies. This makes it possible to amplify weak oscillation output from the quartz oscillator (XL). A filter circuit produces a peak of negative resistance at a frequency higher than conventional. This permit oscillation operation at higher frequencies.

    Voltage controlled oscillator
    2.
    发明授权
    Voltage controlled oscillator 有权
    压控振荡器

    公开(公告)号：US06710669B2

    公开(公告)日：2004-03-23

    申请号：US10134897

    申请日：2002-04-29

    申请人： Eiichi Hasegawa ,  Kazuhisa Oyama

    发明人： Eiichi Hasegawa ,  Kazuhisa Oyama

    IPC分类号： H03B100

    CPC分类号： H03B5/06 ,  H03B2201/0208 ,  H03B2201/025

    摘要： To provide a voltage controlled oscillator having a large variable width of oscillation frequency while ensuring oscillation starting performance, a P-channel MOS transistor Tr is made ON by detecting that an oscillation signal is provided with a predetermined amplitude value and oscillating operation is shifted from an initial state to a steady state by a detecting circuit OPC and a capacitor CA is connected in series with a series circuit constituted by a crystal resonator XL and a varicap diode CV. In the initial state, a load capacitance is reduced to thereby cancel an amount of reducing conductance gm of an oscillation amplifying portion to correspond to operation of the crystal resonator by a low amplitude and negative resistance necessary for maintaining excellent oscillation starting performance is provided and in the steady state, a width of changing the oscillation frequency is enlarged by enhancing an effect of the varicap diode CV.

    摘要翻译： 为了提供振荡频率可变宽度大的压控振荡器，同时确保振荡起动性能，通过检测到振荡信号被设置有预定的振幅值，使P沟道MOS晶体管Tr成为导通，并且振荡操作从 由检测电路OPC和电容器CA的初始状态稳定状态与由晶体谐振器XL和变容二极管CV构成的串联电路串联连接。 在初始状态下，减小负载电容从而抵消振荡放大部分的电导率gm的减小量，以便与振荡放电部分的运行相对应，并且保持优异的振荡开始性能所需的低振幅和负电阻，并且在 通过增加变容二极管CV的影响，稳定状态，改变振荡频率的宽度被扩大。

    Oscillation control circuit
    3.
    发明授权
    Oscillation control circuit 有权
    振荡控制电路

    公开(公告)号：US06690245B2

    公开(公告)日：2004-02-10

    申请号：US09997709

    申请日：2001-11-29

    申请人： Eiichi Hasegawa ,  Kazuhisa Oyama ,  Masahisa Kimura

    发明人： Eiichi Hasegawa ,  Kazuhisa Oyama ,  Masahisa Kimura

    IPC分类号： H03B532

    CPC分类号： H03K3/0307 ,  H03B5/36 ,  H03K3/014

    摘要： An oscillation control circuit is offered which can improve the startability of an oscillator circuit operating at high frequencies and at a low power-supply voltage. When the oscillation potential of the oscillation signal is between the inversion potential (1.2 volts) of a CMOS inverter IV1 and the inversion potential (1.8 volts) of a CMOS inverter IV2, the logical output value of a CMOS Schmitt inverter SI1 is 1. The output of a CMOS inverter formed by MOS transistors T32 and T33 is shorted out via a MOS transistor T34. Its logical output value is kept at 1. When the inversion potential of the CMOS inverter IV1 or the inversion potential of the CMOS inverter IV2 is exceeded, if the input voltage to the CMOS Schmitt trigger SI1 increases above its inversion potential (1.8 volts), the logical output value assumes a value of 0. The CMOS inverter formed by the MOS transistors T12 and T13 is first set into operation. The oscillation signal is inverted, setting a circuit LA at a later stage into operation.

    摘要翻译： 提供了一种可以提高在高频和低电源电压下工作的振荡电路的启动性的振荡控制电路。 当振荡信号的振荡电位在CMOS反相器IV1的反转电位（1.2伏特）和CMOS反相器IV2的反相电位（1.8伏特）之间时，CMOS施密特反相器SI1的逻辑输出值为1. 由MOS晶体管T32和T33形成的CMOS反相器的输出通过MOS晶体管T34短路。 其逻辑输出值保持为1.当CMOS反相器IV1的反相电位或CMOS反相器IV2的反相电位超过时，如果CMOS施密特触发器SI1的输入电压高于其反转电位（1.8伏）， 逻辑输出值为0.由MOS晶体管T12，T13构成的CMOS反相器首先被设定为工作。 振荡信号反转，将电路LA置于后期。

    Process for producing granular fixed enzymes or microorganisms
    4.
    发明授权
    Process for producing granular fixed enzymes or microorganisms 失效
    生产颗粒状固定酶或微生物的方法

    公开(公告)号：US4605622A

    公开(公告)日：1986-08-12

    申请号：US551928

    申请日：1983-11-15

    申请人： Eiichi Hasegawa ,  Takamitsu Iida ,  Masahiro Sakamoto

    发明人： Eiichi Hasegawa ,  Takamitsu Iida ,  Masahiro Sakamoto

    IPC分类号： C12N11/04 ,  C12N11/08 ,  C12N11/10 ,  C12N11/02 ,  C12N11/12

    CPC分类号： C12N11/04 ,  C12N11/08 ,  C12N11/10

    摘要： A granular fixed molded article of an enzyme or microorganism strain is prepared by adding dropwise a liquid composition, composed of (a) a hydrophilic photocurable resin having at least two ethylenically unsaturated bonds per molecule, (b) a photopolymerization initiator, (c) a water-soluble high-molecular-weight polysaccharide having the ability to become a gel upon contact with at least one polyvalent metal ion and (d) an enzyme or microorganism strain, to an aqueous medium containing a polyvalent metal ion to gel the composition in a granular form, and then irradiating actinic light on the resulting granular gel to cure the photocurable resin in the granular gel.

    摘要翻译： 通过滴加由（a）每分子具有至少两个烯键式不饱和键的亲水性光固化性树脂（b）光聚合引发剂，（c）和（b）光聚合引发剂组成的液体组合物来制备酶或微生物菌株的颗粒状固定模塑制品 具有在与至少一种多价金属离子接触时成为凝胶的能力的水溶性高分子量多糖和（d）酶或微生物菌株，在含有多价金属离子的水性介质中，使组合物凝胶化 然后在所得颗粒状凝胶上照射光化学光以固化颗粒状凝胶中的可光固化树脂。

    Method for recording light information
    7.
    发明授权
    Method for recording light information 失效
    记录光信息的方法

    公开(公告)号：US4500889A

    公开(公告)日：1985-02-19

    申请号：US390735

    申请日：1982-06-21

    申请人： Minoru Wada ,  Yonosuke Takahashi ,  Eiichi Hasegawa

    发明人： Minoru Wada ,  Yonosuke Takahashi ,  Eiichi Hasegawa

    IPC分类号： G11C17/00 ,  B41M5/26 ,  G01D15/14 ,  G01D15/34 ,  G11B7/00 ,  G11B7/0045 ,  G11B7/24 ,  G11B7/243 ,  G01D15/32 ,  G03C5/04 ,  G03C5/24

    CPC分类号： G11B7/243 ,  G01D15/14 ,  G01D15/342 ,  G11B2007/24304 ,  G11B2007/24306 ,  G11B2007/24308 ,  G11B2007/2431 ,  G11B2007/24312 ,  G11B2007/24314 ,  G11B2007/24316 ,  G11B2007/2432 ,  G11B2007/24324 ,  G11B7/2433 ,  Y10S430/146

    摘要： In a method for recording information by irradiating an optical information recording material comprising a heat mode recording layer comprising a metal on a base with a light beam, the method for recording optical information in which said heat mode recording layer consists of a metal and at least one metal compound selected from metal oxides and metal sulfides and the proportion of the amount of the metal to that of said metal compound increases or decreases in the direction of the thickness of the layer, said recording layer having a layer comprising of mixture of at least one of the metal and at least one of the metal compound, in which irradiation with the light beam is conducted from the side where the proportion of the metal in the recording layer is smaller, and in which melting and removing are conducted until the difference in reflectance of the light between the non-recorded area and the recorded area reaches an extent which permits reading by light. The method permits highly sensitive recording by a light beam of a lower energy and can afford a record of information suitable for reflex reading.

    摘要翻译： 在通过用光束照射包括在基底上包含金属的加热模式记录层的光学信息记录材料来记录信息的方法中，记录光学信息的方法，其中所述加热模式记录层由金属组成并且至少 选自金属氧化物和金属硫化物的一种金属化合物，并且金属量与所述金属化合物的比例在层的厚度方向上增加或减少，所述记录层具有至少包含至少 金属和金属化合物中的至少一种，其中从光束照射从记录层中的金属比例较小的一侧进行，并且进行熔融和去除 非记录区域和记录区域之间的光的反射率达到允许通过光读取的程度。 该方法允许通过较低能量的光束进行高灵敏度记录，并且可以提供适合于反射阅读的信息记录。

    Light information recording medium and light information recording and reading method
    8.
    发明授权
    Light information recording medium and light information recording and reading method 失效
    光信息记录介质和光信息记录和读取方法

    公开(公告)号：US4473633A

    公开(公告)日：1984-09-25

    申请号：US450178

    申请日：1982-12-16

    申请人： Minoru Wada ,  Yonosuke Takahashi ,  Eiichi Hasegawa

    发明人： Minoru Wada ,  Yonosuke Takahashi ,  Eiichi Hasegawa

    IPC分类号： G11C17/00 ,  B41M5/00 ,  G11B7/00 ,  G11B7/004 ,  G11B7/243 ,  G03C1/78 ,  G01D15/34 ,  G03C5/04

    CPC分类号： G11B7/243 ,  G11B2007/2431 ,  G11B2007/24312 ,  G11B2007/2432 ,  G11B7/2533 ,  G11B7/2575 ,  Y10S430/146

    摘要： A light information recording medium is disclosed. The medium is comprised of a support which has transparency with respect to light. The support has coated thereon a light sensitive recording layer which contains SiO.sub.2 and In at the SiO.sub.2 content of 10 to 35 vol. % based on the total volume of SiO.sub.2 and In. The recording medium can be used for the recording and reading of the information recorded thereon by striking the medium with laser light from the support side. The recording medium can be used as an optical disk memory having excellent recording sensitivity with respect to laser light, long preservability and high resolving power as well and high S/N ratio.

    摘要翻译： 公开了一种光信息记录介质。 介质由相对于光具有透明度的支撑体构成。 载体上涂有含有SiO 2和In的光敏记录层，SiO 2含量为10-35vol。 基于SiO2和In的总体积％。 记录介质可以用于通过用来自支撑侧的激光打入介质来记录和读取记录在其上的信息。 记录介质可以用作相对于激光具有优良记录灵敏度，长保存性和高分辨能力以及高S / N比的光盘存储器。

    CMOS circuit
    10.
    发明授权
    CMOS circuit 失效
    CMOS电路

    公开(公告)号：US5923192A

    公开(公告)日：1999-07-13

    申请号：US30756

    申请日：1998-02-25

    申请人： Eiichi Hasegawa

    发明人： Eiichi Hasegawa

    IPC分类号： H03K17/16 ,  H03K19/00 ,  H03K19/0175 ,  H03K1/00

    CPC分类号： H03K19/0013

    摘要： A CMOS circuit prevents feedthrough current and has a small-scaled circuit constitution. An output stage has a P-channel MOS transistor and an N-channel MOS transistor with drains connected to each other to form an output terminal and gates respectively connected to output terminals of first and second series circuits. The first and second series circuits control supply of power and each includes an N-channel MOS transistor and a P-channel MOS transistor with drains connected together to form the output terminal and gates connected together to form an input terminal. A delay circuit receives an input signal and produces a delayed input signal which drives the input terminals of the first and second series circuits. P-channel and N-channel MOS transistors control power potentials applied to sources of the respective P-channel and N-channel MOS transistors of the second and first series circuits and are driven by the input signal which is applied to their gates. The P-channel and N-channel MOS transistors are thereby controlled such that current feedthrough is prevented.

    摘要翻译： CMOS电路防止馈通电流并且具有小的电路结构。 输出级具有P沟道MOS晶体管和N沟道MOS晶体管，漏极彼此连接，以形成分别连接到第一和第二串联电路的输出端的输出端和门。 第一和第二串联电路控制电源，并且每个都包括N沟道MOS晶体管和P沟道MOS晶体管，其中漏极连接在一起以形成连接在一起的输出端子和门极以形成输入端子。 延迟电路接收输入信号并产生驱动第一和第二串联电路的输入端的延迟输入信号。 P沟道和N沟道MOS晶体管控制施加到第二和第一串联电路的各个P沟道和N沟道MOS晶体管的源极的功率电势，并且由施加到其栅极的输入信号驱动。 由此控制P沟道和N沟道MOS晶体管，从而防止电流馈通。