公开(公告)号：US06756787B2

公开(公告)日：2004-06-29

申请号：US10243067

申请日：2002-09-13

申请人： Carsten Ohlhoff ,  Peter Beer

发明人： Carsten Ohlhoff ,  Peter Beer

IPC分类号： H01H3102

CPC分类号： G01R31/3004 ,  G01R31/31924

摘要： The invention relates to an integrated circuit having a circuit and a current measuring unit for measuring the current through the functional circuit. The current measuring unit is connected to an output device in order to output the value of the measured current to an external test system via an external connection of the integrated circuit.

摘要翻译： 本发明涉及具有用于测量通过功能电路的电流的电路和电流测量单元的集成电路。 电流测量单元连接到输出设备，以通过集成电路的外部连接将测量电流的值输出到外部测试系统。

公开(公告)号：US06661718B2

公开(公告)日：2003-12-09

申请号：US10035866

申请日：2001-12-31

申请人： Carsten Ohlhoff ,  Peter Pöchmüller

发明人： Carsten Ohlhoff ,  Peter Pöchmüller

IPC分类号： G01R3128

CPC分类号： G11C29/16 ,  G11C29/006

摘要： A substrate includes a memory and a testing device for testing the memory. The testing device includes an interpreter element that operates and tests the memory in accordance with a test program. The test program command codes are stored in the untested memory cell array of the memory that will be tested. The advantage of the testing device consists, inter alia, in the fact that the testing device no longer needs to be adapted to changed hardware properties of the chip generation or fabrication lines because the test program, which is suitable for the respective chip type, is stored as a variable code on the respective memory which is to be tested. It is thus also possible to test various memory chip types with the same testing device.

公开(公告)号：US06657452B2

公开(公告)日：2003-12-02

申请号：US09740633

申请日：2000-12-18

申请人： Peter Beer ,  Carsten Ohlhoff

发明人： Peter Beer ,  Carsten Ohlhoff

IPC分类号： G01R3126

CPC分类号： G01R31/2884 ,  G01R19/165

摘要： The invention relates to a configuration for the measurement of internal voltages in a DUT (2), in which a comparator (3) is provided in each DUT (2) and compares the internal voltage (Vint) to be measured with an externally supplied reference voltage (Vref).

摘要翻译： 本发明涉及一种用于测量DUT（2）中的内部电压的配置，其中在每个DUT（2）中提供比较器（3），并将待测量的内部电压（Vint）与外部提供的基准 电压（Vref）。

公开(公告)号：US20060242492A1

公开(公告)日：2006-10-26

申请号：US11397790

申请日：2006-04-04

申请人： Jochen Hoffmann ,  Carsten Ohlhoff ,  Peter Beer

发明人： Jochen Hoffmann ,  Carsten Ohlhoff ,  Peter Beer

IPC分类号： G11C29/00

CPC分类号： G11C29/24

摘要： Embodiments of the present invention generally provide methods and apparatus for testing memory devices having normal memory elements and redundant memory elements. During a front-end testing procedure, normal memory elements that are found to be defective are replaced by redundant memory elements. During the front-end test, redundant memory elements that are found to be defective may be marked as defective by blowing associated mask fuses. During a back-end testing procedure, the results of testing a normal memory element may be masked (e.g., forced to a passing result) if the normal memory element has been replaced by a redundant memory element. Similarly, the results of testing a redundant memory element may be masked if the redundant memory element was previously found to be defective, as indicated by an associated mark fuse. By masking the test results for memory elements (normal and redundant) that have been previously found defective, the memory elements may be tested in the same manner during front-end and back-end testing.

公开(公告)号：US07120841B2

公开(公告)日：2006-10-10

申请号：US10200633

申请日：2002-07-22

申请人： Carsten Ohlhoff

发明人： Carsten Ohlhoff

IPC分类号： G11C29/00 ,  G01R31/28 ,  G06F11/00

CPC分类号： G11C29/36

摘要： A data generator for generating test data for a word-oriented semiconductor memory is integrated on a semiconductor chip of the semiconductor memory. The data generator has a shift register.

公开(公告)号：US07107501B2

公开(公告)日：2006-09-12

申请号：US10452485

申请日：2003-06-02

申请人： Carsten Ohlhoff ,  Peter Beer

发明人： Carsten Ohlhoff ,  Peter Beer

IPC分类号： G11C29/00 ,  G06F12/00

CPC分类号： G11C29/56012 ,  G11C29/56 ,  G11C2029/5606

摘要： A test device has an interface for connecting a memory circuit that is to be tested and for receiving fault addresses. The test device further has a fault address memory for storing fault addresses and a control unit for allocating the received fault addresses to a fault address which is to be stored. A first sequence of memory cells can be addressed with a first access time, and a second sequence of memory cells can be addressed with a second access time, in the fault address memory. The second access time is longer than the first access time. First fault addresses are received at a first data rate, and second fault addresses are received at a second data rate, via the interface. The second data rate is lower than the first data rate. The control unit stores the first fault addresses in the fault address memory on the basis of the first sequence of memory cells, and stores the second fault addresses in the fault address memory on a basis of the second sequence of memory cells.

公开(公告)号：US20060120199A1

公开(公告)日：2006-06-08

申请号：US11270025

申请日：2005-11-09

申请人： Carsten Ohlhoff ,  Hans-Christoph Ostendorf ,  Stefan Gollmer

发明人： Carsten Ohlhoff ,  Hans-Christoph Ostendorf ,  Stefan Gollmer

IPC分类号： G11C5/14

CPC分类号： G11C29/12 ,  G11C29/78 ,  G11C2029/1208 ,  G11C2029/4402 ,  G11C2229/743 ,  G11C2229/763

摘要： An electronic circuit comprises a volatile memory unit and a non-volatile memory unit which stores a repair information related to the volatile memory unit. The non-volatile and volatile memory units are connected together by a connecting device and are formed as a single electronic module.

摘要翻译： 电子电路包括易失性存储器单元和存储与易失性存储器单元相关的修复信息的非易失性存储器单元。 非易失性和易失性存储器单元通过连接装置连接在一起并形成为单个电子模块。

公开(公告)号：US06671221B2

公开(公告)日：2003-12-30

申请号：US10154343

申请日：2002-05-23

申请人： Peter Beer ,  Carsten Ohlhoff

发明人： Peter Beer ,  Carsten Ohlhoff

IPC分类号： G11C818

CPC分类号： G11C29/12015 ,  G11C11/401 ,  G11C29/02 ,  G11C29/028 ,  G11C29/50012

摘要： A semiconductor chip, particularly a semiconductor memory, has a trimmable oscillator for controlling internal functions. A circuit is provided for trimming the frequency of the oscillator and is implemented on the semiconductor chip. This guarantees a parallel setting of the oscillator frequency for a plurality of semiconductor chips without losses in yield or quality.

公开(公告)号：US06670665B2

公开(公告)日：2003-12-30

申请号：US10360456

申请日：2003-02-06

申请人： Peter Beer ,  Carsten Ohlhoff ,  Helmut Schneider

发明人： Peter Beer ,  Carsten Ohlhoff ,  Helmut Schneider

IPC分类号： H01L31119

CPC分类号： H01L27/10891 ,  H01L27/0207 ,  H01L27/10861 ,  H01L27/10894 ,  H01L27/10897

摘要： A memory module, in particular a DRAM, has a memory cell array with memory cells disposed in a matrix form. Dummy memory cells are formed in an edge region of the memory cell array, which dummy memory cells are not used for storing items of information. First electrodes of the dummy memory cells are connected to a reference potential. A counter electrode of the dummy memory cells is electrically connected to the counter electrode of the memory cells. A charge capacitance of the counter electrode of the memory cells is increased in this way. Consequently, there is an overall increase in the voltage stability of the memory module with respect to a large entry of charge into the memory cells.

摘要翻译： 存储器模块，特别是DRAM，具有以矩阵形式设置有存储单元的存储单元阵列。 虚拟存储单元形成在存储单元阵列的边缘区域中，这些虚拟存储单元不用于存储信息项。 虚拟存储单元的第一电极连接到参考电位。 虚拟存储单元的对电极电连接到存储单元的对电极。 以这种方式增加存储单元的对电极的电荷电容。 因此，相对于进入存储单元的大量电荷，存储器模块的电压稳定性总体上增加。

公开(公告)号：US06639856B2

公开(公告)日：2003-10-28

申请号：US10158031

申请日：2002-05-30

申请人： Peter Beer ,  Carsten Ohlhoff

发明人： Peter Beer ,  Carsten Ohlhoff

IPC分类号： G11C700

CPC分类号： G11C29/24

摘要： The memory chip has regular memory cells and standby memory cells for replacing faulty memory cells. There is provided a method for checking memory cells of a repaired memory chip, where the memory cells are checked by putting the memory chip into the state before repair. This actuates the memory cells identified as being faulty in spite of the provision of standby memory cells. This allows the operability of the memory chip to be checked after the repair procedure has been carried out. It is thus possible to identify, by way of example, whether a fault has been produced by the repair procedure.