公开(公告)号：US20070196963A1

公开(公告)日：2007-08-23

申请号：US11307762

申请日：2006-02-21

Applicant: David Dobuzinsky ,  Byeong Kim ,  Effendi Leobandung ,  Munir Naeem ,  Brian Tessier

Inventor： David Dobuzinsky ,  Byeong Kim ,  Effendi Leobandung ,  Munir Naeem ,  Brian Tessier

IPC: H01L21/00 ,  H01L21/84

CPC classification number: H01L21/84

Abstract: Embodiments herein present a method for forming a poly filled substrate contact on a SOI structure. The method forms an insulator on a substrate and forms a substrate contact hole within the insulator. The insulator surface level is higher than final structure. Next, a poly overfill is performed, comprising filling the substrate contact hole with polysilicon and covering the insulator with the polysilicon. Specifically, the thickness of the polysilicon is greater than the size of the substrate contact hole. Following this, the polysilicon is etched, wherein a portion of the polysilicon is removed, and wherein the substrate contact hole is left partially filled with the polysilicon. Further, the etching of the polysilicon forms a concave recess within a top portion of the polysilicon. The etching of said polysilicon does not contact the substrate. The excess of insulator is polished off to the desired level.

Abstract translation: 本文的实施方案提供了一种用于在SOI结构上形成多孔填充衬底接触的方法。 该方法在衬底上形成绝缘体，并在绝缘体内形成衬底接触孔。 绝缘子表面水平高于最终结构。 接下来，执行聚过填料，包括用多晶硅填充衬底接触孔并用多晶硅覆盖绝缘体。 具体地，多晶硅的厚度大于基板接触孔的尺寸。 接下来，蚀刻多晶硅，其中去除多晶硅的一部分，并且其中衬底接触孔部分地被多晶硅填充。 此外，多晶硅的蚀刻在多晶硅的顶部内形成凹形凹部。 所述多晶硅的蚀刻不与衬底接触。 绝缘体的过剩被抛光到所需的水平。

公开(公告)号：US20060068596A1

公开(公告)日：2006-03-30

申请号：US10711683

申请日：2004-09-30

Applicant: David Dobuzinsky ,  Jochen Beintner ,  Siddhartha Panda

Inventor： David Dobuzinsky ,  Jochen Beintner ,  Siddhartha Panda

IPC: H01L21/44 ,  H01L21/302 ,  H01L21/461

CPC classification number: H01L21/3086 ,  H01L21/3081 ,  H01L21/3088 ,  H01L21/32139 ,  H01L29/66795 ,  H01L29/785

Abstract: A process for forming sublithographic structures such as fins employs a hardmask protective layer above a hardmask to absorb damage during a dry etching step, thereby preserving symmetry in the hardmask and eliminating a source of defects.

Abstract translation: 用于形成诸如翅片之类的亚光刻结构的工艺使用硬掩模上方的硬掩模保护层来在干蚀刻步骤期间吸收损伤，从而保持硬掩模中的对称性并消除缺陷源。

公开(公告)号：US20050051839A1

公开(公告)日：2005-03-10

申请号：US10655199

申请日：2003-09-04

Applicant: Johnathan Faltermeier ,  Jeremy Stephens ,  David Dobuzinsky ,  Larry Clevenger ,  Munir Naeem ,  Chienfan Yu ,  Larry Nesbit ,  Rama Divakaruni ,  Michael Maldei

Inventor： Johnathan Faltermeier ,  Jeremy Stephens ,  David Dobuzinsky ,  Larry Clevenger ,  Munir Naeem ,  Chienfan Yu ,  Larry Nesbit ,  Rama Divakaruni ,  Michael Maldei

IPC: H01L21/60 ,  H01L21/8242 ,  H01L29/76

CPC classification number: H01L27/10888 ,  H01L21/76897 ,  H01L27/10864 ,  H01L27/10876 ,  H01L27/10891

Abstract: A method of forming borderless contacts and a borderless contact structure for semiconductor devices. A preferred embodiment comprises using a second etch selectivity material disposed over a first etch selectivity material to preserve the first etch selectivity material during the etch processes for the various material layers of the semiconductor device while forming the borderless contacts.

Abstract translation: 形成无边界接触的方法和用于半导体器件的无边界接触结构。 优选实施例包括使用设置在第一蚀刻选择性材料上的第二蚀刻选择性材料，以在半导体器件的各种材料层的蚀刻工艺期间保持第一蚀刻选择性材料，同时形成无边界接触。

公开(公告)号：US20050017282A1

公开(公告)日：2005-01-27

申请号：US10604488

申请日：2003-07-25

Applicant: David Dobuzinsky ,  Jonathan Faltermeier ,  Philip Flaitz ,  Rajarao Jammy ,  Yuko Ninomiya ,  Ravikumar Ramachandran ,  Viraj Sardesai ,  Yun Wang

Inventor： David Dobuzinsky ,  Jonathan Faltermeier ,  Philip Flaitz ,  Rajarao Jammy ,  Yuko Ninomiya ,  Ravikumar Ramachandran ,  Viraj Sardesai ,  Yun Wang

IPC: H01L21/334 ,  H01L21/8242 ,  H01L27/108

CPC classification number: H01L27/10867 ,  H01L27/10829 ,  H01L29/66181

Abstract: In the process of forming a trench capacitor, the conductive strap connecting the center electrode of the capacitor with a circuit element in the substrate, such as the pass transistor of a DRAM cell, is separated from the crystalline substrate material by a barrier layer of silicon carbide formed during the process of etching the material within the trench, such as an oxide collar, using a reactive ion etch process with an etchant gas that contains carbon, such as C4F8.

Abstract translation: 在形成沟槽电容器的过程中，将电容器的中心电极与衬底中的电路元件（例如DRAM单元的传输晶体管）连接的导电带通过硅的阻挡层与晶体衬底材料分离 在蚀刻沟槽内的材料（例如氧化物环）的过程中形成的碳化物，其使用具有包含碳的蚀刻剂气体如C4F8的反应离子蚀刻工艺。