Method for fabricating flexible semiconductor electrode, semiconductor electrode fabricated thereby, and solar cell using the semiconductor electrode
    12.
    发明授权
    Method for fabricating flexible semiconductor electrode, semiconductor electrode fabricated thereby, and solar cell using the semiconductor electrode 有权
    用于制造柔性半导体电极的方法,由此制造的半导体电极和使用该半导体电极的太阳能电池

    公开(公告)号:US07923629B2

    公开(公告)日:2011-04-12

    申请号:US11516392

    申请日:2006-09-06

    CPC classification number: H01G9/2095 H01G9/2027 Y02E10/542

    Abstract: Disclosed herein is a method for fabricating a flexible semiconductor electrode including preparing a first substrate having a semiconductor layer disposed on a release layer, forming a second substrate having an adhesive layer disposed on a conductive material-coated flexible substrate, and pressing the first substrate against the second substrate under heat effective to transfer the semiconductor layer from the first substrate to the second substrate. The method allows for a flexible semiconductor electrode to be fabricated at low temperatures in a stable manner, and the flexible semiconductor electrode allows for high photoelectric conversion efficiency in a solar cell.

    Abstract translation: 本文公开了一种制造柔性半导体电极的方法,包括制备具有设置在剥离层上的半导体层的第一衬底,形成具有设置在导电材料涂覆的柔性衬底上的粘合剂层的第二衬底,并且将第一衬底按压 加热的第二衬底有效地将半导体层从第一衬底转移到第二衬底。 该方法允许以稳定的方式在低温下制造柔性半导体电极,并且柔性半导体电极允许在太阳能电池中具有高的光电转换效率。

    Zero capacitor RAM with reliable drain voltage application and method for manufacturing the same
    13.
    发明授权
    Zero capacitor RAM with reliable drain voltage application and method for manufacturing the same 失效
    零电容RAM具有可靠的漏极电压应用及其制造方法

    公开(公告)号:US07880230B2

    公开(公告)日:2011-02-01

    申请号:US11968701

    申请日:2008-01-03

    Applicant: Eun Sung Lee

    Inventor: Eun Sung Lee

    CPC classification number: H01L27/1203 H01L21/84 H01L27/108 H01L27/10802

    Abstract: The following discloses and describes a zero capacitor RAM as well as a method for manufacturing the same. The zero capacitor RAM includes an SOI substrate. This SOI substrate is composed of a stacked structure of a silicon substrate, an embedded insulation film and a silicon layer. This layer is patterned into line types to constitute active patterns. Moreover, a first insulation layer forms between the active patterns and gates form on the active patterns as well as the first insulation layer to extend perpendicularly to the active patterns. In addition, a source forms in the active pattern on one side of each gate, a drain forms in the active pattern on the other side of each gate which is achieved by filling a metal layer. Continuing, a contact plug forms between the gates on the source and an interlayer dielectric forms on the contact plug in addition to the gates. Finally, a bit line forms on the interlayer dielectric to extend perpendicularly to the gates and come into contact with the drain.

    Abstract translation: 以下公开并描述了零电容器RAM及其制造方法。 零电容RAM包括SOI衬底。 该SOI衬底由硅衬底,嵌入绝缘膜和硅层的堆叠结构组成。 该层被图案化成行类型以构成活动模式。 此外,在活性图案之间形成有源图案和栅极之间形成的第一绝缘层以及垂直于有源图案延伸的第一绝缘层。 此外,源极在每个栅极的一侧形成有源图案,在每个栅极的另一侧的有源图案中形成漏极,这是通过填充金属层而实现的。 继续地,除了栅极之外,在源极上的栅极之间形成接触插塞,并且在接触插塞上形成层间电介质。 最后,位于层间电介质上的位线垂直于栅极延伸并与漏极接触。

    Polymeric surfactant for high dielectric polymer composites, method of preparing the same and high dielectric polymer composite comprising the same
    15.
    发明授权
    Polymeric surfactant for high dielectric polymer composites, method of preparing the same and high dielectric polymer composite comprising the same 有权
    用于高介电聚合物复合材料的聚合物表面活性剂,制备包含该聚合物的相同和高介电聚合物复合材料的方法

    公开(公告)号:US07744778B2

    公开(公告)日:2010-06-29

    申请号:US11961011

    申请日:2007-12-20

    CPC classification number: H01G4/206

    Abstract: Disclosed is a polymeric surfactant for high dielectric polymer composites, a method of preparing the same, and a high dielectric polymer composite including the same. The polymeric surfactant for high dielectric polymer composites, which includes a head portion having high affinity for a conductive material and a tail portion having high affinity for a polymer resin, forms a passivation layer surrounding the conductive material in the high dielectric polymer composite including the polymeric surfactant, thus ensuring and controlling a high dielectric constant.

    Abstract translation: 公开了一种用于高介电聚合物复合材料的聚合物表面活性剂,其制备方法和包含该聚合物的高介电聚合物复合材料。 用于高介电聚合物复合材料的聚合物表面活性剂包括对导电材料具有高亲和性的头部和对聚合物树脂具有高亲和力的尾部,在包含聚合物的高介电聚合物复合材料中形成围绕导电材料的钝化层 表面活性剂,从而确保和控制高介电常数。

    POLYMER COMPOSITE
    19.
    发明申请
    POLYMER COMPOSITE 审中-公开
    聚合物复合材料

    公开(公告)号:US20090230363A1

    公开(公告)日:2009-09-17

    申请号:US12397987

    申请日:2009-03-04

    CPC classification number: H05K1/095 B82Y10/00 H01G4/206 H05K1/097 H05K1/162

    Abstract: A polymer composite having a high dielectric constant is disclosed herein. The polymer composite includes a conductive material impregnated with oxidizable metal nanoparticles or metal oxide nanoparticles to decrease dielectric loss, and an anion surfactant containing an acidic functional group to form a passivation layer that surrounds the conductive material, resulting in increased dielectric constant.

    Abstract translation: 本文公开了具有高介电常数的聚合物复合材料。 聚合物复合材料包括浸渍有可氧化金属纳米颗粒或金属氧化物纳米颗粒以降低介电损耗的导电材料,以及含有酸性官能团以形成包围导电材料的钝化层的阴离子表面活性剂,导致介电常数增加。

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