公开(公告)号：US08212261B2

公开(公告)日：2012-07-03

申请号：US12153031

申请日：2008-05-13

申请人： Hiroyuki Ichikawa ,  Hideki Kawahara ,  Hiroki Nakamura

发明人： Hiroyuki Ichikawa ,  Hideki Kawahara ,  Hiroki Nakamura

IPC分类号： H01L29/10

CPC分类号： H01L29/66068 ,  H01L21/0485 ,  H01L21/31612 ,  H01L21/3185 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/66666 ,  H01L29/7828

摘要： A SiC device includes: a substrate; a drift layer; a base region; a source region; a channel layer connecting the drift layer and the source region; a gate oxide film on the channel layer and the source region; a gate electrode on the gate oxide film; an interlayer insulation film with a contact hole having a barrier layer and a BPSG insulation film on the gate electrode; a source electrode having upper and lower wiring electrodes on the interlayer insulation film and in the contact hole for connecting the base region and the source region; and a drain electrode on the substrate. The barrier layer prevents a Ni component in the lower wiring electrode from being diffused into the BPSG insulation film.

摘要翻译： SiC器件包括：衬底; 漂移层 基地区 源区; 连接漂移层和源极区域的沟道层; 沟道层和源极区上的栅极氧化膜; 栅氧化膜上的栅电极; 具有在栅电极上具有阻挡层和BPSG绝缘膜的接触孔的层间绝缘膜; 源电极，在层间绝缘膜上具有上和下布线电极以及用于连接基极区域和源极区域的接触孔; 和衬底上的漏电极。 阻挡层防止下部布线电极中的Ni成分扩散到BPSG绝缘膜中。

公开(公告)号：US20120139035A1

公开(公告)日：2012-06-07

申请号：US13298508

申请日：2011-11-17

申请人： Fujio Masuoka ,  Hiroki Nakamura

发明人： Fujio Masuoka ,  Hiroki Nakamura

IPC分类号： H01L27/088

CPC分类号： H01L27/1108 ,  H01L21/84 ,  H01L27/1203

摘要： A semiconductor memory device includes a static memory cell having six MOS transistors arranged on a substrate. The six MOS transistors include first and second NMOS access transistors, third and fourth NMOS driver transistors, and first and second PMOS load transistors. Each of the first and second NMOS access transistors has a first diffusion layer, a pillar-shaped semiconductor layer, and a second diffusion layer arranged vertically on the substrate in a hierarchical manner. Each of the third and fourth NMOS driver transistors has a third diffusion layer, a pillar-shaped semiconductor layer, and a fourth diffusion layer arranged vertically on the substrate in a hierarchical manner. The lengths between the upper ends of the third diffusion layers and the lower ends of the fourth diffusion layers are shorter than the lengths between the upper ends of the first diffusion layer and the lower ends of the second diffusion layers.

摘要翻译： 半导体存储器件包括具有布置在衬底上的六个MOS晶体管的静态存储单元。 六个MOS晶体管包括第一和第二NMOS存取晶体管，第三和第四NMOS驱动晶体管以及第一和第二PMOS负载晶体管。 第一和第二NMOS存取晶体管中的每一个具有第一扩散层，柱状半导体层和以分层方式垂直布置在衬底上的第二扩散层。 第三和第四NMOS驱动晶体管中的每一个具有第三扩散层，柱状半导体层和以分层方式垂直布置在衬底上的第四扩散层。 第三扩散层的上端和第四扩散层的下端之间的长度比第一扩散层的上端和第二扩散层的下端之间的长度短。

公开(公告)号：US08158468B2

公开(公告)日：2012-04-17

申请号：US12703991

申请日：2010-02-11

申请人： Fujio Masuoka ,  Hiroki Nakamura ,  Tomohiko Kudo ,  Shintaro Arai

发明人： Fujio Masuoka ,  Hiroki Nakamura ,  Tomohiko Kudo ,  Shintaro Arai

IPC分类号： H01L21/8232 ,  H01L29/786

CPC分类号： H01L29/458 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/66666 ,  H01L29/78618 ,  H01L29/78642

摘要： Disclosed is a semiconductor device production method, which comprises the steps of: forming a pillar-shaped first-conductive-type semiconductor layer on a planar semiconductor layer; forming a second-conductive-type semiconductor layer in a portion of the planar semiconductor layer underneath the pillar-shaped first-conductive-type semiconductor layer; forming a gate dielectric film and a gate electrode having a laminated structure of a metal film and an amorphous silicon or polysilicon film, around the pillar-shaped first-conductive-type semiconductor layer; forming a sidewall-shaped dielectric film on an upper region of a sidewall of the pillar-shaped first-conductive-type semiconductor layer and in contact with a top of the gate electrode; forming first and second sidewall-shaped dielectric films on a sidewall of the gate electrode; forming a second-conductive-type semiconductor layer in an upper portion of the pillar-shaped first-conductive-type semiconductor layer; forming a metal-semiconductor compound on the second-conductive-type semiconductor layer formed in the portion of the planar semiconductor layer underneath the pillar-shaped first-conductive-type semiconductor layer; forming a metal-semiconductor compound on the second-conductive-type semiconductor layer formed in the upper portion of the pillar-shaped first-conductive-type semiconductor layer; forming a metal-semiconductor compound on the gate electrode; forming a contact on the second-conductive-type semiconductor layer formed in the portion of the planar semiconductor layer underneath the pillar-shaped first-conductive-type semiconductor layer; and forming a contact on the second-conductive-type semiconductor layer formed in the upper portion of the pillar-shaped first-conductive-type semiconductor layer.

摘要翻译： 公开了一种半导体器件制造方法，其包括以下步骤：在平面半导体层上形成柱状的第一导电型半导体层; 在所述柱状第一导电型半导体层的下方的所述平面状半导体层的一部分中形成第二导电型半导体层; 在所述柱状的第一导电型半导体层周围形成具有金属膜和非晶硅或多晶硅膜的叠层结构的栅极电介质膜和栅电极; 在所述柱状第一导电型半导体层的侧壁的上部区域上形成与所述栅电极的顶部接触的侧壁状的电介质膜; 在所述栅电极的侧壁上形成第一和第二侧壁状电介质膜; 在柱状第一导电型半导体层的上部形成第二导电型半导体层; 在形成在柱状第一导电型半导体层下方的平面状半导体层的部分的第二导电型半导体层上形成金属 - 半导体化合物; 在形成在柱状第一导电型半导体层的上部的第二导电型半导体层上形成金属 - 半导体化合物; 在栅电极上形成金属 - 半导体化合物; 在形成在柱状第一导电型半导体层下方的平面状半导体层的部分的第二导电型半导体层上形成接触; 并且在形成在柱状第一导电型半导体层的上部的第二导电型半导体层上形成接触。

公开(公告)号：US08129796B2

公开(公告)日：2012-03-06

申请号：US13070028

申请日：2011-03-23

申请人： Fujio Masuoka ,  Hiroki Nakamura

发明人： Fujio Masuoka ,  Hiroki Nakamura

IPC分类号： H01L27/11

CPC分类号： H01L27/11 ,  H01L21/823885

摘要： There is provided a high-integrated complementary metal-oxide semiconductor static random-access memory including an inverter. The inverter includes: a first pillar that is formed by integrating a first-conductivity-type semiconductor, a second-conductivity-type semiconductor, and an insulating material disposed between the first-conductivity-type semiconductor and the second-conductivity-type semiconductor, and that vertically extends with respect to a substrate; a first second-conductivity-type high-concentration semiconductor disposed on the first-conductivity-type semiconductor; a second second-conductivity-type high-concentration semiconductor disposed under the first-conductivity-type semiconductor; a first first-conductivity-type high-concentration semiconductor disposed on the second-conductivity-type semiconductor; a second first-conductivity-type high-concentration semiconductor disposed under the second-conductivity-type semiconductor; a gate insulating material formed around the first pillar; and a gate conductive material formed around the gate insulating material.

摘要翻译： 提供了包括逆变器的高集成度的互补金属氧化物半导体静态随机存取存储器。 逆变器包括：通过集成第一导电型半导体，第二导​​电型半导体和设置在第一导电型半导体与第二导电型半导体之间的绝缘材料形成的第一柱， 并且相对于衬底垂直地延伸; 设置在第一导电型半导体上的第一第二导电型高浓度半导体; 设置在第一导电型半导体下方的第二第二导电型高浓度半导体; 布置在第二导电型半导体上的第一第一导电型高浓度半导体; 设置在第二导电型半导体下方的第二第一导电型高浓度半导体; 围绕所述第一支柱形成的栅极绝缘材料; 以及形成在栅极绝缘材料周围的栅极导电材料。

公开(公告)号：US08115237B2

公开(公告)日：2012-02-14

申请号：US13115715

申请日：2011-05-25

申请人： Fujio Masuoka ,  Hiroki Nakamura

发明人： Fujio Masuoka ,  Hiroki Nakamura

IPC分类号： H01L27/148

CPC分类号： H01L27/14812 ,  H01L29/768

摘要： A solid-state image pickup element comprises a first-conductive type planar semiconductor layer formed on a second-conductive type planar semiconductor layer, a hole portion formed in the first-conductive type planar semiconductor layer to define a hole therein, and a first-conductive type high-concentration impurity region formed in a bottom wall of the hole portion. The solid-state image pickup element also includes a first-conductive type high-concentration impurity-doped element isolation region, a second-conductive type photoelectric conversion region, a transfer electrode formed on the sidewall of the hole portion through a gate dielectric film, a second-conductive type CCD channel region, and a read channel formed in a region of the first-conductive type planar semiconductor layer sandwiched between the second-conductive type photoelectric conversion region and the second-conductive type CCD channel region.

摘要翻译： 固态摄像元件包括形成在第二导电型平面半导体层上的第一导电型平面半导体层，形成在第一导电型平面半导体层中以在其中限定孔的孔部分， 形成在孔部的底壁上的导电型高浓度杂质区。 固态摄像元件还包括第一导电型高浓度杂质掺杂元件隔离区域，第二导电型光电转换区域，通过栅极电介质膜形成在孔部分的侧壁上的转移电极， 第二导电型CCD沟道区和形成在第二导电型光电转换区和第二导电型CCD沟道区之间的第一导电型平面半导体层的区域中的读通道。

公开(公告)号：US08114695B2

公开(公告)日：2012-02-14

申请号：US12970272

申请日：2010-12-16

申请人： Fujio Masuoka ,  Hiroki Nakamura

发明人： Fujio Masuoka ,  Hiroki Nakamura

IPC分类号： H01L21/00

CPC分类号： H01L27/14812 ,  H01L29/768

摘要： A method of producing a solid-state image pickup element includes forming a hole portion, forming a first-conductive type high-concentration impurity region in a bottom wall of the hole portion, and forming a first-conductive type high-concentration impurity-doped element isolation region in a part of a sidewall of the hole portion and connected to the first-conductive type high-concentration impurity region. The method also includes forming a second-conductive type photoelectric conversion region beneath the first-conductive type high-concentration impurity region and adapted to undergo a change in charge amount upon receiving light, and forming a transfer electrode formed on the sidewall of the hole portion through a gate dielectric film. The method further includes forming a second-conductive type CCD channel region in a top surface of the first-conductive type planar semiconductor layer, and forming a read channel sandwiched between the second-conductive type photoelectric conversion region and the second-conductive type CCD channel region.

摘要翻译： 固体摄像元件的制造方法包括形成孔部，在该孔部的底壁形成第一导电型高浓度杂质区，形成第一导电型高浓度杂质掺杂物 元件隔离区域，并且与第一导电型高浓度杂质区域连接。 该方法还包括在第一导电型高浓度杂质区之下形成第二导电型光电转换区，并适于在接收光时经历电荷量的变化，并且形成在孔部分的侧壁上形成的转移电极 通过栅极电介质膜。 该方法还包括在第一导电型平面半导体层的顶表面中形成第二导电型CCD沟道区，并形成夹在第二导电型光电转换区和第二导电型CCD通道之间的读通道 地区。

公开(公告)号：US08080458B2

公开(公告)日：2011-12-20

申请号：US12761735

申请日：2010-04-16

申请人： Fujio Masuoka ,  Hiroki Nakamura ,  Shintaro Arai ,  Tomohiko Kudo ,  Navab Singh ,  Kavitha Devi Buddharaju ,  Shen Nansheng ,  Rukmani Devi Sayanthan

发明人： Fujio Masuoka ,  Hiroki Nakamura ,  Shintaro Arai ,  Tomohiko Kudo ,  Navab Singh ,  Kavitha Devi Buddharaju ,  Shen Nansheng ,  Rukmani Devi Sayanthan

IPC分类号： H01L21/336

CPC分类号： H01L29/7827 ,  H01L29/42356 ,  H01L29/42392 ,  H01L29/458 ,  H01L29/66666 ,  H01L29/78642

摘要： A method of manufacturing a semiconductor device includes the steps of forming a first columnar semiconductor layer on a substrate forming a first flat semiconductor layer forming a first semiconductor layer of a second conductive type, and forming a first insulating film. The method further includes the steps of forming a gate insulating film and a gate electrode, forming a second semiconductor layer of the second conductive type, forming a semiconductor layer of a first conductive type and forming a metal-semiconductor compound. The first insulating film has a thickness larger than that of the gate insulating film formed around the first columnar silicon layer.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在形成第二导电类型的第一半导体层的第一平坦半导体层的基板上形成第一柱状半导体层，形成第一绝缘膜。 该方法还包括形成栅绝缘膜和栅电极，形成第二导电类型的第二半导体层的步骤，形成第一导电类型的半导体层并形成金属半导体化合物。 第一绝缘膜的厚度大于围绕第一柱状硅层形成的栅极绝缘膜的厚度。

公开(公告)号：USD645656S1

公开(公告)日：2011-09-27

申请号：US29358742

申请日：2010-03-31

申请人： Hiroki Nakamura

设计人： Hiroki Nakamura

公开(公告)号：US20110220972A1

公开(公告)日：2011-09-15

申请号：US13115715

申请日：2011-05-25

申请人： Fujio Masuoka ,  Hiroki Nakamura

发明人： Fujio Masuoka ,  Hiroki Nakamura

IPC分类号： H01L27/148

CPC分类号： H01L27/14812 ,  H01L29/768

摘要： It is intended to provide a solid-state image pickup element capable of reducing an area of a read channel to increase a ratio of a surface area of a light-receiving section to the overall surface area of one pixel. The solid-state image pickup element comprises a first-conductive type planar semiconductor layer formed on a second-conductive type planar semiconductor layer, a hole portion formed in the first-conductive type planar semiconductor layer to define a hole therein, a first-conductive type high-concentration impurity region formed in a bottom wall of the hole portion, a first-conductive type high-concentration impurity-doped element isolation region formed in a part of a sidewall of the hole portion and connected to the first-conductive type high-concentration impurity region, a second-conductive type photoelectric conversion region formed beneath the first-conductive type high-concentration impurity region and in a part of a lower region of the remaining part of the sidewall of the hole portion, and adapted to undergo a change in charge amount upon receiving light, a transfer electrode formed on the sidewall of the hole portion through a gate dielectric film, a second-conductive type CCD channel region formed in a top surface of the first-conductive type planar semiconductor layer and in a part of an upper region of the remaining part of the sidewall of the hole portion, and a read channel formed in a region of the first-conductive type planar semiconductor layer sandwiched between the second-conductive type photoelectric conversion region and the second-conductive type CCD channel region.

公开(公告)号：US20110207260A1

公开(公告)日：2011-08-25

申请号：US13101833

申请日：2011-05-05

申请人： Fujio MASUOKA ,  Hiroki NAKAMURA

发明人： Fujio MASUOKA ,  Hiroki NAKAMURA

IPC分类号： H01L31/18

CPC分类号： H01L27/14812 ,  H01L27/14837 ,  H01L31/035281 ,  H01L31/03529 ,  Y02E10/50

摘要： It is an object to provide a CCD solid-state image sensor, in which an area of a read channel is reduced and a rate of a surface area of a light receiving portion (photodiode) to an area of one pixel is increased. There is provided a solid-state image sensor, including: a first conductive type semiconductor layer; a first conductive type pillar-shaped semiconductor layer formed on the first conductive type semiconductor layer; a second conductive type photoelectric conversion region formed on the top of the first conductive type pillar-shaped semiconductor layer, an electric charge amount of the photoelectric conversion region being changed by light; and a high-concentrated impurity region of the first conductive type formed on a surface of the second conductive type photoelectric conversion region, the impurity region being spaced apart from a top end of the first conductive type pillar-shaped semiconductor layer by a predetermined distance, wherein a transfer electrode is formed on the side of the first conductive type pillar-shaped semiconductor layer via a gate insulating film, a second conductive type CCD channel region is formed below the transfer electrode, and a read channel is formed in a region between the second conductive type photoelectric conversion region and the second conductive type CCD channel region.

摘要翻译： 本发明的目的是提供一种CCD固态图像传感器，其中读取通道的面积减小，并且光接收部分（光电二极管）到一个像素的区域的表面积的比率增加。 提供了一种固态图像传感器，包括：第一导电型半导体层; 形成在第一导电型半导体层上的第一导电型柱状半导体层; 第二导电型光电转换区，形成在第一导电型柱状半导体层的顶部，光电转换区域的电荷量由光改变; 以及形成在所述第二导电型光电转换区域的表面上的所述第一导电类型的高浓度杂质区域，所述杂质区域与所述第一导电型柱状半导体层的顶端隔开预定距离， 其中，在所述第一导电型柱状半导体层的侧面经由栅极绝缘膜形成有转印电极，在所述转印电极的下方形成第二导电型CCD沟道区，在所述第二导电型柱状半导体层之间的区域形成读取沟道 第二导电型光电转换区域和第二导电型CCD沟道区域。