公开(公告)号：US06861798B1

公开(公告)日：2005-03-01

申请号：US09493697

申请日：2000-01-28

Applicant: Lawrence S. Pan ,  Donald R. Schropp, Jr. ,  Vasil M. Chakarov ,  John K. O'Reilly ,  George B. Hopple ,  Christopher J. Spindt ,  Roger W. Barton ,  Michael J. Nystrom ,  Ramamoorthy Ramesh ,  James C. Dunphy ,  Shiyou Pei ,  Kollengode S. Narayanan

Inventor： Lawrence S. Pan ,  Donald R. Schropp, Jr. ,  Vasil M. Chakarov ,  John K. O'Reilly ,  George B. Hopple ,  Christopher J. Spindt ,  Roger W. Barton ,  Michael J. Nystrom ,  Ramamoorthy Ramesh ,  James C. Dunphy ,  Shiyou Pei ,  Kollengode S. Narayanan

IPC: H01J29/87 ,  H01J5/03 ,  H01J9/24 ,  H01J29/02 ,  H01J29/86 ,  H01J31/12 ,  H01J1/62 ,  H01J19/42

CPC classification number: H01J9/242 ,  H01J29/028 ,  H01J29/864 ,  H01J31/123 ,  H01J61/30 ,  H01J61/305 ,  H01J2329/864 ,  H01J2329/8645

Abstract: The present invention provides a spacer assembly which is tailored to provide a secondary electron emission coefficient of approximately 1 for the spacer assembly when the spacer assembly is subjected to flat panel display operating voltages. The present invention further provides a spacer assembly which accomplishes the above achievement and which does not degrade severely when subjected to electron bombardment. The present invention further provides a spacer assembly which accomplishes both of the above-listed achievements and which does not significantly contribute to contamination of the vacuum environment of the flat panel display or be susceptible to contamination that may evolve within the tube. Specifically, in one embodiment, the present invention is comprised of a spacer structure which has a specific secondary electron emission coefficient function associated therewith. The material comprising the spacer structure is tailored to provide a secondary electron emission coefficient of approximately 1 for the spacer assembly when the spacer assembly is subjected to flat panel display operating voltages.

Abstract translation: 本发明提供了一种间隔件组件，当间隔件组件受到平板显示器工作电压时，其被定制成为间隔件组件提供约1的二次电子发射系数。 本发明还提供了一种实现上述成就并且在受到电子轰击时不会严重劣化的间隔件组件。 本发明还提供了一种实现上述列出的成就并且不会对平板显示器的真空环境的污染作出重大贡献或者易于在管内产生污染的间隔件组件。 具体地说，在一个实施例中，本发明由具有与其相关联的特定二次电子发射系数函数的间隔结构构成。 包括间隔结构的材料被定制成当间隔件组件受到平板显示器操作电压时，为间隔件组件提供约1的二次电子发射系数。

公开(公告)号：US06630786B2

公开(公告)日：2003-10-07

申请号：US09823872

申请日：2001-03-30

Applicant: William J. Cummings ,  Lawrence S. Pan ,  Christopher J. Spindt ,  George B. Hopple ,  Colin D. Stanners ,  James C. Dunphy ,  Shiyou Pei ,  Theodore S. Fahlen

Inventor： William J. Cummings ,  Lawrence S. Pan ,  Christopher J. Spindt ,  George B. Hopple ,  Colin D. Stanners ,  James C. Dunphy ,  Shiyou Pei ,  Theodore S. Fahlen

IPC: H01J1724

CPC classification number: C09K11/642 ,  C09K11/7789 ,  H01J29/085 ,  H01J29/94 ,  H01J31/127

Abstract: A light-emitting device (42, 68, 80, 90, or 100) suitable for a flat-panel CRT display contains a plate (54), a light-emissive region (56), a light-blocking region (58), and a light-reflective layer (60 or 70). The light-emitting device achieves one or more of the following characteristics by suitably implementing the light-reflective layer or/and providing one or more layers (72, 82, 92, and 100) along the light-reflective layer: (a) reduced electron energy loss as electrons pass through the light-reflective layer, (b) gettering along the light-reflective layer, (c) reduced secondary electron emission along the light-reflective layer, (d) reduced electron backscattering along the light-reflective layer, and (e) reduced chemical reactivity along the light-reflective layer.

Abstract translation: 适用于平板CRT显示器的发光装置（42,68,80,90或100）包含板（54），发光区（56），遮光区（58） 和光反射层（60或70）。 发光装置通过适当地实现光反射层和/或沿着光反射层提供一个或多个层（72,82,92和100）来实现以下特性中的一个或多个：（a）减少 电子通过光反射层的电子能量损失，（b）沿着光反射层吸气，（c）沿着光反射层减少的二次电子发射，（d）沿光反射层减小的电子反向散射 ，和（e）降低沿着光反射层的化学反应性。

公开(公告)号：US6153986A

公开(公告)日：2000-11-28

申请号：US470674

申请日：1999-12-23

Applicant: James C. Dunphy ,  Donald R. Schropp, Jr.

Inventor： James C. Dunphy ,  Donald R. Schropp, Jr.

IPC: G09G3/20 ,  G05F1/10 ,  G09G3/22 ,  H01J29/02 ,  H01J31/12 ,  G05F1/00

CPC classification number: G09G3/22 ,  H01J29/028 ,  H01J31/127 ,  G09G2300/043 ,  H01J2329/8625 ,  H01J2329/864 ,  H01J2329/8645

Abstract: A voltage ratio regulator circuit for a spacer electrode of a flat panel display screen. Within one implementation of a field emission display (FED) device, thin spacer walls are inserted between a high voltage (Vh) faceplate and a backplate to secure these structures as a vacuum is formed between. A phosphor layer on the faceplate receives electrons selectively emitted from discrete electron emitting areas along the backplate (cathode) thereby forming images on the faceplate. The faceplate warms relative to the backplate, as a result of energy released by the phosphor layer, thereby generating a temperature gradient along the spacer walls. The top portion of each spacer wall becomes more conductive with increased temperature and acts to attract electrons that are emitted toward the faceplate. To counter this attraction, a spacer electrode is placed along each spacer wall at a height, d, above the backplate and maintained at a voltage, Ve. Electrodes of all of the spacer walls are coupled together. The spacer electrode at Ve and the high voltage supply at Vh are both coupled to a voltage ratio regulator circuit which maintains the ratio (Ve/Vh) using voltage dividers, an operational amplifier and other circuitry. The voltage ratio regulator compensates for variations in voltage supply performance. The time constants of the voltage ratio regular circuit is tuned to be near or slightly faster than the time constant of the inherent resistance and capacitance of the spacer wall. The invention can also correct for other sources of the voltage error on the spacer walls. The invention improves the electron path accuracy for pixels located near spacer walls.

Abstract translation: 一种用于平板显示屏的间隔电极的电压比调节器电路。 在场致发射显示器（FED）器件的一个实施方案中，在高电压（Vh）面板和背板之间插入薄间隔壁，以在两者之间形成真空来固定这些结构。 面板上的磷光体层接收从背板（阴极）离散的电子发射区域选择性发射的电子，从而在面板上形成图像。 作为由荧光体层释放的能量的结果，面板相对于背板加热，从而沿着间隔壁产生温度梯度。 每个间隔壁的顶部在温度升高时变得更加导电，并且用于吸引向面板发射的电子。 为了抵抗这种吸引力，沿着每个间隔壁沿着背板上方的高度d放置间隔电极并保持在一个电压Ve。 所有间隔壁的电极连接在一起。 Ve处的间隔电极和Vh处的高电压源均耦合到使用分压器，运算放大器和其他电路保持比率（Ve / Vh）的电压比调节器电路。 电压比调节器补偿电压供应性能的变化。 电压比常规电路的时间常数调整为接近或略快于间隔壁的固有电阻和电容的时间常数。 本发明还可以校正间隔壁上的电压误差的其它来源。 本发明改善了靠近隔离墙的像素的电子路径精度。

公开(公告)号：US08444271B2

公开(公告)日：2013-05-21

申请号：US13251904

申请日：2011-10-03

Applicant: James C. Dunphy ,  Stephen W. Marshall

Inventor： James C. Dunphy ,  Stephen W. Marshall

IPC: G03B21/14 ,  G03H1/02 ,  G02B26/00 ,  G02B5/02 ,  H01J3/14

CPC classification number: G03B21/56

Abstract: The disclosure provides an apparatus for reducing speckle in a projection visual display (PVD) system, a method of reducing visible speckle in a PVD system and a PVD system incorporating the method or apparatus. In one embodiment, the apparatus includes a diffuser interposable in an optical path of a PVD system and a diffuser actuator having a single drive axis configured to cause the diffuser to travel in a Lissajous curve at least partially transverse to the optical path.

Abstract translation: 本公开提供了一种用于减少投影视觉显示（PVD）系统中的斑点的装置，减少PVD系统中的可见散斑的方法和包含该方法或装置的PVD系统。 在一个实施例中，该装置包括可在PVD系统的光路中插入的漫射器和具有单个驱动轴的扩散器致动器，该单个驱动轴构造成使扩散器至少部分地横向于光路穿过利萨如曲线。

公开(公告)号：US07362494B2

公开(公告)日：2008-04-22

申请号：US11734442

申请日：2007-04-12

Applicant: Andrew Huibers ,  Hongqin Shi ,  James C. Dunphy ,  Satyadev Patel

Inventor： Andrew Huibers ,  Hongqin Shi ,  James C. Dunphy ,  Satyadev Patel

IPC: G02B26/00

CPC classification number: G02B26/0841 ,  H01L27/14625 ,  H01L31/02327

Abstract: A method for making a micromirror device comprises is disclosed herein.

Abstract translation: 本文公开了一种制造微反射镜装置的方法。

公开(公告)号：US06624592B1

公开(公告)日：2003-09-23

申请号：US10025084

申请日：2001-12-18

Applicant: James C. Dunphy ,  Donald J. Elloway

Inventor： James C. Dunphy ,  Donald J. Elloway

IPC: G09G310

CPC classification number: G09G3/22 ,  H01J9/44 ,  H01J2209/0223

Abstract: A method of removing contaminant particles from faceplates in newly fabricated field emission displays so that a uniform distribution of contaminants is achieved at the emitter sites of the display. During the initial operation of a field emission dislay device contaminants are removed from the display faceplate by electron induced desorption. The emission current profile at the emitter sites is selected so that the distribution of readsorbed contaminants is equalized. The variations in current emission compensate for shadowing effects due to spacer walls to produce a uniform readsorption distribution. The emitter sites may driven using an animated contrast image at a constant current for the display.

Abstract translation: 在新制造的场发射显示器中从面板去除污染物颗粒的方法，使得在显示器的发射器位置处实现污染物的均匀分布。 在场致发射装置的初始操作期间，通过电子诱导解吸从显示面板去除污染物。 选择发射极位置处的发射电流分布，使得吸附的污染物的分布相等。 电流发射的变化补偿由间隔壁产生的阴影效应以产生均匀的吸收分布。 发射器位置可以使用用于显示的恒定电流的动画对比度图像来驱动。

公开(公告)号：US06512335B1

公开(公告)日：2003-01-28

申请号：US09896402

申请日：2001-06-28

Applicant: James C. Dunphy ,  William J. Cummings ,  Colin D. Stanners ,  Lawrence S. Pan

Inventor： James C. Dunphy ,  William J. Cummings ,  Colin D. Stanners ,  Lawrence S. Pan

IPC: G09G310

CPC classification number: G09G3/22 ,  G09G2310/066 ,  H01J9/44 ,  H01J2209/0223

Abstract: Methods for performing cathode burn-in with respect to an FED display that avoid display non-uniformities near and around the spacer wall structures. In a first method, the anode is floated or receives a negative voltage with respect to the electron emitter. A positive voltage is then applied to the focus waffle structure with respect to the electron emitter. The cathode is then energized thereby preventing emitted electrons from escaping the focus well. Under these conditions, cathode burn-in conditioning can occur but electrons are energetically forbidden from hitting the anode or the spacer walls except for a small region near the focus waffle. Under the second method, the anode is grounded or allowed to float. A negative bias is applied to the focus waffle. This causes electrons to be collected at the M2 layer of the gate. Electrons are energetically forbidden from hitting any portion of the tube except the M2 layer. Under either method, no electrons hit the spacer walls and therefore display non-uniformities near and around the spacer wall structures are avoided.

Abstract translation: 相对于避免在间隔壁结构附近和周围显示不均匀性的FED显示器进行阴极老化的方法。 在第一种方法中，阳极漂浮或接收相对于电子发射器的负电压。 然后将正电压相对于电子发射器施加到焦点楔形结构。 然后使阴极通电，从而防止发射的电子逸出。 在这些条件下，可能会发生阴极老化调节，但除了靠近焦点华夫饼附近的小区域外，电子被大力禁止撞击阳极或间隔壁。 在第二种方法下，阳极接地或允许浮动。 对焦点华夫饼施加负偏压。 这导致电子在门的M2层被收集。 除了M2层之外，电子被大力禁止撞击管的任何部分。 在任一方法下，没有电子撞击间隔壁，因此避免了在间隔壁结构附近和周围显示不均匀性。

公开(公告)号：US06462484B2

公开(公告)日：2002-10-08

申请号：US09796868

申请日：2001-02-28

Applicant: James C. Dunphy ,  Ronald L. Hansen ,  Brian E. Lindberg ,  Jerome M. Truppa ,  Donald J. Elloway ,  Duke K. Amaniampong

Inventor： James C. Dunphy ,  Ronald L. Hansen ,  Brian E. Lindberg ,  Jerome M. Truppa ,  Donald J. Elloway ,  Duke K. Amaniampong

IPC: G09G310

CPC classification number: H01J9/44 ,  G09G3/22 ,  G09G2310/066 ,  H01J2209/0223

Abstract: A circuit and method for turning-on and turning-off elements of an field emission display (FED) device to protect against emitter electrode and gate electrode degradation. The circuit includes control logic having a sequencer which in one embodiment can be realized using a state machine. Upon power-on, the control logic sends an enable signal to a high voltage power supply that supplies voltage to the anode electrode. At this time a low voltage power supply and driving circuitry are disabled. Upon receiving a confirmation signal from the high voltage power supply, the control logic enables the low voltage power supply which supplies voltage to the driving circuitry. Upon receiving a confirmation signal from the low voltage power supply, or optionally after expiration of a predetermined time period, the control logic then enables the driving circuitry which drives the gate electrodes and the emitter electrodes which make up the rows and columns of the FED device. Upon power down, the control logic first disables the low voltage power supply, then the high voltage power supply. The above may occur upon each time the FED is powered-on and powered-off during the normal operational use of the display. By so doing, embodiments of the present invention reduce emitter electrode and gate electrode degradation by restricting electron emission from the emitter electrode directly to the gate electrode.

Abstract translation: 用于场致发射显示器（FED）器件的导通和关断元件的电路和方法，以防止发射极电极和栅极电极劣化。 电路包括具有定序器的控制逻辑，在一个实施例中可以使用状态机来实现。 上电时，控制逻辑向向阳极提供电压的高电压电源发送使能信号。 此时，低电压电源和驱动电路被禁用。 在从高电压电源接收到确认信号时，控制逻辑使能向驱动电路提供电压的低压电源。 当接收到来自低电压电源的确认信号时，或者可选地，在预定时间段期满之后，控制逻辑使能驱动构成FED装置的行和列的栅电极和发射电极的驱动电路 。 断电时，控制逻辑首先禁用低压电源，然后禁用高压电源。 上述可能在每次FED在显示器的正常操作使用期间通电和断电时发生。 通过这样做，本发明的实施例通过将发射电极的电子发射直接限制到栅电极来减少发射极电极和栅极电极的劣化。

公开(公告)号：US06414428B1

公开(公告)日：2002-07-02

申请号：US09302698

申请日：1999-04-30

Applicant: Donald R. Schropp, Jr. ,  John E. Field ,  James C. Dunphy ,  Lawrence S. Pan ,  David L. Morris ,  Ronald S. Besser ,  Christopher J. Spindt

Inventor： Donald R. Schropp, Jr. ,  John E. Field ,  James C. Dunphy ,  Lawrence S. Pan ,  David L. Morris ,  Ronald S. Besser ,  Christopher J. Spindt

IPC: H01J162

CPC classification number: H01J29/028 ,  H01J29/467 ,  H01J29/481 ,  H01J31/127 ,  H01J2201/025 ,  H01J2329/8625

Abstract: The intensity at which electrons emitted by a first plate structure (10) in a flat-panel display strike a second plate structure (12) for causing it to emit light is controlled so as to reduce image degradation that could otherwise arise from undesired electron-trajectory changes caused by effects such as the presence of a spacer system (14) between the plate structures. An electron-emissive region (20) in the first plate structure typically contains multiple laterally separated electron-emissive portions (201 and 202) for selectively emitting electrons. An electron-focusing system in the first plate structure has corresponding focus openings (42P1 and 42P2) through which electrons emitted by the electron-emissive portions respectively pass. Upon being struck by the so-emitted electrons, a light-emissive region (22) in the second plate structure emits light to produce at least part of a dot of the display's image.

Abstract translation: 控制由平板显示器中的第一板结构（10）发射的电子撞击用于使其发光的第二板结构（12）的强度，以便减少否则可能由不期望的电子发射引起的图像劣化， 由诸如板结构之间的隔离系统（14）的影响引起的轨迹变化。 第一板结构中的电子发射区（20）通常包含用于选择性地发射电子的多个横向分离的电子发射部分（201和202）。 第一板结构中的电子聚焦系统具有相应的聚焦开口（42P1和42P2），电子发射部分发射的电子分别通过该开口。 在被所发射的电子撞击时，第二板结构中的发光区域（22）发光，以产生显示器图像的至少一部分点。

公开(公告)号：US07315068B2

公开(公告)日：2008-01-01

申请号：US11077240

申请日：2005-03-09

Applicant: Scott Haubrich ,  Klaus Kunze ,  James C. Dunphy ,  Chris Gudeman ,  Joerg Rockenberger ,  Fabio Zurcher ,  Nassrin Sleiman ,  Mao Takashima ,  Chris Spindt

Inventor： Scott Haubrich ,  Klaus Kunze ,  James C. Dunphy ,  Chris Gudeman ,  Joerg Rockenberger ,  Fabio Zurcher ,  Nassrin Sleiman ,  Mao Takashima ,  Chris Spindt

IPC: H01L29/94

CPC classification number: H01L27/1292

Abstract: The present invention is directed to methods for making electronic devices with a thin anisotropic conducting layer interface layer formed between a substrate and an active device layer that is preferably patterned conductive layer. The interface layer preferably provides Ohmic and/or rectifying contact between the active device layer and the substrate and preferably provides good adhesion of the active device layer to the substrate. The active device layer is preferably fashioned from a nanoparticle ink solution that is patterned using embossing methods or other suitable printing and/or imaging methods. The active device layer is preferably patterned into an array of gate structures suitable for the fabrication of thin film transistors and the like.

Abstract translation: 本发明涉及用于制造具有薄的各向异性导电层界面层的电子器件的方法，所述薄的各向异性导电层界面层形成在衬底和优选图案化导电层的有源器件层之间。 界面层优选地在有源器件层和衬底之间提供欧姆和/或整流接触，并且优选地提供有源器件层与衬底的良好粘附。 活性器件层优选由使用压花方法或其它合适的印刷和/或成像方法图案化的纳米颗粒油墨溶液形成。 有源器件层优选地被图案化成适于制造薄膜晶体管等的栅极结构的阵列。