公开(公告)号：US07247528B2

公开(公告)日：2007-07-24

申请号：US11065750

申请日：2005-02-24

申请人： Kun-Ho Kwak ,  Jae-Hoon Jang ,  Soon-Moon Jung ,  Won-Seok Cho ,  Hoon Lim ,  Sung-Jin Kim ,  Byung-Jun Hwang ,  Jong-Hyuk Kim

发明人： Kun-Ho Kwak ,  Jae-Hoon Jang ,  Soon-Moon Jung ,  Won-Seok Cho ,  Hoon Lim ,  Sung-Jin Kim ,  Byung-Jun Hwang ,  Jong-Hyuk Kim

IPC分类号： H01L21/00

CPC分类号： H01L27/1108 ,  H01L27/11

摘要： Methods of fabricating a semiconductor integrated circuit having thin film transistors using an SEG technique are provided. The methods include forming an inter-layer insulating layer on a single-crystalline semiconductor substrate. A single-crystalline semiconductor plug extends through the inter-layer insulating layer, and a single-crystalline epitaxial semiconductor pattern is in contact with the single-crystalline semiconductor plug on the inter-layer insulating layer. The single-crystalline epitaxial semiconductor pattern is at least partially planarized to form a semiconductor body layer on the inter-layer insulating layer, and the semiconductor body layer is patterned to form a semiconductor body. As a result, the semiconductor body includes at least a portion of the single-crystalline epitaxial semiconductor pattern. Thus, the semiconductor body has an excellent single-crystalline structure. Semiconductor integrated circuits fabricated using the methods are also provided.

摘要翻译： 提供了使用SEG技术制造具有薄膜晶体管的半导体集成电路的方法。 所述方法包括在单晶半导体衬底上形成层间绝缘层。 单晶半导体插件延伸穿过层间绝缘层，并且单晶外延半导体图案与层间绝缘层上的单晶半导体插头接触。 单晶外延半导体图案至少部分地平坦化以在层间绝缘层上形成半导体本体层，并且对半导体本体层进行图案化以形成半导体本体。 结果，半导体本体包括单晶外延半导体图案的至少一部分。 因此，半导体本体具有优异的单晶结构。 还提供了使用这些方法制造的半导体集成电路。

公开(公告)号：US20060115944A1

公开(公告)日：2006-06-01

申请号：US11281346

申请日：2005-11-16

申请人： Kun-Ho Kwak ,  Soon-Moon Jung ,  Won-Seok Cho ,  Jae-Hoon Jang ,  Jong-Hyuk Kim

发明人： Kun-Ho Kwak ,  Soon-Moon Jung ,  Won-Seok Cho ,  Jae-Hoon Jang ,  Jong-Hyuk Kim

IPC分类号： H01L21/8238

CPC分类号： H01L21/8221 ,  H01L27/0688 ,  H01L27/092

摘要： In one embodiment, an intrinsic single crystalline semiconductor plug is formed to pass through a lower insulating layer using a selective epitaxial growth process employing a node impurity region as a seed layer, and a single crystalline semiconductor body pattern is formed on the lower insulating layer using the intrinsic single crystalline semiconductor plug as a seed layer. When the recessed single crystalline semiconductor plug is doped with impurities having the same conductivity type as the node impurity region, a peripheral impurity region is prevented from being counter-doped. As a result, it is possible to implement a high performance semiconductor device that requires a single crystalline thin film transistor as well as a node contact structure with ohmic contact.

摘要翻译： 在一个实施例中，使用使用节点杂质区域作为种子层的选择性外延生长工艺，形成本征单晶半导体插塞以穿过下绝缘层，并且在下绝缘层上形成单晶体半导体本体图案，使用 本征单晶半导体插头作为种子层。 当嵌入的单晶半导体插件掺杂有与节点杂质区相同的导电类型的杂质时，防止外围杂质区域被反掺杂。 结果，可以实现需要单晶薄膜晶体管的高性能半导体器件以及具有欧姆接触的节点接触结构。

公开(公告)号：US20050221544A1

公开(公告)日：2005-10-06

申请号：US11098648

申请日：2005-04-04

申请人： Kun-Ho Kwak ,  Sung-Jin Kim ,  Soon-Moon Jung ,  Won-Seok Cho ,  Jae-Hoon Jang ,  Hoon Lim ,  Jong-Hyuk Kim ,  Myang-Sik Han ,  Byung-Jun Hwang

发明人： Kun-Ho Kwak ,  Sung-Jin Kim ,  Soon-Moon Jung ,  Won-Seok Cho ,  Jae-Hoon Jang ,  Hoon Lim ,  Jong-Hyuk Kim ,  Myang-Sik Han ,  Byung-Jun Hwang

IPC分类号： H01L21/00 ,  H01L21/8244 ,  H01L21/84 ,  H01L27/06 ,  H01L27/11 ,  H01L27/12 ,  H01L29/15 ,  H01L29/786 ,  H01L31/0312

CPC分类号： H01L27/1108 ,  H01L27/0688 ,  H01L27/11 ,  H01L29/78603

摘要： Methods of fabricating semiconductor devices are provided. An interlayer insulating layer is provided on a single crystalline semiconductor substrate. A single crystalline semiconductor plug is provided that extends through the interlayer insulating layer and a molding layer pattern is provided on the semiconductor substrate and the single crystalline semiconductor plug. The molding layer pattern defines an opening therein that at least partially exposes a portion of the single crystalline semiconductor plug. A single crystalline semiconductor epitaxial pattern is provided on the exposed portion of single crystalline semiconductor plug using a selective epitaxial growth technique that uses the exposed portion of the single crystalline semiconductor plug as a seed layer. A single crystalline semiconductor region is provided in the opening. The single crystalline semiconductor region includes at least a portion of the single crystalline semiconductor epitaxial pattern.

摘要翻译： 提供制造半导体器件的方法。 层间绝缘层设置在单晶半导体衬底上。 提供延伸穿过层间绝缘层的单晶半导体插头，并且在半导体衬底和单晶半导体插头上设置成型层图案。 模制层图案限定其中的开口，其至少部分地暴露单晶半导体插塞的一部分。 使用选择性外延生长技术在单晶半导体插塞的暴露部分上提供单晶半导体外延图案，其使用单晶半导体插塞的暴露部分作为籽晶层。 在开口中设置单晶半导体区域。 单晶半导体区域包括单晶半导体外延图案的至少一部分。

公开(公告)号：US06866123B2

公开(公告)日：2005-03-15

申请号：US10144789

申请日：2002-05-15

申请人： Jong-Hyuk Kim

发明人： Jong-Hyuk Kim

IPC分类号： F04B39/02 ,  F04C29/02 ,  F01M1/00 ,  F04B17/00

CPC分类号： F04B39/0261 ,  F04B39/0246 ,  F04C29/025

摘要： An oil supply apparatus for a hermetic compressor includes: a crankshaft coupled with a motor so as to revolve together and having an oil flow path inside, a sleeve connected to a lower part of the crankshaft so as to revolve together with the crankshaft in one body, a sucking member arranged to maintain a uniform interval with an inner circumference face of the sleeve so as to carry out a suction of an oil, and a support means for supporting the sucking member to slide, the support means connected between the sleeve and sucking member so as to maintain a stationary state. The sucking member is supported so as not to revolve at the revolving center of the sleeve, thereby maintaining a uniform gap between the inner circumference face of the sleeve and the sucking member regardless of the vibration from the actuating compressor so as to improve oil supply reliance.

摘要翻译： 一种用于封闭式压缩机的供油装置，包括：曲轴，其与电动机结合，以一体旋转并具有内部的油流路;套筒与曲轴的下部连接，并与曲轴一起旋转; 吸引构件，其设置成与所述套筒的内周面保持均匀的间隔，以便执行油的抽吸;以及支撑装置，用于支撑所述吸附构件滑动，所述支撑装置连接在所述套筒和抽吸之间 成员以保持静止状态。 吸引构件被支撑成不在套筒的旋转中心旋转，从而在套筒的内周面与吸入构件之间保持均匀的间隙，而与来自致动压缩机的振动无关，从而提高供油依赖性 。

公开(公告)号：US06666301B2

公开(公告)日：2003-12-23

申请号：US10144790

申请日：2002-05-15

申请人： Jong-Hyuk Kim

发明人： Jong-Hyuk Kim

IPC分类号： F01M100

CPC分类号： F04B39/0261 ,  F04B39/0246 ,  F16N7/366

摘要： An oil supply apparatus for a hermetic compressor includes: a crankshaft coupled with a rotor of a motor so as to revolve together and having an oil flow path inside, a sleeve connected to a lower part of the crankshaft so as to revolve together with the crankshaft 107 in one body, a sucking member arranged to maintain a uniform interval with an inner circumference face of the sleeve so as to revolve in a direction opposite to that of the sleeve to carry out a suction of an oil, and a rotating force transferring means for supporting the sucking member so that the sucking member revolves together with the sleeve and receiving a rotating force of the sleeve so as to revolve the sucking member in a direction opposite to a revolving direction of the sleeve. The relative revolution speed between the sleeve and sucking member increases so as to increase the oil supply to the sliding and frictional parts, thereby enabling to improve a lubrication performance of the compressor. When the compressor generates vibration, the sucking member and sleeve vibrate with the same amplitude so as to maintain uniformly the gap between the sleeve and sucking member. Therefore, the present invention enables to improve a reliance of the oil supply.

公开(公告)号：US20120044662A1

公开(公告)日：2012-02-23

申请号：US13209169

申请日：2011-08-12

申请人： Jong-Hyuk KIM ,  Joong-Lok SONG

发明人： Jong-Hyuk KIM ,  Joong-Lok SONG

IPC分类号： H05K9/00

CPC分类号： G06F3/0418 ,  G06F3/044 ,  G06F2203/04107

摘要： A display device having a touch panel which effectively intercepts noise generated from a display panel to prevent the touch panel from malfunctioning. The display device having the touch panel includes a display panel, a touch panel attached to the display panel through an adhesion layer, a noise interception layer over an entire rear surface of the touch panel to prevent electrical noise from the display panel from being introduced into the touch panel, a metal ring pattern on the noise interception layer to surround the edge of the noise interception layer and having lower electrical resistance than the noise interception layer, and a ground terminal electrically connected to the noise interception layer and the metal ring pattern.

摘要翻译： 一种具有触摸面板的显示装置，其有效地拦截从显示面板产生的噪声，以防止触摸面板发生故障。 具有触摸面板的显示装置包括显示面板，通过粘合层附着到显示面板的触摸面板，在触摸面板的整个后表面上的噪声截取层，以防止来自显示面板的电噪声被引入 所述触摸面板，所述噪声截取层上的围绕所述噪声截取层的边缘并且具有比所述噪声截取层更低的电阻的金属环图案，以及电连接到所述噪声截取层和所述金属环图案的接地端子。

公开(公告)号：US20110287590A1

公开(公告)日：2011-11-24

申请号：US13204385

申请日：2011-08-05

申请人： Min-Sung Song ,  Soon-Moon Jung ,  Han-Soo Kim ,  Young-Seop Rah ,  Won-Seok Cho ,  Yang-Soo Son ,  Jong-Hyuk KIm ,  Young-Chul Jang

发明人： Min-Sung Song ,  Soon-Moon Jung ,  Han-Soo Kim ,  Young-Seop Rah ,  Won-Seok Cho ,  Yang-Soo Son ,  Jong-Hyuk KIm ,  Young-Chul Jang

IPC分类号： H01L21/768

CPC分类号： H01L27/11519 ,  G11C5/02 ,  G11C16/0483 ,  H01L21/76898 ,  H01L23/481 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11565 ,  H01L27/11578 ,  H01L2924/0002 ,  H01L2924/00

摘要： On embodiment of a contact structure may include a lower insulation layer on a lower substrate, an upper substrate on the lower insulation layer, a groove penetrating the upper substrate to extend into the lower insulation layer, the groove below an interface between the upper substrate and the lower insulation layer, an upper insulation layer in the groove, and a contact plug penetrating the upper insulation layer in the groove to extend into the lower insulation layer.

摘要翻译： 接触结构的实施例可以包括在下基板上的下绝缘层，下绝缘层上的上基板，穿过上基板以延伸到下绝缘层中的沟槽，在上基板和 下绝缘层，槽中的上绝缘层和穿过槽中的上绝缘层的接触插塞延伸到下绝缘层中。

公开(公告)号：US20100167498A1

公开(公告)日：2010-07-01

申请号：US12646691

申请日：2009-12-23

申请人： Chul-Soo KIM ,  Kuk-Jin Chun ,  Sung-Chan Kang ,  Jong-Hyuk Kim ,  In-Sang Song ,  Duck-Hwan Kim ,  Jae-Shik Shin

发明人： Chul-Soo KIM ,  Kuk-Jin Chun ,  Sung-Chan Kang ,  Jong-Hyuk Kim ,  In-Sang Song ,  Duck-Hwan Kim ,  Jae-Shik Shin

IPC分类号： H01L21/50

CPC分类号： H01L23/10 ,  H01L21/50 ,  H01L21/76898 ,  H01L25/50 ,  H01L27/14601 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed are a substrate level bonding method and a substrate level package formed thereby. The substrate level package includes a plurality of unit substrate sections, a base substrate, and a plurality of substrate adhesion sections. The unit substrate sections are separated from each other by holes. The base substrate is disposed to face the unit substrate sections. The substrate adhesion sections are interposed between the unit substrate sections and the base substrate to bond the unit substrate sections to the base substrate and which are formed of DFR material, whose at least one portion is uncured.

摘要翻译： 公开了一种由此形成的衬底水平焊接方法和衬底层封装。 基板级封装包括多个单元基板部分，基底基板和多个基板粘合部分。 单元基板部分通过孔彼此分离。 基底基板设置成面对单元基板部分。 基板粘合部分插入在单元基板部分和基底基板之间，以将单元基板部分粘合到基底基板上，并且由至少一部分未固化的DFR材料形成。

公开(公告)号：US07589375B2

公开(公告)日：2009-09-15

申请号：US11642297

申请日：2006-12-20

申请人： Jae-Hoon Jang ,  Soon-Moon Jung ,  Jong-Hyuk Kim ,  Young-Seop Rah ,  Han-Byung Park

发明人： Jae-Hoon Jang ,  Soon-Moon Jung ,  Jong-Hyuk Kim ,  Young-Seop Rah ,  Han-Byung Park

IPC分类号： H01L27/115

CPC分类号： H01L27/11 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/1116

摘要： A non-volatile memory device includes a semiconductor substrate including a cell array region and a peripheral circuit region. A first cell unit is on the semiconductor substrate in the cell array region, and a cell insulating layer is on the first cell unit. A first active body layer is in the cell insulating layer and over the first cell unit, and a second cell unit is on the first active body layer. The device further includes a peripheral transistor on the semiconductor substrate in the peripheral circuit region. The peripheral transistor has a gate pattern and source/drain regions, and a metal silicide layer is on the gate pattern and/or on the source/drain regions of the peripheral transistor. A peripheral insulating layer is on the metal silicide layer and the peripheral transistor, and an etching protection layer is between the cell insulating layer and the peripheral insulating layer and between the metal silicide layer and the peripheral insulating layer.

摘要翻译： 非易失性存储器件包括包括单元阵列区域和外围电路区域的半导体衬底。 第一单元单元位于单元阵列区域中的半导体基板上，单元绝缘层位于第一单元单元上。 第一有源体层位于单元绝缘层中并在第一单元单元上，第二单元单元位于第一活性体层上。 该器件还包括在外围电路区域中的半导体衬底上的外围晶体管。 外围晶体管具有栅极图案和源极/漏极区域，并且金属硅化物层位于外围晶体管的栅极图案和/或源极/漏极区域上。 外围绝缘层位于金属硅化物层和外围晶体管上，蚀刻保护层位于电池绝缘层和外围绝缘层之间以及金属硅化物层和外围绝缘层之间。

公开(公告)号：US20080085582A1

公开(公告)日：2008-04-10

申请号：US11651892

申请日：2007-01-10

申请人： Hoo-Sung Cho ,  Soon-Moon Jung ,  Won-Seok Cho ,  Jong-Hyuk Kim ,  Jae-Hun Jeong ,  Jae-Hoon Jang

发明人： Hoo-Sung Cho ,  Soon-Moon Jung ,  Won-Seok Cho ,  Jong-Hyuk Kim ,  Jae-Hun Jeong ,  Jae-Hoon Jang

IPC分类号： H01L21/336

CPC分类号： H01L27/11524 ,  H01L27/0688 ,  H01L27/11551

摘要： Provided is a NAND-type nonvolatile memory device and method of forming the same. In the method, a plurality of cell layers are stacked on a semiconductor substrate. Seed contact holes for forming a semiconductor pattern included in a stacked cell are formed at regular distance. At this time, the seed contact holes are arranged such that a bit line plug or a source line pattern is disposed at a center between one pair of seed contact holes adjacent to each other.

摘要翻译： 提供了一种NAND型非易失性存储器件及其形成方法。 在该方法中，多个单元层层叠在半导体基板上。 用于形成包含在层叠电池中的半导体图案的种子接触孔以规则的距离形成。 此时，种子接触孔布置成使得位线插头或源极线图案设置在彼此相邻的一对种子接触孔之间的中心处。