公开(公告)号：US20140104909A1

公开(公告)日：2014-04-17

申请号：US13652474

申请日：2012-10-16

申请人： Kwok Kuen (David) KWONG ,  Chun Fai WONG ,  Leung Ling (Alan) PUN ,  Ho Ming (Karen) WAN

发明人： Kwok Kuen (David) KWONG ,  Chun Fai WONG ,  Leung Ling (Alan) PUN ,  Ho Ming (Karen) WAN

IPC分类号： H02M7/217

CPC分类号： H02M7/219 ,  H02M2007/2195 ,  Y02B70/1408

摘要： A bridge rectifier operates on low A.C. input voltages such as received by a Radio-Frequency Identification (RFID) device. Voltage drops due to bridge diodes are avoided. Four p-channel transistors are arranged in a transistor bridge across the A.C. inputs to produce an internal power voltage. Another four diode-connected transistors form a start-up diode bridge that generates a comparator power voltage and a reference ground. The start-up diode bridge operates even during initial start-up before the comparator and boost drivers operate. A comparator receives the A.C. input and controls timing of voltage boost drivers that alternately drive gates of the four p-channel transistors in the transistor bridge with voltages boosted higher than the peak A.C. voltage. Substrates are connected to the power voltage on the power-voltage half of the bridge and to the A.C. inputs on the ground half of the bridge to fully shut off transistors, preventing reverse current flow.

摘要翻译： 桥式整流器在诸如由射频识别（RFID）设备接收的低交流输入电压下工作。 避免了由桥二极管引起的电压降。 四个P沟道晶体管布置在跨越交流输入的晶体管桥中以产生内部电源电压。 另外四个二极管连接的晶体管形成起始二极管电桥，产生比较器电源电压和参考地。 在比较器和升压驱动器运行之前，起动二极管桥即使在初始启动期间也工作。 比较器接收交流输入并且控制升压驱动器的定时，其交替地驱动晶体管桥中的四个p沟道晶体管的栅极，其电压升高高于峰值交流电压。 基板连接到桥的电源电压一半的电源电压和桥接器的一半的交流输入，以完全关闭晶体管，防止反向电流流动。

公开(公告)号：US20130049628A1

公开(公告)日：2013-02-28

申请号：US13218426

申请日：2011-08-25

申请人： Kwok Kuen (David) KWONG ,  Lee L. YANG ,  Yunlong LI ,  Weina ZHOU

发明人： Kwok Kuen (David) KWONG ,  Lee L. YANG ,  Yunlong LI ,  Weina ZHOU

IPC分类号： H05B37/02

CPC分类号： G09G3/3406 ,  H05B33/0818

摘要： A light-emitting diode (LED) driver provides faster rise and fall times for LED current to reduce image sticking and other interference. A standard DC-DC converter provides a sum current that is slowly ramped up and down by a bypass current digital-to-analog converter (DAC). A digital value to the bypass current DAC is ramped up or down before an LED current is turned on or off. When the LED current is turned on, current is shifted from a bypass path to a path through the LED, maintaining a constant sum current from the DC-DC converter. When a different LED is turned on, current is shifted from one LED's path to the other LED's path. Separate LED current DAC's in each LED path and in the bypass path can share the sum current with digital precision. Using a single DAC for the sum current and switches in each path reduces cost.

摘要翻译： 发光二极管（LED）驱动器为LED电流提供更快的上升和下降时间，以减少图像残留和其他干扰。 标准DC-DC转换器提供由旁路电流数模转换器（DAC）缓慢上升和下降的和电流。 在LED电流打开或关闭之前，旁路电流DAC的数字值上升或下降。 当LED电流接通时，电流从旁路路径移动到通过LED的路径，保持来自DC-DC转换器的恒定的和电流。 当不同的LED打开时，电流从一个LED的路径移动到另一个LED的路径。 每个LED路径和旁路路径中的独立LED电流DAC可以以数字精度共享和电流。 使用单个DAC作为每个路径的总和电流和开关可以降低成本。

公开(公告)号：US08258852B2

公开(公告)日：2012-09-04

申请号：US12948890

申请日：2010-11-18

申请人： Lap Chi David Leung ,  Yat Tung Lai ,  Chun Fai Wong ,  Kam Hung Chan ,  Kwok Kuen David Kwong

发明人： Lap Chi David Leung ,  Yat Tung Lai ,  Chun Fai Wong ,  Kam Hung Chan ,  Kwok Kuen David Kwong

IPC分类号： H03K17/16

CPC分类号： H03K17/063 ,  H02P7/04 ,  H03K17/0822 ,  H03K2217/0036 ,  H03K2217/0063

摘要： A motor driver circuit for driving the gate node of a high-side driver transistor to a boosted voltage from a charge pump draws little or no static current from the charge pump. The gate node is pulled to the boosted voltage by a p-channel pullup-control transistor that is driven by p-channel transistors that are pumped by capacitors that cut off current flow to ground from the charge pump. An n-channel output-shorting transistor shorts the gate node to the output when the high-side driver is turned off. A coupling capacitor initializes the shorting transistor for each output transition. A p-channel output-sensing transistor generates a feedback to a second stage that drives the coupling capacitor. P-channel diode transistors and an n-channel equalizing transistor control the voltage on the coupling capacitor.

摘要翻译： 用于将高侧驱动晶体管的栅极节点驱动到来自电荷泵的升压电压的电动机驱动器电路很少或没有来自电荷泵的静态电流。 栅极节点被p沟道上拉控制晶体管拉到升压电压，该p沟道上拉控制晶体管由p沟道晶体管驱动，该p沟道晶体管由电容器泵浦，该电流从电荷泵截止电流流向地电。 当高侧驱动器关闭时，n沟道输出短路晶体管将栅极节点短路到输出。 耦合电容器为每个输出跃迁初始化短路晶体管。 p沟道输出感测晶体管产生反馈到驱动耦合电容器的第二级。 P沟道二极管晶体管和n沟道均衡晶体管控制耦合电容器上的电压。

公开(公告)号：US08188798B1

公开(公告)日：2012-05-29

申请号：US12948896

申请日：2010-11-18

申请人： Chi Tak (Gerry) Leung ,  Chik Wai (David) Ng ,  Hing Kit Kwan ,  Wai Kit (Victor) So ,  Po Wah (Patrick) Chang ,  Wing Cheong Mak ,  Kwok Kuen (David) Kwong

发明人： Chi Tak (Gerry) Leung ,  Chik Wai (David) Ng ,  Hing Kit Kwan ,  Wai Kit (Victor) So ,  Po Wah (Patrick) Chang ,  Wing Cheong Mak ,  Kwok Kuen (David) Kwong

IPC分类号： H03B29/00 ,  H03K3/26

CPC分类号： H03L7/08

摘要： A frequency dithering circuit reduces emissions that cause Electro-Magnetic Interference (EMI) by spreading the spectrum of a clock. The clock sequences a counter that drives a digital count value to a digital-to-analog converter (DAC). The DAC outputs a sawtooth wave with a wide voltage swing. A subtractor scales down the voltage swing to produce a reduced-swing sawtooth wave which is used as an upper limit voltage. Comparators trigger a set-reset latch to toggle the clock when current pumps charge and discharge a capacitor beyond voltage limits. Since the upper limit voltage is the reduced sawtooth wave from the subtractor, the amount of time to charge the capacitor varies, dithering the period of the clock. The degree of dithering can be adjusted by programming the feedback resistance in the subtractor. The subtractor reduces the sensitivity of dithering to errors in the DAC, allowing for an inexpensive, less precise DAC.

摘要翻译： 频率抖动电路通过扩展时钟的频谱来减少引起电磁干扰（EMI）的辐射。 该时钟是将数字计数值驱动到数模转换器（DAC）的计数器。 DAC输出宽电压摆幅的锯齿波。 减法器缩小电压摆幅，产生用作上限电压的减小摆动锯齿波。 当电流泵对电容器充电和放电超过电压限制时，比较器触发设置复位锁存器来切换时钟。 由于上限电压是来自减法器的减少的锯齿波，所以对电容器充电的时间量变化，使时钟的周期抖动。 可以通过对减法器中的反馈电阻进行编程来调整抖动度。 减法器可降低抖动对DAC误差的灵敏度，从而实现廉价，精度更低的DAC。

公开(公告)号：US08179455B2

公开(公告)日：2012-05-15

申请号：US12722148

申请日：2010-03-11

申请人： Lap Chi (David) Leung ,  Yat Tung Lai ,  Chun Fai Wong ,  Kam Hung Chan ,  Kwok Kuen (David) Kwong

发明人： Lap Chi (David) Leung ,  Yat Tung Lai ,  Chun Fai Wong ,  Kam Hung Chan ,  Kwok Kuen (David) Kwong

IPC分类号： H04N5/217

CPC分类号： H04N5/361 ,  H04N5/3575

摘要： A Optical Black Pixel (OBP) cancellation circuit corrects offsets in sensors in a CCD/CMOS image sensor when reading dark pixels such at the periphery. A pixel voltage is switched to a sampling capacitor during two phases of the same pixel pulse. Sampling capacitors and feedback capacitors connect to differential inputs of an amplifier. An accumulating capacitor accumulates voltage differences and generates a common-mode voltage that is fed back to another sampling capacitor that stores an amplifier offset. The sampling capacitor and accumulating capacitor and their associated switches form a discrete-time first-order low-pass filter that filters the pixel voltage during the first phase. In the second phase the amplifier acts as a unity-gain amplifier to output an average of the pixel voltage differences generated during an OBP time when blackened or covered pixels are read from the image sensor.

摘要翻译： 当在外围读取暗像素时，光学黑色像素（OBP）消除电路校正CCD / CMOS图像传感器中的传感器的偏移。 在相同像素脉冲的两个相位期间，将像素电压切换到采样电容器。 采样电容器和反馈电容器连接到放大器的差分输入。 累积电容器累积电压差并产生反馈到存储放大器偏移的另一采样电容器的共模电压。 采样电容器和累加电容器及其相关的开关形成离散时间一阶低通滤波器，其在第一阶段期间对像素电压进行滤波。 在第二阶段，放大器用作单位增益放大器，以输出从图像传感器读取黑化或覆盖像素时在OBP时间期间产生的像素电压差的平均值。

公开(公告)号：US07999512B2

公开(公告)日：2011-08-16

申请号：US12336514

申请日：2008-12-16

申请人： Kwok Kuen David Kwong ,  Yat To William Wong ,  Ho Ming Karen Wan ,  Chik Wai David Ng

发明人： Kwok Kuen David Kwong ,  Yat To William Wong ,  Ho Ming Karen Wan ,  Chik Wai David Ng

IPC分类号： H02J7/00

CPC分类号： H02J7/0031

摘要： A charge/discharge protection circuit protects a battery from inadvertent shorting on a charger node that can connect to a charger or to a power supply of a portable electronic device. A single n-channel power transistor has a gate that controls a channel between the battery and the charger node. The gate is connected to the charger node by a gate-coupling transistor to turn off the power transistor, providing battery isolation. The gate is driven by a voltage-boosted clock through a switch activated by an enable signal. The enable signal also activates a grounding transistor to ground a gate of the gate-coupling transistor. A comparator compares voltages of the charger and battery nodes, and the compare output is latched to generate the enable signal. An inverse enable signal activates a second switch that drives the voltage-boosted clock to the gate of the gate-coupling transistor to turn off the power transistor.

摘要翻译： 充电/放电保护电路可保护电池免受可连接到充电器或便携式电子设备的电源的充电器节点上的意外短路。 单个n沟道功率晶体管具有控制电池和充电器节点之间的通道的栅极。 门通过栅极耦合晶体管连接到充电器节点，以关闭功率晶体管，从而提供电池隔离。 门通过由使能信号激活的开关由升压时钟驱动。 使能信号还激活接地晶体管以对栅极耦合晶体管的栅极接地。 比较器比较充电器和电池节点的电压，并且比较输出被锁存以产生使能信号。 反向使能信号激活第二开关，其将升压电压的时钟驱动到栅极耦合晶体管的栅极以截止功率晶体管。

公开(公告)号：US08581519B2

公开(公告)日：2013-11-12

申请号：US13218426

申请日：2011-08-25

申请人： Kwok Kuen (David) Kwong ,  Lee L. Yang ,  Yunlong Li ,  Weina Zhou

发明人： Kwok Kuen (David) Kwong ,  Lee L. Yang ,  Yunlong Li ,  Weina Zhou

IPC分类号： H05B37/02

CPC分类号： G09G3/3406 ,  H05B33/0818

摘要： A light-emitting diode (LED) driver provides faster rise and fall times for LED current to reduce image sticking and other interference. A standard DC-DC converter provides a sum current that is slowly ramped up and down by a bypass current digital-to-analog converter (DAC). A digital value to the bypass current DAC is ramped up or down before an LED current is turned on or off. When the LED current is turned on, current is shifted from a bypass path to a path through the LED, maintaining a constant sum current from the DC-DC converter. When a different LED is turned on, current is shifted from one LED's path to the other LED's path. Separate LED current DAC's in each LED path and in the bypass path can share the sum current with digital precision. Using a single DAC for the sum current and switches in each path reduces cost.

摘要翻译： 发光二极管（LED）驱动器为LED电流提供更快的上升和下降时间，以减少图像残留和其他干扰。 标准DC-DC转换器提供由旁路电流数模转换器（DAC）缓慢上升和下降的和电流。 在LED电流打开或关闭之前，旁路电流DAC的数字值上升或下降。 当LED电流接通时，电流从旁路路径移动到通过LED的路径，保持来自DC-DC转换器的恒定的和电流。 当不同的LED打开时，电流从一个LED的路径移动到另一个LED的路径。 每个LED路径和旁路路径中的独立LED电流DAC可以以数字精度共享和电流。 使用单个DAC作为每个路径的总和电流和开关可以降低成本。

公开(公告)号：US08300431B2

公开(公告)日：2012-10-30

申请号：US12718707

申请日：2010-03-05

申请人： Chik Wai (David) Ng ,  Hing Kit Kwan ,  Po Wah (Patrick) Chang ,  Wai Kit (Victor) So ,  Kwok Kuen (David) Kwong

发明人： Chik Wai (David) Ng ,  Hing Kit Kwan ,  Po Wah (Patrick) Chang ,  Wai Kit (Victor) So ,  Kwok Kuen (David) Kwong

IPC分类号： H02M3/335

CPC分类号： H02M3/335

摘要： A fly-back AC-DC power converter has a constant-current control loop that senses the primary output current in a transformer to control the secondary output without an expensive opto-isolator. A primary-side control circuit can use either a Quasi-Resonant (QR) or a Pulse-Width-Modulation (PWM) control loop to switch primary current through the transformer on and off. A feedback voltage is compared to a primary-side voltage sensed from the primary current loop to turn the switch on and off. A multiplier loop generates the feedback voltage using a multiplier. A level-shift inverter and a low-pass filter act as the multiplier by multiplying an off duty cycle of the switch by the feedback voltage to generate a filtered voltage. A high-gain error amp compares the filtered voltage to a reference voltage to generate the feedback voltage. The multiplier produces a simple relationship between the secondary current and the reference voltage, yielding simplified current control.

摘要翻译： 回扫AC-DC电力转换器具有恒定电流控制回路，其感测变压器中的主要输出电流，以在没有昂贵的光隔离器的情况下控制次级输出。 初级侧控制电路可以使用准谐振（QR）或脉冲宽度调制（PWM）控制回路来切换通过变压器的一次电流的开和关。 将反馈电压与从初级电流回路感测的初级侧电压进行比较，以打开和关闭开关。 乘法器环路使用乘法器产生反馈电压。 电平移位反相器和低通滤波器通过将开关的占空比乘以反馈电压作为乘法器，以产生滤波电压。 高增益误差放大器将滤波电压与参考电压进行比较，以产生反馈电压。 乘法器产生二次电流和参考电压之间的简单关系，产生简化的电流控制。

公开(公告)号：US08193854B2

公开(公告)日：2012-06-05

申请号：US12651993

申请日：2010-01-04

申请人： Xiao Fei Kuang ,  Kam Chuen Wan ,  Kwai Chi Chan ,  Yat To (William) Wong ,  Kwok Kuen (David) Kwong

发明人： Xiao Fei Kuang ,  Kam Chuen Wan ,  Kwai Chi Chan ,  Yat To (William) Wong ,  Kwok Kuen (David) Kwong

IPC分类号： G05F3/02

CPC分类号： G05F3/30 ,  H01C17/22

摘要： A bandgap reference circuit has trimming-up resistors and trimming-down resistors for bi-directional trimming. PNP transistors have base and collectors grounded and emitters connected to parallel resistors. A difference resistor drives an inverting input of an op amp that drives a transistor that generates the bandgap reference voltage Vbg. A sensing resistor connects Vbg to a splitting node that connects to the non-inverting input through a first parallel resistor. The splitting node also connects through a second parallel resistor to the inverting input. Fuses or switches enable the trimming-up and trimming-down resistors. The trimming-up resistors are in series with the sensing resistor and the trimming-down resistors are in series with an output resistor that connects Vbg to reference voltage Vref. The circuit can be designed for a more typical process since bi-directional trimming allows Vref to be raised or lowered. Many circuits need no trimming when targeted for the typical process.

摘要翻译： 带隙参考电路具有用于双向修剪的微调电阻和微调电阻。 PNP晶体管的基极和集电极接地，发射极连接到并联电阻。 差分电阻驱动驱动产生带隙参考电压Vbg的晶体管的运算放大器的反相输入。 感测电阻器将Vbg连接到通过第一并联电阻器连接到非反相输入的分离节点。 分离节点还通过第二并联电阻器连接到反相输入端。 保险丝或开关使能微调和微调电阻。 修整电阻与感测电阻串联，并且减法电阻与将Vbg连接到参考电压Vref的输出电阻串联。 该电路可以设计用于更典型的工艺，因为双向修整允许Vref被升高或降低。 许多电路在针对典型过程时不需要修剪。

公开(公告)号：US20100164625A1

公开(公告)日：2010-07-01

申请号：US12345862

申请日：2008-12-30

申请人： Yat To (William) Wong ,  Chik Wai (David) Ng ,  Ho Ming (Karen) Wan ,  Kam Chuen Wan ,  Kwok Kuen (David) Kwong

发明人： Yat To (William) Wong ,  Chik Wai (David) Ng ,  Ho Ming (Karen) Wan ,  Kam Chuen Wan ,  Kwok Kuen (David) Kwong

IPC分类号： H03F3/45

CPC分类号： H03F3/45197 ,  H03F3/3023 ,  H03F3/45475 ,  H03F2203/45248 ,  H03F2203/45646 ,  H03F2203/45652 ,  H03F2203/45678

摘要： An error amplifier can be used to control a power regulator transistor. The error amplifier has a main amplifier, a pull-up auxiliary amplifier, and a pull-down auxiliary amplifier that all drive an output. A compensating capacitor on the output sets a single dominant pole for all amplifiers, increasing stability. High slew rates are provided by increased slew current from the auxiliary amplifiers that turn on when the differential input has an absolute voltage difference larger than an intentional offset. The intentional offset is introduced into the auxiliary amplifiers by adjusting a p-channel to n-channel transistor ratio in a leg of the auxiliary amplifiers. A source degenerated resistor in the main amplifier reduces supply headroom and increases linearity by connecting sources of two differential transistors that receive the differential input. Cascode transistors increase gain and output impedance. Reliability is increased as no positive feedback is used in the amplifiers.

摘要翻译： 误差放大器可用于控制功率调节晶体管。 误差放大器具有主放大器，上拉辅助放大器和全部驱动输出的下拉辅助放大器。 输出上的补偿电容为所有放大器设置单个主极，从而提高稳定性。 当差分输入具有大于有意偏移的绝对电压差时，来自辅助放大器的增加的转换电流提供高转换速率。 通过调整辅助放大器的一个支路中的p沟道至n沟道晶体管比，将有意的偏移引入辅助放大器。 主放大器中的源极退化电阻通过连接接收差分输入的两个差分晶体管的源极减小了供电余量并增加了线性度。 串联晶体管增加了增益和输出阻抗。 在放大器中没有使用正反馈的情况下，可靠性提高。