-
11.发明申请公开(公告)号：US20120246381A1
公开(公告)日：2012-09-27
申请号：US13309750
申请日：2011-12-02
申请人： Andy Kegel , Mark Hummel , Steve Glaser , Tony Asaro , Philip NG , Jeffrey Cheng
发明人： Andy Kegel , Mark Hummel , Steve Glaser , Tony Asaro , Philip NG , Jeffrey Cheng
IPC分类号： G06F12/10
CPC分类号： G06F12/109 , G06F12/1009 , G06F12/1081 , G06F2212/151 , G06F2212/651
摘要： Embodiments of the present invention provide methods, systems, and computer readable media for input output memory management unit (IOMMU) two-layer addressing in the context of memory address translations for I/O devices. According to an embodiment, a method includes translating a guest virtual address (GVA) to a corresponding guest physical address (GPA) using a guest address translation table according to a process address space identifier associated with an address translation transaction associated with an I/O device, and translating the GPA to a corresponding system physical address (SPA) using a system address translation table according to a device identifier associated with the address translation transaction.
摘要翻译： 本发明的实施例提供了用于I / O设备的存储器地址转换的上下文中的输入输出存储器管理单元（IOMMU）双层寻址的方法，系统和计算机可读介质。 根据实施例，一种方法包括根据与与I / O相关联的地址转换事务相关联的进程地址空间标识符，使用访客地址转换表将访客虚拟地址（GVA）翻译成相应的客体物理地址（GPA） 设备，并且根据与地址转换事务相关联的设备标识符，使用系统地址转换表将GPA转换为相应的系统物理地址（SPA）。
-
公开(公告)号：US20120147021A1
公开(公告)日：2012-06-14
申请号：US13289260
申请日：2011-11-04
IPC分类号： G06T1/00
CPC分类号： G06F9/545 , G06F2209/509
摘要： A method, system, and computer program product are disclosed for providing improved access to accelerated processing device compute resources to user mode applications. The functionality disclosed allows user mode applications to provide commands to an accelerated processing device without the need for kernel mode transitions in order to access a unified ring buffer. Instead, applications are each provided with their own buffers, which the accelerated processing device hardware can access to process commands. With full operating system support, user mode applications are able to utilize the accelerated processing device in much the same way as a CPU.
摘要翻译： 公开了一种方法，系统和计算机程序产品，用于提供对用户模式应用的加速处理设备计算资源的改进访问。 所公开的功能允许用户模式应用程序向加速处理设备提供命令，而不需要内核模式转换以便访问统一的环形缓冲区。 相反，应用程序各自提供有自己的缓冲区，加速处理设备硬件可以访问进程命令。 通过完整的操作系统支持，用户模式应用程序能够以与CPU相同的方式利用加速处理设备。
-
公开(公告)号：US20110057939A1
公开(公告)日：2011-03-10
申请号：US12719628
申请日：2010-03-08
申请人： David I.J. GLEN , Philip J. Rogers , Gordon F. Caruk , Gongxian Jeffrey Cheng , Mark Hummel , Stephen Patrick Thompson , Anthony Asaro
发明人： David I.J. GLEN , Philip J. Rogers , Gordon F. Caruk , Gongxian Jeffrey Cheng , Mark Hummel , Stephen Patrick Thompson , Anthony Asaro
CPC分类号： G06F3/14 , G09G5/001 , G09G5/363 , G09G5/393 , G09G2350/00 , G09G2360/121
摘要： Disclosed herein are systems, apparatuses, and methods for enabling efficient reads to a local memory of a processing unit. In an embodiment, a processing unit includes an interface and a buffer. The interface is configured to (i) send a request for a portion of data in a region of a local memory of an other processing unit and (ii) receive, responsive to the request, all the data from the region. The buffer is configured to store the data from the region of the local memory of the other processing unit.
摘要翻译： 这里公开了用于实现对处理单元的本地存储器的高效读取的系统，装置和方法。 在实施例中，处理单元包括接口和缓冲器。 该接口被配置为（i）向另一个处理单元的本地存储器的区域中的一部分数据发送请求，以及（ii）响应该请求从该区域接收所有数据。 缓冲器被配置为存储来自另一处理单元的本地存储器的区域的数据。
-
14.发明申请Avoiding silent data corruption and data leakage in a virtual environment with multiple guests 有权避免在具有多个guest虚拟机的虚拟环境中静默的数据损坏和数据泄露公开(公告)号：US20070038840A1
公开(公告)日：2007-02-15
申请号：US11503391
申请日：2006-08-11
IPC分类号： G06F12/00
CPC分类号： G06F12/1081 , G06F12/1027 , G06F2212/683
摘要： In an embodiment, an input/output memory management unit (IOMMU) is configured to receive a completion wait command defined to ensure that one or more preceding invalidation commands are completed by the IOMMU prior to a completion of the completion wait command. The IOMMU is configured to respond to the completion wait command by delaying completion of the completion wait command until: (1) a read response corresponding to each outstanding memory read operation that depends on a translation entry that is invalidated by the preceding invalidation commands is received; and (2) the control unit transmits one or more operations upstream to ensure that each memory write operation that depends on the translation table entry that is invalidated by the preceding invalidation commands has at least reached a bridge to a coherent fabric in the computer system and has become visible to the system.
摘要翻译： 在一个实施例中，输入/输出存储器管理单元（IOMMU）被配置为接收定义的完成等待命令，以在完成等待命令完成之前确保由IOMMU完成一个或多个以前的无效命令。 IOMMU被配置为通过延迟完成等待命令的完成来响应完成等待命令，直到：（1）接收与取决于由前述无效命令无效的转换条目的每个未完成存储器读操作对应的读响应 ; （2）控制单元向上游发送一个或多个操作，以确保依赖于由前述无效命令无效的转换表项的每个存储器写入操作至少达到计算机系统中的相干结构的桥接，以及 已经变得对系统可见。
-
15.发明授权公开(公告)号：US09154451B2
公开(公告)日：2015-10-06
申请号：US13590700
申请日：2012-08-21
IPC分类号： G06F15/177 , H04L12/931 , G06F9/455
CPC分类号： H04L49/70 , G06F9/45558 , G06F2009/45579 , H04L49/356
摘要： Described are systems and methods for communication between a plurality of electronic devices and an aggregation device. An aggregation device processes instructions related to a configuration of an electronic device in communication with the aggregation device. One or more virtual devices are generated in response to processing the instructions. The electronic device enumerates a configuration space to determine devices for use by the electronic device. The aggregation device detects an access of the configuration space by the electronic device. The one or more virtual devices are presented from the aggregation device to the electronic device in accordance with the instructions.
摘要翻译： 描述了用于多个电子设备和聚合设备之间的通信的系统和方法。 聚合设备处理与聚合设备通信的电子设备的配置相关的指令。 响应于处理指令而产生一个或多个虚拟设备。 电子设备列举配置空间以确定电子设备使用的设备。 聚合设备检测电子设备对配置空间的访问。 一个或多个虚拟设备根据指令从聚合设备呈现给电子设备。
-
公开(公告)号：US20130262775A1
公开(公告)日：2013-10-03
申请号：US13436767
申请日：2012-03-30
申请人： Anthony ASARO , Kevin Normoyle , Mark Hummel , Norman Rubin , Mark Fowler
发明人： Anthony ASARO , Kevin Normoyle , Mark Hummel , Norman Rubin , Mark Fowler
IPC分类号： G06F12/08
CPC分类号： G06F12/0891 , G06F12/0815 , G06F12/0837 , G06F12/0877 , G06F12/123 , G06F12/126 , G06F12/128
摘要： Embodiments of the present invention provides for the execution of threads and/or workitems on multiple processors of a heterogeneous computing system in a manner that they can share data correctly and efficiently. Disclosed method, system, and article of manufacture embodiments include, responsive to an instruction from a sequence of instructions of a work-item, determining an ordering of visibility to other work-items of one or more other data items in relation to a particular data item, and performing at least one cache operation upon at least one of the particular data item or the other data items present in any one or more cache memories in accordance with the determined ordering. The semantics of the instruction includes a memory operation upon the particular data item.
摘要翻译： 本发明的实施例提供在异构计算系统的多个处理器上执行线程和/或工作项，以使得它们可以正确且有效地共享数据。 公开的方法，系统和制品实施例包括响应于来自工作项目的指令序列的指令，确定与特定数据相关的一个或多个其他数据项的其他工作项的可见性的排序 并且根据所确定的顺序对存在于任何一个或多个高速缓存存储器中的特定数据项或其他数据项中的至少一个执行至少一个高速缓存操作。 指令的语义包括对特定数据项的存储器操作。
-
公开(公告)号：US20070038839A1
公开(公告)日：2007-02-15
申请号：US11503390
申请日：2006-08-11
IPC分类号： G06F12/00
CPC分类号： G06F12/1081 , G06F12/1027 , G06F12/145
摘要： In an embodiment, a computer system comprises a processor; a memory management module comprising a plurality of instructions executable on the processor; a memory coupled to the processor; and an input/output memory management unit (IOMMU) coupled to the memory. The IOMMU is configured to implement address translation and memory protection for memory operations sourced by one or more input/output (I/O) devices. The memory stores a command queue during use. The memory management module is configured to write one or more control commands to the command queue, and the IOMMU is configured to read the control commands from the command queue and execute the control commands.
摘要翻译： 在一个实施例中，计算机系统包括处理器; 存储器管理模块，包括可在所述处理器上执行的多个指令; 耦合到处理器的存储器; 以及耦合到存储器的输入/输出存储器管理单元（IOMMU）。 IOMMU被配置为对由一个或多个输入/输出（I / O）设备提供的存储器操作实现地址转换和存储器保护。 内存在使用过程中存储命令队列。 存储器管理模块被配置为将一个或多个控制命令写入命令队列，并且IOMMU被配置为从命令队列读取控制命令并执行控制命令。
-
公开(公告)号：US09253287B2
公开(公告)日：2016-02-02
申请号：US13589463
申请日：2012-08-20
CPC分类号： H04L67/40
摘要： Described are a system and method for lossless message delivery between two processing devices. Each device includes a remote direct memory access (RDMA) messaging interface. The RDMA messaging interface at the first device generates one or more messages that are processed by the RDMA messaging interface of the second device. The RDMA messaging interface of the first device outputs a notification to the second device that a message of the one or more messages is available at the first device. A determination is made that the second device has resources to accommodate the message. The second device performs an operation in response to determining that the processing device has the resources to accommodate the message.
摘要翻译： 描述了用于两个处理设备之间无损消息传递的系统和方法。 每个设备包括远程直接内存访问（RDMA）消息接口。 第一设备上的RDMA消息接口生成由第二设备的RDMA消息接发处理的一个或多个消息。 第一设备的RDMA消息接口向第二设备输出一个或多个消息的消息在第一设备可用的通知。 确定第二设备具有容纳消息的资源。 第二装置响应于确定处理装置具有容纳消息的资源而执行操作。
-
公开(公告)号：US09176794B2
公开(公告)日：2015-11-03
申请号：US13289260
申请日：2011-11-04
CPC分类号： G06F9/545 , G06F2209/509
摘要： A method, system, and computer program product are disclosed for providing improved access to accelerated processing device compute resources to user mode applications. The functionality disclosed allows user mode applications to provide commands to an accelerated processing device without the need for kernel mode transitions in order to access a unified ring buffer. Instead, applications are each provided with their own buffers, which the accelerated processing device hardware can access to process commands. With full operating system support, user mode applications are able to utilize the accelerated processing device in much the same way as a CPU.
摘要翻译： 公开了一种方法，系统和计算机程序产品，用于提供对用户模式应用的加速处理设备计算资源的改进访问。 所公开的功能允许用户模式应用程序向加速处理设备提供命令，而不需要内核模式转换以便访问统一的环形缓冲区。 相反，应用程序各自提供有自己的缓冲区，加速处理设备硬件可以访问进程命令。 通过完整的操作系统支持，用户模式应用程序能够以与CPU相同的方式利用加速处理设备。
-
公开(公告)号：US08868672B2
公开(公告)日：2014-10-21
申请号：US13470847
申请日：2012-05-14
申请人： Mark Hummel , David E. Mayhew , Michael J. Osborn
发明人： Mark Hummel , David E. Mayhew , Michael J. Osborn
IPC分类号： G06F15/167
CPC分类号： G06F15/1735 , G06F15/167 , H04L49/9063 , H04L67/2833
摘要： Described are systems and methods for interconnecting devices. A switch fabric is in communication with a plurality of electronic devices. A rendezvous memory is in communication with the switch fabric. Data is transferred to the rendezvous memory from a first electronic device of the plurality of electronic devices in response to a determination that the data is ready for output from a memory at the first electronic device and in response to a location allocated in the rendezvous memory for the data.
摘要翻译： 描述了用于互连设备的系统和方法。 交换结构与多个电子设备通信。 会合记忆体与交换结构通信。 响应于确定数据准备好从第一电子设备上的存储器输出并且响应于在会合存储器中分配的位置，数据被从多个电子设备的第一电子设备传送到会合存储器 数据。
-
-
-
-
-
-
-
-
-
搜索结果
50 条记录 (耗时 0.015 秒)