公开(公告)号：US07619608B2

公开(公告)日：2009-11-17

申请号：US10829294

申请日：2004-04-22

申请人： Yong-Uk Lee ,  Bo-Sung Kim ,  Mun-Pyo Hong

发明人： Yong-Uk Lee ,  Bo-Sung Kim ,  Mun-Pyo Hong

IPC分类号： G09G3/34

CPC分类号： G02F1/167 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/123

摘要： An electrophoretic display (EPD) shows a high contrast and a color display. The EPD blocks a channel of a thin film transistor from an incident light in order to prevent a current leakage. The color display may also include a white, black, red, green, blue, yellow, cyan, magenta or other color pigment in a micro-capsule.

摘要翻译： 电泳显示器（EPD）显示高对比度和彩色显示。 EPD阻挡来自入射光的薄膜晶体管的通道，以防止电流泄漏。 彩色显示器还可以包括微胶囊中的白色，黑色，红色，绿色，蓝色，黄色，青色，品红色或其他彩色颜料。

公开(公告)号：US07507996B2

公开(公告)日：2009-03-24

申请号：US10754572

申请日：2004-01-12

申请人： Mun-Pyo Hong ,  Sang-Gab Kim

发明人： Mun-Pyo Hong ,  Sang-Gab Kim

IPC分类号： H01L27/12

CPC分类号： G02F1/1362 ,  G02F1/136286 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/458

摘要： First, a conductive material made of aluminum-based material is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode. A gate insulating layer is formed, and a semiconductor layer and an ohmic contact layer are sequentially formed. Next, a conductor layer including a lower layer of Cr and an upper layer of aluminum-based material is deposited and patterned to form a data wire include a data line intersecting the gate line, a source electrode, a drain electrode and a data pad. Then, a passivation layer is deposited and patterned to form contact holes exposing the drain electrode, the gate pad and the data pad, respectively. Next, an amorphous silicon layer is deposited, an annealing process is executed to form inter-layer reaction layers on the drain electrode, the gate pa and the data pad, which are exposed through the contact holes. Then, the amorphous silicon layer is removed. Next, IZO is deposited and patterned to form a pixel electrode, a redundant gate pad and a redundant data pad respectively and electrically connected to the drain electrode, the gate pad and the data pad via the inter-layer reaction layers.

摘要翻译： 首先，将由铝基材料制成的导电材料沉积并图案化以形成包括栅极线，栅极焊盘和栅电极的栅极线。 形成栅绝缘层，依次形成半导体层和欧姆接触层。 接下来，沉积包括下层Cr的导体层和铝基材料的上层，并构图以形成包括与栅极线相交的数据线，源电极，漏电极和数据焊盘的数据线。 然后，沉积并图案化钝化层以形成分别暴露漏电极，栅极焊盘和数据焊盘的接触孔。 接下来，沉积非晶硅层，执行退火处理，以在漏电极，栅极pa和数据焊盘上形成通过接触孔露出的层间反应层。 然后，去除非晶硅层。 接下来，IZO被沉积和图案化以分别形成像素电极，冗余栅极焊盘和冗余数据焊盘，并经由层间反应层电连接到漏电极，栅极焊盘和数据焊盘。

公开(公告)号：US07507994B2

公开(公告)日：2009-03-24

申请号：US11625694

申请日：2007-01-22

申请人： Bum-Ki Baek ,  Mun-Pyo Hong ,  Jang-Soo Kim ,  Sung-Wook Hao ,  Jong-Soo Yoon ,  Doug-Gyu Kim

发明人： Bum-Ki Baek ,  Mun-Pyo Hong ,  Jang-Soo Kim ,  Sung-Wook Hao ,  Jong-Soo Yoon ,  Doug-Gyu Kim

IPC分类号： H01L29/04

CPC分类号： G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/136236 ,  G02F2001/136272 ,  G02F2001/13629 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66765 ,  Y10S438/949

摘要： A conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and molybdenum alloy and an upper layer made of aluminum or aluminum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a substrate. At this time, the upper layer of the gate pad is removed using a photoresist pattern having different thicknesses depending on position as etch mask. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire including a data line, a source electrode, a drain electrode, and a data pad.

摘要翻译： 包括由诸如铬，钼和钼合金的难熔金属制成的下层和由铝或铝合金制成的上层的导电层被沉积和图案化以形成包括栅极线，栅极焊盘， 以及在基板上的栅电极。 此时，根据作为蚀刻掩模的位置，使用具有不同厚度的光致抗蚀剂图案去除栅极焊盘的上层。 依次形成栅极绝缘层，半导体层和欧姆接触层。 导电材料被沉积并图案化以形成包括数据线，源电极，漏电极和数据焊盘的数据线。

公开(公告)号：US07507594B2

公开(公告)日：2009-03-24

申请号：US10554718

申请日：2005-02-11

申请人： Jong-Hyun Seo ,  Mun-Pyo Hong ,  Dae-Ok Kim

发明人： Jong-Hyun Seo ,  Mun-Pyo Hong ,  Dae-Ok Kim

IPC分类号： H01L21/00

CPC分类号： H01L27/12 ,  G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/13629 ,  H01L27/124 ,  H01L27/1288

摘要： A method of manufacturing a contact portion is provided, which includes: forming a first signal line on a substrate (110), forming a insulating layer (140) covering the first signal line and having a contact hole (182, 185) exposing the first signal line; forming a contact layer (700) on the exposed surface of the first signal through the contact hole; and forming a second signal line (82, 190) connected to the first signal line via the contact layer. Wherein the first signal line is made of Al or Al alloy, and the second signal line is made of ITO or IZO.

摘要翻译： 提供一种制造接触部分的方法，其包括：在衬底（110）上形成第一信号线，形成覆盖第一信号线的绝缘层（140），并具有暴露第一信号线的接触孔（182,185） 信号线 通过接触孔在第一信号的暴露表面上形成接触层（700）; 以及形成经由所述接触层连接到所述第一信号线的第二信号线（82,190）。 其中第一信号线由Al或Al合金制成，第二信号线由ITO或IZO制成。

公开(公告)号：US20080131986A1

公开(公告)日：2008-06-05

申请号：US12015297

申请日：2008-01-16

申请人： YONG UK LEE ,  Bo-Sung Kim ,  Min-Seong Ryu ,  Mun-Pyo Hong

发明人： YONG UK LEE ,  Bo-Sung Kim ,  Min-Seong Ryu ,  Mun-Pyo Hong

IPC分类号： H01L21/70

CPC分类号： H01L27/283 ,  H01L27/3272 ,  H01L27/3274 ,  H01L51/0036 ,  H01L51/0053 ,  H01L51/0055 ,  H01L51/0068 ,  H01L51/0078 ,  H01L51/0545

摘要： An organic thin film transistor array panel is provided, which includes: a substrate; a data line formed on the substrate and including a source electrode; a drain electrode formed on the substrate and separated from the data line; an organic semiconductor disposed on the source electrode and the drain electrode; a gate insulator formed on the organic semiconductor; a gate line including a gate electrode disposed on the gate insulator; a passivation layer formed on the gate line and having a first contact hole on the drain electrode; a pixel electrode connected to the drain electrode through the first contact hole; and an opaque light blocking member disposed under the organic semiconductor.

摘要翻译： 提供有机薄膜晶体管阵列面板，其包括：基板; 数据线，形成在所述基板上并且包括源电极; 漏极，形成在基板上并与数据线分离; 设置在源电极和漏电极上的有机半导体; 形成在有机半导体上的栅极绝缘体; 栅极线，包括设置在栅极绝缘体上的栅电极; 钝化层，形成在所述栅极线上，并且在所述漏极上具有第一接触孔; 通过所述第一接触孔与所述漏电极连接的像素电极; 以及设置在所述有机半导体下方的不透明遮光构件。

公开(公告)号：US07368336B2

公开(公告)日：2008-05-06

申请号：US11313431

申请日：2005-12-20

申请人： Yong-Uk Lee ,  Kyuha Chung ,  Mun-Pyo Hong ,  Do-Yeung Yoon ,  Jong-In Hong ,  Gia Kim

发明人： Yong-Uk Lee ,  Kyuha Chung ,  Mun-Pyo Hong ,  Do-Yeung Yoon ,  Jong-In Hong ,  Gia Kim

IPC分类号： H01L21/00

CPC分类号： H01L21/02118 ,  C08B37/0006 ,  H01L21/312 ,  H01L27/3244 ,  H01L51/052

摘要： An insulating film according to an embodiment of the present invention has Chemical Formula 1 wherein the Rs are equal to or different from each other, m is an integer, the Rs have Chemical Formula 2: R=R1R2R3,  (2) and R1, R2, and R3 in the Chemical Formula 2 are one selected from Chemical Formulae 3, 4 and 5, respectively (n is an integer):

公开(公告)号：US20080090404A1

公开(公告)日：2008-04-17

申请号：US11947204

申请日：2007-11-29

申请人： Seung-Taek Lim ,  Mun-Pyo Hong ,  Nam-Seok Roh ,  Young-Joo Song ,  Sang-Ki Kwak ,  Kwon-Young Choi ,  Keun-kyu Song

发明人： Seung-Taek Lim ,  Mun-Pyo Hong ,  Nam-Seok Roh ,  Young-Joo Song ,  Sang-Ki Kwak ,  Kwon-Young Choi ,  Keun-kyu Song

IPC分类号： H01L21/4763

CPC分类号： G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/13629 ,  H01L21/76805 ,  H01L21/76816 ,  H01L23/53223 ,  H01L27/124 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a method of fabricating a thin film transistor array substrate for a liquid crystal display, a gate line assembly is formed on a substrate with a chrome-based under-layer and an aluminum alloy-based over-layer while proceeding in the horizontal direction. The gate line assembly has gate lines, and gate electrodes, and gate pads. A gate insulating layer is deposited onto the insulating substrate such that the gate insulating layer covers the gate line assembly. A semiconductor layer and an ohmic contact layer are sequentially formed on the gate insulating layer. A data line assembly is formed on the ohmic contact layer with a chrome-based under-layer and an aluminum alloy-based over-layer. The data line assembly has data lines crossing over the gate lines, source electrodes, drain electrodes, and data pads. A protective layer is deposited onto the substrate, and patterned to thereby form contact holes exposing the drain electrodes, the gate pads, and the data pads. The sidewall of the under-layers for the gate line assembly and the data line assembly is exposed through the contact holes. An IZO-based layer is deposited onto the substrate, and patterned to thereby form pixel electrodes, subsidiary gate pads, and subsidiary data pads. The pixel electrodes are connected to the sidewall of the drain electrodes, and the subsidiary gate and data pads are connected to the sidewall of the gate and the data pads.

摘要翻译： 在制造用于液晶显示器的薄膜晶体管阵列基板的方法中，栅极线组件在沿水平方向前进的基底上形成有铬基底层和基于铝合金的超层。 栅极线组件具有栅极线，栅电极和栅极焊盘。 栅极绝缘层沉积在绝缘基板上，使得栅极绝缘层覆盖栅极线组件。 在栅极绝缘层上依次形成半导体层和欧姆接触层。 数据线组件在欧姆接触层上形成有铬基底层和基于铝合金的超层。 数据线组件具有跨越栅极线，源电极，漏电极和数据焊盘的数据线。 保护层沉积到衬底上，并被图案化，从而形成露出漏电极，栅极焊盘和数据焊盘的接触孔。 用于栅极线组件和数据线组件的下层的侧壁通过接触孔暴露。 将基于IZO的层沉积到衬底上并构图，从而形成像素电极，辅助栅极焊盘和辅助数据焊盘。 像素电极连接到漏电极的侧壁，辅助栅极和数据焊盘连接到栅极和数据焊盘的侧壁。

公开(公告)号：US20080012821A1

公开(公告)日：2008-01-17

申请号：US11860314

申请日：2007-09-24

申请人： Yong-Uk Lee ,  Joon-Hak Oh ,  Jong-Hyun Seo ,  Bo-Sung Kim ,  Mun-Pyo Hong

发明人： Yong-Uk Lee ,  Joon-Hak Oh ,  Jong-Hyun Seo ,  Bo-Sung Kim ,  Mun-Pyo Hong

IPC分类号： G09G3/34

CPC分类号： G02F1/167

摘要： A electrophoretic display is provided, which includes: a thin film transistor array panel including a plurality of data lines having a plurality of source electrodes and a plurality of drain electrodes, a plurality of organic semiconductor islands at least covering the portion of the source and the drain electrodes and disposed between the source and the drain electrodes, a plurality of gate insulators formed on the organic semiconductor islands, a plurality of gate lines including a plurality of gate electrodes disposed on the gate insulators, and a plurality of pixel electrodes connected to the drain electrodes; a common electrode panel facing the thin film transistor array panel and having a common electrode; and a plurality of micro-capsules containing a plurality of negative and positive pigment particles and interposed between the thin film transistor array panel and the common electrode panel.

摘要翻译： 提供一种电泳显示器，其包括：薄膜晶体管阵列面板，包括具有多个源电极和多个漏电极的多条数据线，多个有机半导体岛至少覆盖源的部分， 漏电极，并且设置在源极和漏极之间，形成在有机半导体岛上的多个栅极绝缘体，多个栅极线，包括设置在栅极绝缘体上的多个栅电极，以及多个像素电极， 漏电极; 面对薄膜晶体管阵列面板并具有公共电极的公共电极面板; 以及包含多个负极和正性颜料颗粒的多个微胶囊，并且插入在薄膜晶体管阵列面板和公共电极面板之间。

公开(公告)号：US07286281B2

公开(公告)日：2007-10-23

申请号：US11152897

申请日：2005-06-14

申请人： Yong-Uk Lee ,  Joon-Hak Oh ,  Jong-Hyun Seo ,  Bo-Sung Kim ,  Mun-Pyo Hong

发明人： Yong-Uk Lee ,  Joon-Hak Oh ,  Jong-Hyun Seo ,  Bo-Sung Kim ,  Mun-Pyo Hong

IPC分类号： G02B26/00 ,  G09G3/34 ,  G03G17/04

CPC分类号： G02F1/167

摘要： A electrophoretic display is provided, which includes: a thin film transistor array panel including a plurality of data lines having a plurality of source electrodes and a plurality of drain electrodes, a plurality of organic semiconductor islands at least covering the portion of the source and the drain electrodes and disposed between the source and the drain electrodes, a plurality of gate insulators formed on the organic semiconductor islands, a plurality of gate lines including a plurality of gate electrodes disposed on the gate insulators, and a plurality of pixel electrodes connected to the drain electrodes; a common electrode panel facing the thin film transistor array panel and having a common electrode; and a plurality of micro-capsules containing a plurality of negative and positive pigment particles and interposed between the thin film transistor array panel and the common electrode panel.

摘要翻译： 提供一种电泳显示器，其包括：薄膜晶体管阵列面板，包括具有多个源电极和多个漏电极的多条数据线，多个有机半导体岛至少覆盖源的部分， 漏电极，并且设置在源极和漏极之间，形成在有机半导体岛上的多个栅极绝缘体，多个栅极线，包括设置在栅极绝缘体上的多个栅电极，以及多个像素电极， 漏电极; 面对薄膜晶体管阵列面板并具有公共电极的公共电极面板; 以及包含多个负极和正性颜料颗粒的多个微胶囊，并且插入在薄膜晶体管阵列面板和公共电极面板之间。

公开(公告)号：US20070099323A1

公开(公告)日：2007-05-03

申请号：US11592062

申请日：2006-11-02

申请人： Jae-hyuk Chang ,  Mun-pyo Hong ,  Nam-seok Roh

发明人： Jae-hyuk Chang ,  Mun-pyo Hong ,  Nam-seok Roh

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： G03F7/0002 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/2014 ,  H01L29/78633

摘要： A method of manufacturing a display device in which a film deposited on a substrate through openings in a covering layer is easily removed from the covering layer. A master layer having a predetermined pattern of openings is formed on a base substrate exposing portions of the base substrate. A light shielding material is sprayed on the master layer to penetrate inside the openings after the surface of the base substrate exposed through the opening of the master layer has been treated to increase the difference of interface tensions between the master layer and the light shielding material; fabricating a mold provided with the light shielding film by forming a moldable material layer on the base substrate and the master layer and then curing the moldable material layer and the light shielding material; arranging, pressurizing and exposing the mold on an insulation substrate having a photosensitive film formed thereon after separating the mold from the master layer; and developing the photosensitive film after separating the mold from the insulation substrate.

摘要翻译： 一种制造显示装置的方法，其中通过覆盖层中的开口沉积在基板上的薄膜容易从覆盖层去除。 在基底基板上形成具有预定开口图案的母层，露出基底基板的部分。 在通过主层的开口露出的基底基板的表面已经被处理以增加主层和遮光材料之间的界面张力的差异之后，将遮光材料喷涂在主层上，以穿透开口内部。 通过在基底基板和母层上形成可模制材料层，然后固化可模制材料层和遮光材料，制造设置有遮光膜的模具; 在将模具与主层分离之后，在其上形成有感光膜的绝缘基板上布置，加压和曝光模具; 以及在将模具与绝缘基板分离之后显影感光膜。