公开(公告)号：USD415484S

公开(公告)日：1999-10-19

申请号：US95478

申请日：1998-10-23

Applicant: Chien Pang Lin

Designer： Chien Pang Lin

公开(公告)号：US20170322645A1

公开(公告)日：2017-11-09

申请号：US15145819

申请日：2016-05-04

Applicant: Ting-Kuo Kao ,  Hsin Hsueh Wu ,  Chien-Pang Lin

Inventor： Ting-Kuo Kao ,  Hsin Hsueh Wu ,  Chien-Pang Lin

IPC: G06F3/0354 ,  G06F3/044 ,  G06F3/038

CPC classification number: G06F3/03545 ,  G06F3/0383 ,  G06F3/0418 ,  G06F3/044

Abstract: Embodiments of a circuit and a stylus for interacting with a capacitive sensor are disclosed. The stylus includes a stylus body, a circuit disposed within the stylus body, a tip, and a power source. The circuit includes an input terminal, an amplifier, and an output terminal. The tip includes a sensing electrode and an emitting electrode, and the tip is disposed on a proximal end of the stylus body. The power source is electrically coupled to the circuit. The input terminal of the circuit is electrically coupled to the sensing electrode of the tip, and the output terminal of the circuit is electrically coupled to the emitting electrode of the tip. The circuit receives a signal through the sensing electrode, amplifies and inverts the signal, and outputs the signal through the emitting electrode. The amplifier of the circuit amplifies only a portion of the signal that exceeds a threshold voltage.

公开(公告)号：US08184848B2

公开(公告)日：2012-05-22

申请号：US12486220

申请日：2009-06-17

Applicant: Jyh-Hong Wu ,  Fang-Pang Lin ,  Yi-Hao Hsiao ,  Te-Lin Chung

Inventor： Jyh-Hong Wu ,  Fang-Pang Lin ,  Yi-Hao Hsiao ,  Te-Lin Chung

IPC: G06K9/00

CPC classification number: G06K9/00 ,  G06K2209/03

Abstract: A liquid level detection method includes capturing an image of a liquid surface, a structural surface, and graduation markings provided on the structural surface using an image-capturing device to thereby obtain an initial image. Subsequently, the initial image is processed so as to generate a processed image, and a level reference value of the liquid surface is obtained from the processed image. The level reference value represents a height of the liquid surface in terms of inherent characteristics of the processed image. Lastly, a liquid level of the liquid surface is calculated based on a relative proportional relation among the level reference value, an overall height of the processed image in terms of the inherent characteristics of the processed image, and dimensions of any one of the initial and processed images relative to the graduation markings.

Abstract translation: 液面检测方法包括使用图像捕获装置捕获设置在结构表面上的液面，结构表面和刻度标记的图像，从而获得初始图像。 随后，处理初始图像以产生处理图像，并且从处理图像获得液面的液位参考值。 水平参考值表示处理图像的固有特性方面的液面的高度。 最后，基于水平参考值，处理图像的整体高度与处理图像的固有特性之间的相对比例关系以及初始图像和初始图像中任何一个的尺寸来计算液面的液位， 处理相对于毕业标记的图像。

公开(公告)号：US08164584B2

公开(公告)日：2012-04-24

申请号：US12486885

申请日：2009-06-18

Applicant: Yi-Pang Lin

Inventor： Yi-Pang Lin

IPC: G06F3/033 ,  B43K1/10

CPC classification number: G06F3/03545 ,  G06F1/1626 ,  G06F2200/1632

Abstract: A portable electronic device includes a touch pen comprising a main body, a first pen head, a first elastic member, and a first sleeve. The first elastic member interconnects the main body and the first pen head. The first sleeve is slidably sleeved on the main body or the first elastic member so as to expose at least a part of the first elastic member. The first elastic member is bendable.

Abstract translation: 便携式电子设备包括触摸笔，其包括主体，第一笔头，第一弹性构件和第一套筒。 第一弹性构件将主体和第一笔头相互连接。 第一套筒可滑动地套在主体或第一弹性件上，以露出第一弹性件的至少一部分。 第一弹性构件是可弯曲的。

公开(公告)号：US07704114B2

公开(公告)日：2010-04-27

申请号：US11642271

申请日：2006-12-20

Applicant: Tseung-Yuen Tseng ,  Chia-Ying Lee ,  Seu-Yi Li ,  Pang Lin

Inventor： Tseung-Yuen Tseng ,  Chia-Ying Lee ,  Seu-Yi Li ,  Pang Lin

IPC: H01J9/00

CPC classification number: H01J9/025 ,  H01J1/304 ,  H01J2201/30446

Abstract: This invention relates to a process for fabricating ZnO nanowires with high aspect ratio at low temperature, which is associated with semiconductor manufacturing process and a gate controlled field emission triode is obtained. The process comprises providing a semiconductor substrate, depositing a dielectric layer and a conducting layer, respectively, on the semiconductor substrate, defining the positions of emitter arrays on the dielectric layer and conducting layer, depositing an ultra thin ZnO film as a seeding layer on the substrate, growing the ZnO nanowires as the emitter arrays by using hydrothermal process, and etching the areas excluding the emitter arrays, then obtaining the gate controlled field emission triode.

Abstract translation: 本发明涉及一种用于制造低温下具有高纵横比的ZnO纳米线的方法，其与半导体制造工艺相关，并且获得了栅极控制的场致发射三极管。 该方法包括提供半导体衬底，分别在半导体衬底上沉积电介质层和导电层，限定电介质层和导电层上的发射极阵列的位置，将沉积超薄ZnO膜作为接种层 衬底，通过使用水热法生长ZnO纳米线作为发射极阵列，并蚀刻除发射极阵列之外的区域，然后获得栅极控制的场致发射三极管。

公开(公告)号：US07576551B2

公开(公告)日：2009-08-18

申请号：US11902309

申请日：2007-09-20

Applicant: Sheng-Feng Lu ,  Shih-Ming Chen ,  Chien-Pang Lin ,  Ming-Hsun Sung

Inventor： Sheng-Feng Lu ,  Shih-Ming Chen ,  Chien-Pang Lin ,  Ming-Hsun Sung

IPC: G01R31/26

CPC classification number: G01R1/0408 ,  G01R1/0466 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A test board for wafer level semiconductor testing is disclosed. The test board comprises a plurality of wires and microelectronic devices; and a plurality of test sockets on an upper surface of the test board. Each test socket comprises: a base member configured for attachment to the test board with a first set of screws, wherein the base member has a central opening exposing a portion of the underlying test board; an anisotropic conductive film disposed within the central opening of the base member; a chip to be tested, disposed on the anisotropic conductive film within the central opening of the base member; and a cover member overlying the chip, attached to the base member with a second set of screws.

Abstract translation: 公开了一种用于晶片级半导体测试的测试板。 测试板包括多根导线和微电子器件; 以及在测试板的上表面上的多个测试插座。 每个测试插座包括：基座构件，其构造成用第一组螺钉附接到测试板，其中所述基座构件具有暴露所述底层测试板的一部分的中心开口; 设置在所述基底构件的中心开口内的各向异性导电膜; 待测试的芯片，设置在基底构件的中心开口内的各向异性导电膜上; 以及覆盖所述芯片的盖构件，以第二组螺钉附接到所述基座构件。

公开(公告)号：US20090189055A1

公开(公告)日：2009-07-30

申请号：US12010535

申请日：2008-01-25

Applicant: Chien-Pang Lin ,  Chung-Jung Hsu ,  Shiu-Fang Yen ,  Wu-Chieh Liu

Inventor： Chien-Pang Lin ,  Chung-Jung Hsu ,  Shiu-Fang Yen ,  Wu-Chieh Liu

IPC: H01L27/00

CPC classification number: H01L27/14629 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14685

Abstract: Embodiments disclose an image sensor device, comprising a substrate comprising a plurality of photosensor cells located therein or thereon, a plurality of optical guide structures corresponding to the photosensor cells respectively, and a stacked layer surrounding the optical guide structures, comprising a plurality of top portions with sharp corners adjacent to the top edges of the optical guide structures.

Abstract translation: 实施方式公开了一种图像传感器装置，包括：基板，包括位于其中或其上的多个光电传感器单元，分别对应于所述光电传感器单元的多个光学引导结构和围绕所述光导结构的层叠层，所述层叠层包括多个顶部部分 其具有与光导结构的顶部边缘相邻的尖角。

公开(公告)号：US20090101947A1

公开(公告)日：2009-04-23

申请号：US11907793

申请日：2007-10-17

Applicant: Chien-Pang Lin ,  Chin-Poh Pang ,  Wu-Chieh Liu ,  Shiu-Fang Yen

Inventor： Chien-Pang Lin ,  Chin-Poh Pang ,  Wu-Chieh Liu ,  Shiu-Fang Yen

IPC: H01L31/062 ,  H01L21/00

CPC classification number: H01L27/14625 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14685

Abstract: An image sensor device is disclosed. The image sensor device comprises a substrate having a pixel array therein. A first transparent layer with a curved surface is disposed on the substrate. A micro lens array is conformally disposed on the curved surface of the first transparent layer and corresponds to the pixel array in the substrate. The invention also discloses an electronic assembly for an image sensor device and a fabrication method thereof.

Abstract translation: 公开了一种图像传感器装置。 图像传感器装置包括其中具有像素阵列的衬底。 具有弯曲表面的第一透明层设置在基板上。 微透镜阵列保形地设置在第一透明层的弯曲表面上并对应于衬底中的像素阵列。 本发明还公开了一种用于图像传感器装置的电子组件及其制造方法。

公开(公告)号：US20090079461A1

公开(公告)日：2009-03-26

申请号：US11902309

申请日：2007-09-20

Applicant: Sheng-Feng Lu ,  Shih-Ming Chen ,  Chien-Pang Lin ,  Ming-Hsun Sung

Inventor： Sheng-Feng Lu ,  Shih-Ming Chen ,  Chien-Pang Lin ,  Ming-Hsun Sung

IPC: G01R1/04 ,  G01R31/26

CPC classification number: G01R1/0408 ,  G01R1/0466 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A test board for wafer level semiconductor testing is disclosed. The test board comprises a plurality of wires and microelectronic devices; and a plurality of test sockets on an upper surface of the test board. Each test socket comprises: a base member configured for attachment to the test board with a first set of screws, wherein the base member has a central opening exposing a portion of the underlying test board; an anisotropic conductive film disposed within the central opening of the base member; a chip to be tested, disposed on the anisotropic conductive film within the central opening of the base member; and a cover member overlying the chip, attached to the base member with a second set of screws.

公开(公告)号：US20070267647A1

公开(公告)日：2007-11-22

申请号：US11438128

申请日：2006-05-22

Applicant: Hsiao-Wen Lee ,  Peter Zung ,  Tzu-Han Lin ,  Tzy-Ying Lin ,  Chia-Yang Chang ,  Chien-Pang Lin

Inventor： Hsiao-Wen Lee ,  Peter Zung ,  Tzu-Han Lin ,  Tzy-Ying Lin ,  Chia-Yang Chang ,  Chien-Pang Lin

IPC: H01L33/00

CPC classification number: H01L27/14618 ,  H01L21/76898 ,  H01L23/481 ,  H01L27/14683 ,  H01L2223/6622 ,  H01L2224/274 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/00

Abstract: An optoelectronic device chip, and a method for making the chip, are disclosed. The chip comprises a device substrate, an optically transparent upper substrate, and a composite spacer layer which includes an adhesive material and a plurality of particles dispersed in said adhesive material. The distance between the device substrate and the upper substrate is controlled by the thickness of the composite spacer layer so that the variation is within the depth of focus of optical system.

Abstract translation: 公开了一种光电器件芯片及其制造方法。 芯片包括器件基板，光学透明上基板和复合间隔层，其包括粘合材料和分散在所述粘合材料中的多个颗粒。 器件基板和上基板之间的距离由复合间隔层的厚度控制，使得该变化在光学系统的焦深范围内。