公开(公告)号：US08237422B2

公开(公告)日：2012-08-07

申请号：US12463385

申请日：2009-05-09

Applicant: Saumitra Singh ,  Rupak Ghayal ,  Chakravarthy Srinivasan ,  Prakash Easwaran

Inventor： Saumitra Singh ,  Rupak Ghayal ,  Chakravarthy Srinivasan ,  Prakash Easwaran

IPC: G05F1/10

CPC classification number: H03K17/102 ,  H02M1/088

Abstract: Efficient switch cascode architecture for switching devices, such as switching regulators. The cascode architecture includes a switching stage responsive to an external driver signal for switching transitions, and a bias generator operative to bias the cascode transistor of the switching stage to protect the switching stage from damage during the switching transitions.

Abstract translation: 用于开关器件（如开关稳压器）的高效开关共源共栅架构。 共源共轭体系结构包括响应于用于切换转换的外部驱动器信号的开关级，以及用于偏置开关级的共源共栅晶体管的偏置发生器，以保护开关级在开关转变期间免受损坏。

公开(公告)号：US07868688B2

公开(公告)日：2011-01-11

申请号：US12463389

申请日：2009-05-09

Applicant: Prakash Easwaran ,  Prasenjit Bhowmik ,  Sumeet Mathur

Inventor： Prakash Easwaran ,  Prasenjit Bhowmik ,  Sumeet Mathur

IPC: H03K5/00

CPC classification number: H03F3/345

Abstract: A current filter circuit is provided. The current filter circuit comprises a source transistor comprising a drain, a gate, and a source. The source of the source transistor is coupled to a reference voltage terminal, the gate of the source transistor is coupled to the gate of a mirror transistor, and the drain of the source transistor is coupled to a reference current source. The mirror transistor comprises a drain, a gate, and a source. The source of the mirror transistor is coupled to the reference voltage terminal, the gate is coupled to the gate of the source transistor, and the drain is coupled to a load. The current filter circuit comprises a low pass filter for filtering noise. The current filter circuit also comprises an impedance reduction circuit coupled to the drain of the mirror transistor for reducing bandwidth of the current filter circuit.

Abstract translation: 提供电流滤波电路。 电流滤波器电路包括源极晶体管，源极晶体管包括漏极，栅极和源极。 源极晶体管的源极耦合到参考电压端子，源极晶体管的栅极耦合到反射镜晶体管的栅极，源极晶体管的漏极耦合到参考电流源。 反射镜晶体管包括漏极，栅极和源极。 反射镜晶体管的源极耦合到参考电压端子，栅极耦合到源极晶体管的栅极，并且漏极耦合到负载。 电流滤波电路包括用于滤除噪声的低通滤波器。 电流滤波器电路还包括耦合到镜晶体管的漏极的阻抗减小电路，用于减小电流滤波器电路的带宽。

公开(公告)号：US07821436B2

公开(公告)日：2010-10-26

申请号：US11760743

申请日：2007-06-09

Applicant: Venkatesh Teeka Srinvasa Setty ,  Chandrashekar Lakshminarayanan ,  Prasun Kali Bhattacharya ,  Prasenjit Bhowmik ,  Chakravarthy Srinivasan ,  Mukesh Khatri ,  Sanjeeb Kumar Ghosh ,  Sumanth Chakkirala ,  Sundararajan Krishnan ,  Prakash Easwaran

Inventor： Venkatesh Teeka Srinvasa Setty ,  Chandrashekar Lakshminarayanan ,  Prasun Kali Bhattacharya ,  Prasenjit Bhowmik ,  Chakravarthy Srinivasan ,  Mukesh Khatri ,  Sanjeeb Kumar Ghosh ,  Sumanth Chakkirala ,  Sundararajan Krishnan ,  Prakash Easwaran

IPC: H03M3/00

CPC classification number: H03M1/0641 ,  H03M1/12

Abstract: A system and method for reducing the power dissipated in an Analog to Digital Converter (ADC). The method includes the steps of: receiving a residue output from a previous phase of a plurality of clock phases where the plurality of clock phases includes a sample-and-hold phase and an amplifying phase for sampling and amplifying an analog input signal respectively, eliminating an effect of load on a residue amplifier when amplifying the residue output to generate an amplified residue output in the amplifying phase, and eliminating an effect of small feedback factor when sampling the amplified residue output in the sample-and-hold phase. Power advantage is achieved by sharing the load on the residue amplifier across the sample-and-hold phase and the amplifying phase rather than being fully present in any one of the clock phases. The present invention also provides a method for reducing the number of comparators used in ADCs.

Abstract translation: 一种降低模数转换器（ADC）功耗的系统和方法。 该方法包括以下步骤：从多个时钟相位的前一相位接收残留输出，其中多个时钟相位包括采样保持相位和用于分别对模拟输入信号进行采样和放大的放大相位，消除 当放大残留物输出时，负载对残留放大器的影响，以在放大阶段产生放大的残留输出，并且在取样和保持阶段中对放大的残留输出进行采样时，消除小的反馈因子的影响。 通过在采样保持阶段和放大阶段共享残留放大器上的负载而不是完全存在于任何一个时钟相位来实现功率优点。 本发明还提供了一种减少ADC中使用的比较器数量的方法。

公开(公告)号：US20100164611A1

公开(公告)日：2010-07-01

申请号：US12463389

申请日：2009-05-09

Applicant: Prakash EASWARAN ,  Prasenjit BHOWMIK ,  Sumeet MATHUR

Inventor： Prakash EASWARAN ,  Prasenjit BHOWMIK ,  Sumeet MATHUR

IPC: H03B1/00

CPC classification number: H03F3/345

Abstract: A current filter circuit is provided. The current filter circuit comprises a source transistor comprising a drain, a gate, and a source. The source of the source transistor is coupled to a reference voltage terminal, the gate of the source transistor is coupled to the gate of a mirror transistor, and the drain of the source transistor is coupled to a reference current source. The mirror transistor comprises a drain, a gate, and a source. The source of the mirror transistor is coupled to the reference voltage terminal, the gate is coupled to the gate of the source transistor, and the drain is coupled to a load. The current filter circuit comprises a low pass filter for filtering noise. The current filter circuit also comprises an impedance reduction circuit coupled to the drain of the mirror transistor for reducing bandwidth of the current filter circuit.

Abstract translation: 提供电流滤波电路。 电流滤波器电路包括源极晶体管，源极晶体管包括漏极，栅极和源极。 源极晶体管的源极耦合到参考电压端子，源极晶体管的栅极耦合到反射镜晶体管的栅极，源极晶体管的漏极耦合到参考电流源。 反射镜晶体管包括漏极，栅极和源极。 反射镜晶体管的源极耦合到参考电压端子，栅极耦合到源极晶体管的栅极，并且漏极耦合到负载。 电流滤波电路包括用于滤除噪声的低通滤波器。 电流滤波器电路还包括耦合到镜晶体管的漏极的阻抗减小电路，用于减小电流滤波器电路的带宽。

公开(公告)号：US07429895B2

公开(公告)日：2008-09-30

申请号：US11366006

申请日：2006-02-28

Applicant: Prakash Easwaran ,  Anant Shankar Kamath ,  Rupak Ghayal ,  Birman Chattopadhyay ,  Gopal Krishna Nayak ,  Sameer Raghavendra Joshi ,  Mithun Guddethota Neelakant ,  Subhash Yekanath Pai ,  Shivaprakash Halagur

Inventor： Prakash Easwaran ,  Anant Shankar Kamath ,  Rupak Ghayal ,  Birman Chattopadhyay ,  Gopal Krishna Nayak ,  Sameer Raghavendra Joshi ,  Mithun Guddethota Neelakant ,  Subhash Yekanath Pai ,  Shivaprakash Halagur

IPC: H03L7/00

CPC classification number: H03L7/093 ,  E05Y2400/30 ,  H03L7/099 ,  H03L7/189

Abstract: Various systems and methods for drift compensation are disclosed. As one example, a system for compensating drift in a control circuit is disclosed that includes at least two control signals. One of the control signals is provided by a circuit that is susceptible to drift. This control signal is provided both to a systems or device under control, and to a detection circuit. The detection circuit is operable to detect a drift in the control signal. In addition, the detection circuit provides another control signal that varies as a function of the drift in the received control signal.

Abstract translation: 公开了用于漂移补偿的各种系统和方法。 作为一个示例，公开了一种用于补偿控制电路中的漂移的系统，其包括至少两个控制信号。 控制信号之一由容易漂移的电路提供。 该控制信号被提供给被控制的系统或设备，以及检测电路。 检测电路可操作以检测控制信号中的漂移。 此外，检测电路提供另一控制信号，该控制信号根据所接收的控制信号中的漂移而变化。

公开(公告)号：US20060071721A1

公开(公告)日：2006-04-06

申请号：US10711741

申请日：2004-10-01

Applicant: Prakash EASWARAN ,  Koushik KRISHNAN

Inventor： Prakash EASWARAN ,  Koushik KRISHNAN

IPC: H03L7/00

CPC classification number: H03L7/093

Abstract: An active filter circuit containing small capacitors. Due to the presence of such small capacitors, components such as PLL can potentially be integrated into integrated circuits. In an embodiment, the filter circuit is implemented by having a combination of a first capacitor and a first resistor connected in series providing the input signal to the input terminal of a operational amplifier, and a second resistor being connected in parallel to the combination. A second capacitor may be connected between the input and output terminals of the operational amplifier. The first capacitor may be chosen to be small by choosing the second resistor to be of a large resistance. Any noise introduced by such a large resistor may be attenuated by choosing the first resistor to be small.

Abstract translation: 包含小电容器的有源滤波电路。 由于存在这样的小电容器，诸如PLL的组件可以潜在地集成到集成电路中。 在一个实施例中，滤波器电路通过具有串联连接的第一电容器和第一电阻器的组合来实现，从而将输入信号提供给运算放大器的输入端子，并且第二电阻器与该组合并联连接。 第二电容器可以连接在运算放大器的输入和输出端之间。 通过选择具有大电阻的第二电阻器，可以选择第一电容器较小。 可以通过选择第一电阻器来减小由这种大电阻器引入的任何噪声。

公开(公告)号：US07023929B2

公开(公告)日：2006-04-04

申请号：US10191994

申请日：2002-07-10

Applicant: Fernando A. Mujica ,  Udayan Dasgupta ,  Mangesh Sadafale ,  Sandeep Oswal ,  Prakash Easwaran

Inventor： Fernando A. Mujica ,  Udayan Dasgupta ,  Mangesh Sadafale ,  Sandeep Oswal ,  Prakash Easwaran

IPC: H04K1/10

CPC classification number: H04L27/367 ,  H04L27/2626

Abstract: A method of providing an improved transfer function for a Discrete Multitone (DMT) type modulation transmitter with digital filtering after modulation followed by digital to analog converter and analog filtering is provided by sending a test signal to said transmitter and measuring the results of the test signal to determine the transfer function. The inverse of the transfer function that needs to be compensated is determined and the inverse of transfer function to be compensated is truncated to the region of interest (H2). The desired band split component of pre-compensation filter is designed (H3). The desired target frequency response of the pre-compensation filter is determined by H4=H2*H3 where H4 is the multiplication of H2 and H3 Given the target frequency response in H4 Hermetian symmetry is imposed on the frequency response. The inverse Fourier transform (IFFT) is taken to generate a time domain filter, h5. The characteristic of this filter is added at the digital filtering after modulation.

Abstract translation: 通过向所述发射机发送测试信号并测量测试信号的结果，提供一种为调制后的数字滤波后的数模转换器和模拟滤波器为离散多音（DMT）型调制发射机提供改进的传递函数的方法 确定传递函数。 确定需要补偿的传递函数的逆，并且要补偿的传递函数的逆被截断到感兴趣的区域（H 2> 2）。 设计了预补偿滤波器的期望频带分离分量（H 3 3 3）。 预补偿滤波器的期望目标频率响应由H 4 = H 2 / H 3 3 H 3确定，其中H 4 < 假定在H 4中的目标频率响应，Hermetian对称性被施加在频率响应上，则/ SUB>是H 2 2和H 3 3的乘法。 采用逆傅里叶变换（IFFT）来产生时域滤波器h 5。 该滤波器的特性在调制后的数字滤波中相加。

公开(公告)号：US06831975B1

公开(公告)日：2004-12-14

申请号：US09661629

申请日：2000-09-13

Applicant: Prakash Easwaran ,  Sandeep Oswal

Inventor： Prakash Easwaran ,  Sandeep Oswal

IPC: H04M100

CPC classification number: H04L27/0002 ,  H03H11/1217 ,  H03H11/1252 ,  H04L5/14 ,  H04L27/2647

Abstract: A cost-effective filter consuming low power and occupying minimal space. The filter may be used in a ADSL modem (or CPE) to filter the signal components other than the ADSL signals. A high pass filter first filters the low frequency components to attenuate (or remove) lower frequency components such as that caused by ADSL transmit echo signals and that used for voice transmission. The high pass filter may be modified by adding a few resistors to limit the voltages of the high frequency signals also. The output of the high pass filter is amplified and passed through a low pass filter to filter the high frequency components (HPNA included). Due to earlier filtering operation of the high pass filter, the signal can be amplified substantially before being sent to the low pass filter. The implementation of the low pass filter is simplified due to the prior amplification.

Abstract translation: 消耗低功耗且占用最小空间的成本效益过滤器。 该滤波器可用于ADSL调制解调器（或CPE）中以对除ADSL信号之外的信号分量进行滤波。 高通滤波器首先对低频分量进行滤波，以衰减（或去除）较低频率的分量，例如由ADSL发射回波信号和用于语音传输的频率成分。 高通滤波器可以通过添加几个电阻器来修改，以限制高频信号的电压。 高通滤波器的输出被放大并通过低通滤波器以过滤高频分量（包括HPNA）。 由于高通滤波器的较早的滤波操作，可以在发送到低通滤波器之前基本上放大该信号。 由于先前的放大，低通滤波器的实现被简化。

公开(公告)号：US08912843B2

公开(公告)日：2014-12-16

申请号：US13009868

申请日：2011-01-20

Applicant: Prasun Kali Bhattacharyya ,  Sumanth Chakkirala ,  Prakash Easwaran

Inventor： Prasun Kali Bhattacharyya ,  Sumanth Chakkirala ,  Prakash Easwaran

IPC: H04B1/10 ,  H03H7/01 ,  H03H7/06 ,  H03H11/12

CPC classification number: H03H7/0153 ,  H03H7/06 ,  H03H11/12 ,  H03H2210/012 ,  H03H2210/028

Abstract: An ultra low cut-off frequency filter. A filter circuit includes a control circuit responsive to an input signal and a feedback signal to generate a control signal. The filter circuit includes a controllable resistor coupled to the control circuit. The controllable resistor is responsive to a reference signal and the control signal to generate the feedback signal. The filter circuit includes a feedback path coupled to the control circuit and the controllable resistor to couple the feedback signal from the controllable resistor to the control circuit, thereby removing noise from at least one of the input signal and the reference signal, and preventing voltage error in the filter circuit.

Abstract translation: 超低截止频率滤波器。 滤波电路包括响应于输入信号和反馈信号的控制电路以产生控制信号。 滤波器电路包括耦合到控制电路的可控电阻器。 可控电阻响应于参考信号和控制信号以产生反馈信号。 滤波器电路包括耦合到控制电路和可控电阻器的反馈路径，以将来自可控电阻器的反馈信号耦合到控制电路，从而从输入信号和参考信号中的至少一个消除噪声，并且防止电压误差 在滤波电路中。

公开(公告)号：US20130307502A1

公开(公告)日：2013-11-21

申请号：US13472461

申请日：2012-05-15

Applicant: Prasun Kali Bhattacharyya ,  Prakash Easwaran

Inventor： Prasun Kali Bhattacharyya ,  Prakash Easwaran

IPC: G05F1/10

CPC classification number: G05F1/565 ,  G05F1/575

Abstract: A voltage regulator includes an amplifier, a first buffer and a second buffer. The amplifier is designed to generate an error voltage between a reference voltage and a voltage at an output node of the voltage regulator. The first buffer is coupled to receive the amplified error voltage and, in response, to drive a first pass transistor. The first buffer includes a non-linear resistance element. The resistance of the non-linear resistance element varies non-linearly with a load current drawn from the output node. The second buffer is coupled to receive the amplified error voltage, and in response, to drive a second pass transistor. The second buffer includes a linear resistance element. The resistance of the linear element is a constant. The use of the non-linear resistance element enables reduction in power consumption in the voltage regulator.

Abstract translation: 电压调节器包括放大器，第一缓冲器和第二缓冲器。 放大器设计用于在电压调节器的输出节点处产生参考电压和电压之间的误差电压。 第一缓冲器被耦合以接收放大的误差电压，并且作为响应来驱动第一传输晶体管。 第一缓冲器包括非线性电阻元件。 非线性电阻元件的电阻随从输出节点引出的负载电流而非线性变化。 第二缓冲器被耦合以接收放大的误差电压，并且响应于驱动第二传输晶体管。 第二缓冲器包括线性电阻元件。 线性元件的电阻是一个常数。 使用非线性电阻元件能够降低电压调节器的功耗。