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公开(公告)号：US5955895A
公开(公告)日：1999-09-21
申请号：US744715
申请日：1996-10-29
Applicant: Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
Inventor： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
IPC: H03K17/06 , H03K19/0185
CPC classification number: H03K17/063
Abstract: An interface circuit is disposed between a generator of control signals and a plurality of electronic switches in order to produce boosted voltage signals corresponding to the control signals for activating the electronic switches. To avoid the use of a capacitor with a high capacitance and thus to reduce an area of the integrated circuit, the interface circuit includes a generator of activation signals and a plurality of voltage multipliers each having an input connected to an output of the control signal generator, an output connected to at least one terminal for activating an electronic switch and two control terminals connected to an activation signal generator. Each voltage multiplier includes MOS transistors operatively coupled in series between the input and the output. The MOS transistors operate in response to the activation signals to produce a boosted voltage on the capacitor.
Abstract translation: 接口电路设置在控制信号的发生器和多个电子开关之间，以便产生对应于用于激活电子开关的控制信号的升压电压信号。 为了避免使用具有高电容的电容器并因此减小集成电路的面积，接口电路包括激活信号的发生器和多个电压乘法器，每个电压乘法器具有连接到控制信号发生器的输出的输入 连接到用于激活电子开关的至少一个终端的输出和连接到激活信号发生器的两个控制终端。 每个电压倍增器包括可操作地耦合在输入和输出之间的MOS晶体管。 MOS晶体管响应于激活信号而工作，以在电容器上产生升压电压。
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公开(公告)号：US5610564A
公开(公告)日：1997-03-11
申请号：US140233
申请日：1993-10-20
Applicant: Luciano Tomasini , Rinaldo Castello
Inventor： Luciano Tomasini , Rinaldo Castello
CPC classification number: H03H7/004 , H04M1/6025
Abstract: A monolithically integrated AC coupling circuit is presented for DC uncoupling and AC coupling (typically in telephone applications) to an input signal. The AC coupler includes a high-pass filter having a first pole at a frequency well below a frequency of interest and a zero at zero frequency. The AC coupler also includes a pole/zero doublet between the frequency of the first pole and the frequency of interest. The frequency of the first pole for a specified error is increased by addition of the doublet. Because the frequency of the first pole is increased, the size of the required capacitors is decreased, enabling integration. An implementation of the circuit using switched capacitor techniques is described. An alternative circuit employing a unit gain interface is presented. The alternative circuit reduces the dynamic range and driving voltage requirements of its field-effect transistors.
Abstract translation: 提出了一种单片集成AC耦合电路，用于DC分离和AC耦合（通常在电话应用中）到输入信号。 AC耦合器包括高通滤波器，其具有在低于感兴趣频率的频率处的第一极点和零频率处的零点。 AC耦合器还包括在第一极的频率和感兴趣的频率之间的极点/零点。 通过添加双峰来增加指定误差的第一极的频率。 由于第一极的频率增加，所需电容的尺寸减小，从而实现集成。 描述使用开关电容器技术的电路的实现。 提出了采用单位增益接口的替代电路。 替代电路降低了其场效应晶体管的动态范围和驱动电压要求。
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公开(公告)号：US5552747A
公开(公告)日：1996-09-03
申请号：US457759
申请日：1995-06-01
Applicant: Luciano Tomasini , Rinaldo Castello , Pierangelo Confalonieri
Inventor： Luciano Tomasini , Rinaldo Castello , Pierangelo Confalonieri
IPC: H03K17/06 , H03K17/687 , G05F1/10 , G05F3/02
CPC classification number: H03K17/063
Abstract: A driver circuit, for an electronic switch which is to be operated from a clock signal, comprises an inverter driven by the clock signal, and a voltage doubler which is connected to supply the inverter and connected to be driven by the complementary clock signal.
Abstract translation: 用于从时钟信号操作的电子开关的驱动电路包括由时钟信号驱动的反相器，以及连接以提供反相器并连接以由互补时钟信号驱动的倍压器。
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14.发明授权
公开(公告)号：US5509069A
公开(公告)日：1996-04-16
申请号：US121294
申请日：1993-09-14
Applicant: Luciano Tomasini , Rinaldo Castello
Inventor： Luciano Tomasini , Rinaldo Castello
CPC classification number: H04M19/08
Abstract: A circuit is provided in telecommunication terminal equipment for splitting a limited supply of current received from a subscriber's line current among a plurality of functional circuits according to their priority rank. The circuit uses a differential pair of current delivering transistors and a special circuit to monitor the actual current of absorption of at least the functional circuit of highest rank to produce a control signal that is used for modifying the drive conditions of the current delivering transistors. All current exceeding the actual absorption needs of the highest rank functional circuit is distributed to the other functional circuits and the prior art practice of sinking unneeded current through a dissipative shunt voltage regulator associated with each functional circuit is avoided. This same principle may be advantageously applied also to functional circuits of progressively lesser rank of priority.
Abstract translation: 在电信终端设备中提供电路，用于根据用户的线路电流根据其优先级排列从用户线路电流接收的有限供电电流。 该电路使用差分对的电流输送晶体管和专用电路来监视至少最高等级的功能电路的吸收的实际电流，以产生用于修改电流输送晶体管的驱动条件的控制信号。 超过最高等级功能电路的实际吸收需求的全部电流被分配到其他功能电路，并且避免了通过与每个功能电路相关联的耗散分流稳压器吸收不需要的电流的现有技术的实践。 该相同的原理也可以有利地应用于逐渐降低等级优先级的功能电路。
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公开(公告)号：US5434535A
公开(公告)日：1995-07-18
申请号：US97067
申请日：1993-07-23
Applicant: Luciano Tomasini , Rinaldo Castello
Inventor： Luciano Tomasini , Rinaldo Castello
CPC classification number: H03H11/12
Abstract: An RC filter for low or very low frequency applications, comprising a resistor between the filter input and output, and an amplifier connected after the resistor and having an output fed back to the amplifier input through a capacitor. This simple design allows the known Miller Effect to be utilized to produce a filter having a high time constant while employing small-size components which occupy little space in integrated circuits.
Abstract translation: 用于低频或非常低频应用的RC滤波器，包括滤波器输入和输出之间的电阻器，以及连接在电阻器之后的放大器，并且具有通过电容器反馈到放大器输入端的输出。 这种简单的设计允许使用已知的米勒效应来生产具有高时间常数的滤波器，同时采用在集成电路中占据很小空间的小尺寸部件。
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Patent Agency Ranking
公开(公告)号：US08581762B2
公开(公告)日：2013-11-12
申请号：US13310587
申请日：2011-12-02
Applicant: Marco Sosio , Antonio Liscidini , Rinaldo Castello , Gabriele Gandolfi , Vittorio Colonna
Inventor： Marco Sosio , Antonio Liscidini , Rinaldo Castello , Gabriele Gandolfi , Vittorio Colonna
IPC: H03M3/00
Abstract: A filtering analog to digital converter (ADC) includes an integrator receiving at its input an analog input signal. A filtering capacitor at the input of the integrator filters out a large portion of out-of-band interferers in the analog input signal. The integrator produces an output that is quantized to produce a digital output. A feedback path between the quantizer output and the integrator input includes a digital to analog converter (DAC).
Abstract translation: 滤波模数转换器（ADC）包括积分器，在其输入端接收模拟输入信号。 积分器输入端的滤波电容滤除模拟输入信号中的大部分带外干扰源。 积分器产生一个被量化以产生数字输出的输出。 量化器输出和积分器输入之间的反馈路径包括数模转换器（DAC）。
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公开(公告)号：US20100295599A1
公开(公告)日：2010-11-25
申请号：US12782848
申请日：2010-05-19
Applicant: Gregory Uehara , Chao Yang , Ruoxin Jiang , Fernando De Bernardinis , Alessandro Venca , Rinaldo Castello , Marc Leroux , Brian Brunn
Inventor： Gregory Uehara , Chao Yang , Ruoxin Jiang , Fernando De Bernardinis , Alessandro Venca , Rinaldo Castello , Marc Leroux , Brian Brunn
CPC classification number: H04B1/0071
Abstract: In one embodiment, an apparatus includes an upconversion unit configured to upconvert a baseband signal to a radio frequency (RF) signal. A plurality of baluns for a plurality of wireless bands are provided. Multiplexing circuitry is coupled to the plurality of baluns where the upconversion unit is coupled to each balun through the multiplexing circuitry. The multiplexing circuitry is configured to multiplex the radio frequency signal from the upconversion unit to one of the plurality of baluns based on a wireless band being used.
Abstract translation: 在一个实施例中，一种装置包括上变频单元，其被配置为将基带信号上变频到射频（RF）信号。 提供了多个用于多个无线频段的不平衡变压器。 多路复用电路耦合到多个不平衡转换器，其中上转换单元通过复用电路耦合到每个平衡 - 不平衡变换器。 复用电路被配置为基于所使用的无线频带将来自上变频单元的射频信号复用到多个巴伦中的一个。
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18.发明授权High frequency supply compatible hysteresis comparator with low dynamics differential input 有权高频电源兼容迟滞比较器，低动态差分输入公开(公告)号：US06229346B1
公开(公告)日：2001-05-08
申请号：US09510323
申请日：2000-02-22
Applicant: Carlo Maria Milanese , Rinaldo Castello
Inventor： Carlo Maria Milanese , Rinaldo Castello
IPC: H03K522
CPC classification number: H03K5/2481 , H03K3/3565
Abstract: A comparator circuit includes a differential input stage, a second differential stage having a differential output, and an output stage transforming an output signal from the differential output of the second differential stage into an output signal having a logic level. The comparator further includes a common mode measuring stage. The common mode measuring stage includes a differential pair of input transistors and a differential pair of complementary transistors biased by respective current generators, and a current mirror summing the differential output currents of the two complementary transistors pairs into a single output current signal. A switching stage is controlled by the differential output nodes of the second differential stage. A common source node of the switch stage is coupled to the output of the common mode measuring stage and to the differential output nodes of the differential input stage.
Abstract translation: 比较器电路包括差分输入级，具有差分输出的第二差分级和将来自第二差分级的差分输出的输出信号转换成具有逻辑电平的输出信号的输出级。 比较器还包括共模测量级。 共模测量级包括差分输入晶体管对和由各个电流发生器偏置的互补晶体管的差分对，以及电流镜将两个互补晶体管对的差分输出电流相加为单个输出电流信号。 开关级由第二差分级的差分输出节点控制。 开关级的公共源节点耦合到共模测量级的输出端和差分输入级的差分输出节点。
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公开(公告)号：US5990748A
公开(公告)日：1999-11-23
申请号：US129288
申请日：1998-08-05
Applicant: Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
Inventor： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
CPC classification number: H03F1/086
Abstract: An operational amplifier frequency self-compensated with respect to closed-loop gain comprises a transconductance input stage and an amplifier output stage connected serially together to receive an input signal on at least one input terminal of the amplifier and generate an amplified signal on an output terminal of the amplifier. Provided between the input and output stages is an intermediate node which is connected to a compensation block to receive a frequency-variable compensation signal therefrom. The compensation block is coupled with its input to the input terminal of the amplifier. The compensation block is connected to receive at least the feedback signal. Preferably, the compensation signal is variable as a function of a gain value which is determined by the feedback circuit, and said variation of the compensation signal occurs in a relationship of inverse proportionality to the gain value.
Abstract translation: 相对于闭环增益自补偿的运算放大器频率包括跨导输入级和串联连接的放大器输出级，以在放大器的至少一个输入端上接收输入信号，并在输出端产生放大信号 的放大器。 在输入级和输出级之间设置有中间节点，其连接到补偿块以从其接收频率可变的补偿信号。 补偿块与其输入耦合到放大器的输入端。 补偿块被连接以至少接收反馈信号。 优选地，补偿信号作为由反馈电路确定的增益值的函数而变化，并且补偿信号的所述变化以与增益值成反比关系的关系发生。
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20.发明授权
公开(公告)号：US5973537A
公开(公告)日：1999-10-26
申请号：US948986
申请日：1997-10-10
Applicant: Andrea Baschirotto , Angelo Nagari , Rinaldo Castello
Inventor： Andrea Baschirotto , Angelo Nagari , Rinaldo Castello
CPC classification number: H03F3/005 , H03F3/45946 , H03F2203/45421
Abstract: In switch-capacitor systems for extremely low supply voltage, employing a fully differential switched op-amp, proper functioning of nMOS switches coupled to the inverting input node of an integrated stage capable of outputting a common mode control signal is made possible by retaining the ground potential on the input node to prevent body effects on the threshold of nMOS switches by means of an auxiliary switched capacitor.
Abstract translation: 在采用完全差分开关运算放大器的开关电容器系统中，通过使用完全差分开关运算放大器，可以通过保持接地来实现耦合到能够输出共模控制信号的集成级的反相输入节点的正常功能 输入节点上的电位，以通过辅助开关电容器来防止身体对nMOS开关阈值的影响。
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