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    Surface active N-halamine compounds
    11.
    发明授权
    Surface active N-halamine compounds 失效

    公开(公告)号：US5902818A

    公开(公告)日：1999-05-11

    申请号：US987698

    申请日：1997-12-09

    申请人： Shelby D. Worley ,  Michael W. Eknoian ,  Yanjun Li

    发明人： Shelby D. Worley ,  Michael W. Eknoian ,  Yanjun Li

    IPC分类号： A01N43/76 ,  A01N59/00 ,  C07D263/20 ,  C07D263/24 ,  C07D263/26 ,  C07D263/04

    CPC分类号： C07D263/20 ,  A01N43/76 ,  A01N59/00 ,  C07D263/24 ,  C07D263/26

    摘要： Cyclic N-halamine biocidal monomers and polymers and methods of using the same as biocides, wherein the functional group, halogenated oxazolidinones, may be homo- and copolymerized, are provided. The copolymerizations are effected with inexpensive monomers such as acrylonitrile, styrene, vinyl acetate, vinyl chloride, and the like. Grafting reactions were also accomplished with the N-halamine monomers and commercial polymers such as poly-acrylonitrile, poly-styrene, poly-vinyl acetate, poly-vinyl alcohol, poly-vinyl chloride, and cellulose. These N-halamine compounds are stable biocides which release small amounts of free halogen and other impurities. They will be useful as disinfectants for swimming pools, oil and water based paints, preservatives, medical and dental coatings, industrial and commercial coatings, fabrics, sterile bandages, liners of containers, and the like.

    CURRENT LIMITING DEVICE, CURRENT LIMITER AND CURRENT LIMITING SYSTEM FOR POWER GRID
    18.
    发明申请
    CURRENT LIMITING DEVICE, CURRENT LIMITER AND CURRENT LIMITING SYSTEM FOR POWER GRID 有权
    电流限制装置，电流限制和电流限制系统

    公开(公告)号：US20150318688A1

    公开(公告)日：2015-11-05

    申请号：US14441918

    申请日：2013-01-09

    申请人： Shaogui AL ,  Chuan WANG ,  Yongning HUANG ,  Yiping FAN ,  Guoyong ZHANG ,  Yanjun LI ,  Ning PAN ,  Shuang ZHANG

    发明人： Shaogui AI ,  Chuan WANG ,  Yongning HUANG ,  Yiping FAN ,  Guoyong ZHANG ,  Yanjun LI ,  Ning PAN ,  Shuang ZHANG

    IPC分类号： H02H9/02

    CPC分类号： H02H9/02 ,  H02H9/021

    摘要： A current limiting device for a power grid includes a first current limiting reactor; a first smart fast switch connected with the first current limiting reactor in parallel; a current transformer sleeved on a bus bar located on one side of a circuit resulting from the parallel connection of the first current limiting reactor with the first smart fast switch to monitor the current in the bus bar in real time; and a controller connected with the current transformer to control the switch-off of the first smart fast switch when the current in the bus bar is higher than a first preset value and the switch-on of the first smart fast switch when the current in the bus bar is smaller than a second preset value, wherein the first preset value is higher than the second preset value. The current limiting device improves the operational reliability of a power grid.

    摘要翻译： 电网的限流装置包括第一限流电抗器; 与第一限流电抗器并联连接的第一智能快速开关; 电流互感器套在位于电路一侧的总线上，该电流互感器由第一限流电抗器与第一智能快速开关的并联连接而实时监控母线中的电流; 以及与所述电流互感器连接的控制器，用于当所述母线中的电流高于第一预设值时控制所述第一智能快速开关的断开，并且当所述第一智能快速开关中的电流为 母线小于第二预设值，其中第一预设值高于第二预设值。 限流装置提高了电网的运行可靠性。

    FABRICATING HIGH VOLTAGE TRANSISTORS IN A LOW VOLTAGE PROCESS
    20.
    发明申请
    FABRICATING HIGH VOLTAGE TRANSISTORS IN A LOW VOLTAGE PROCESS 审中-公开
    在低电压工艺中制造高电压晶体管

    公开(公告)号：US20120104468A1

    公开(公告)日：2012-05-03

    申请号：US13236537

    申请日：2011-09-19

    申请人： Yanjun Li ,  Sen Zhang

    发明人： Yanjun Li ,  Sen Zhang

    IPC分类号： H01L29/80 ,  H01L21/8232 ,  H01L29/78 ,  H01L21/8234

    CPC分类号： H01L29/66901 ,  H01L29/0634 ,  H01L29/1083 ,  H01L29/404 ,  H01L29/41725 ,  H01L29/41758 ,  H01L29/41775 ,  H01L29/42316 ,  H01L29/66659 ,  H01L29/7835 ,  H01L29/808

    摘要： Fabricating high voltage transistors includes forming a buried p-type implant on a p-substrate for each transistor, the transistor having a source side and a drain side, wherein the p-type implant is positioned adjacent the source and is configured to extend under a gate region; depositing a low doping epitaxial layer on the p-substrate and the p-type implant for each high voltage transistor, the low doping epitaxial layer extending from the source to the drain; forming an N-Well in the low doping epitaxial layer for each transistor, wherein the N-Well corresponds to a low voltage transistor N-Well fabricated using a low voltage transistor fabrication process; and forming a p-top diffusion region in or on the N-Well for each transistor, wherein the p-top diffusion region is configured to compensate for a dopant concentration of the N-Well at or near a surface of the N-Well opposing the substrate.

    摘要翻译： 制造高压晶体管包括在每个晶体管的p-衬底上形成掩埋p型注入，该晶体管具有源极侧和漏极侧，其中p型植入物位于源极附近，并且被配置为在 闸区; 在p衬底上沉积低掺杂外延层，并为每个高电压晶体管沉积p型注入，低掺杂外延层从源极延伸到漏极; 在每个晶体管的低掺杂外延层中形成N阱，其中N阱对应于使用低压晶体管制造工艺制造的低压晶体管N阱; 以及在每个晶体管的N阱中或上形成p顶部扩散区，其中p顶部扩散区被配置为补偿N阱中的或接近N阱的表面的掺杂剂浓度 底物。