公开(公告)号：US20050219905A1

公开(公告)日：2005-10-06

申请号：US11094104

申请日：2005-03-31

Applicant: Yasuaki Watanabe

Inventor： Yasuaki Watanabe

IPC: G11C16/06 ,  G11C11/34 ,  G11C16/28 ,  G11C29/00 ,  G11C29/02

CPC classification number: G11C29/026 ,  G11C16/04 ,  G11C16/28 ,  G11C29/02 ,  G11C29/021 ,  G11C29/028 ,  G11C2029/5006

Abstract: A memory device is composed of a memory array including floating gate memory cells; a sense amplifier designed to identify data stored in the memory array; and a reference current setting unit responsive to a trimming code for providing a reference current for the sense amplifier. The trimming code is defined as being all-0 for a reference current level most likely to identify data stored in the memory array as logic “1”, and is defined as being all-1 for a reference current level most likely to identify data stored in the memory array as logic “0”.

Abstract translation: 存储器件由包括浮动栅极存储器单元的存储器阵列组成; 感测放大器，设计用于识别存储在存储器阵列中的数据; 以及参考电流设置单元，其响应于用于为所述读出放大器提供参考电流的修整代码。 修整代码被定义为对于最可能将存储在存储器阵列中的数据识别为逻辑“1”的参考当前级别的全0，并且被定义为对于最可能识别存储的数据的参考当前级别为全1 在存储器阵列中为逻辑“0”。

公开(公告)号：US4736257A

公开(公告)日：1988-04-05

申请号：US765337

申请日：1985-08-13

Applicant: Yasuaki Watanabe ,  Kazuo Yamada ,  Hiroji Ibaraki

Inventor： Yasuaki Watanabe ,  Kazuo Yamada ,  Hiroji Ibaraki

IPC: G11B20/06 ,  H04N5/931 ,  H04N9/85 ,  H04N5/76

CPC classification number: H04N5/9315

Abstract: An information signal recording medium reproducing apparatus comprises an equalizer supplied with a frequency modulated composite video signal picked up from an information signal recording medium, a frequency demodulator for frequency-demodulating an output signal of the equalizer into a composite video signal, a synchronizing signal separating circuit for separating a horizontal synchronizing signal from the composite video signal, and a switching signal generating circuit for forming a switching signal from the horizontal synchronizing signal. The equalizer is supplied with the switching signal and has such a circuit construction that a frequency at which an output level versus frequency characteristic of the equalizer has a peak is reduced responsive to the switching signal during a predetermined time period in a vicinity of the front edge of the horizontal synchronizing signal to correct a distorted waveform of the frequency modulated composite signal caused by defects in the information signal recording medium.

Abstract translation: 一种信息信号记录介质再现装置，包括一个均衡器，该均衡器被提供有从信息信号记录介质拾取的调频复合视频信号，频率解调器，用于将均衡器的输出信号频率解调为复合视频信号;同步信号分离 用于从复合视频信号中分离水平同步信号的电路，以及用于从水平同步信号形成切换信号的切换信号发生电路。 均衡器被提供有开关信号，并且具有这样一种电路结构，使得在前边缘附近的预定时间段期间响应于开关信号减小了均衡器的输出电平对频率特性具有峰值的频率 以校正由信息信号记录介质中的缺陷引起的调频复合信号的失真波形。

公开(公告)号：US4577238A

公开(公告)日：1986-03-18

申请号：US487686

申请日：1983-04-22

Applicant: Yasuaki Watanabe

Inventor： Yasuaki Watanabe

IPC: H03C3/00 ,  G11B9/06 ,  G11B20/06 ,  G11B20/22 ,  H03C3/09 ,  H04N5/93 ,  H04N9/79 ,  H04N9/802 ,  H04N9/82 ,  H04N9/85 ,  H04N5/91 ,  H03B1/00 ,  H03B19/00 ,  H04B1/10 ,  H04N5/213

CPC classification number: H04N9/85 ,  H04N9/7912 ,  H04N9/8222

Abstract: An intermodulation distortion reducing circuit for a frequency-modulated signal comprises a sinusoidal wave shaping circuit supplied with an input frequency-modulated signal including an intermodulation distortion component, for shaping the waveform of the input frequency-modulated signal into a waveform closely approximating a sinusoidal wave, and a mean DC level detecting circuit supplied with an output signal of the sinusoidal wave shaping circuit, for detecting a mean DC level of the output signal of the sinusoidal wave shaping circuit and producing a detection output. The sinusoidal wave shaping circuit is supplied with the detection output of the mean DC level detecting circuit and a waveform shaping quantity thereof is varied to obtain the waveform closely approximating the sinusoidal waveform. The sinusoidal wave shaping circuit produces a frequency-modulated signal having a waveform closely approximating a sinusoidal waveform, with its intermodulation distortion component reduced.

Abstract translation: 用于调频信号的互调失真减少电路包括正弦波整形电路，其被提供有包括互调失真分量的输入频率调制信号，用于将输入调频信号的波形整形为近似正弦波的波形 以及平均DC电平检测电路，其被提供有正弦波整形电路的输出信号，用于检测正弦波整形电路的输出信号的平均DC电平并产生检测输出。 正弦波整形电路被提供有平均DC电平检测电路的检测输出，并且其波形整形量被改变以获得接近于正弦波形的波形。 正弦波整形电路产生具有接近正弦波形的波形的调频信号，其互调失真分量减小。

公开(公告)号：US4445143A

公开(公告)日：1984-04-24

申请号：US260589

申请日：1981-05-06

Applicant: Toyotaka Machida ,  Hitoshi Aoike ,  Toshimasa Kumazaki ,  Yasuaki Watanabe ,  Yuichi Ikemura

Inventor： Toyotaka Machida ,  Hitoshi Aoike ,  Toshimasa Kumazaki ,  Yasuaki Watanabe ,  Yuichi Ikemura

IPC: H04N5/903 ,  G11B19/28 ,  H04N5/76 ,  H04N9/80 ,  H04N9/85 ,  H04N9/89 ,  H04N9/491 ,  H04N9/44

CPC classification number: H04N5/7605 ,  G11B19/28

Abstract: A rotary recording medium reproducing apparatus reproduces a recorded signal from a rotary recording medium by use of a reproducing element. The rotary recording medium is recorded with at least a first carrier signal which is modulated by an information signal having a synchronizing signal of a predetermined frequency. The reproducing apparatus comprises a motor for rotating the rotary recording medium, a reference signal generating circuit for generating a reference signal having a frequency equal to a horizontal scanning frequency of a video signal of a standard television system which is characteristic of the reproducing apparatus and should originally be reproduced, or equal to 1/M (M is an integer) times the above horizontal scanning frequency, a detecting circuit for detecting a signal respective of the rotational speed of the rotary recording medium, and a comparator for comparing the reference signal and the signal respective of the rotational speed of the rotary recording medium, to control the rotational speed of the rotary recording medium by a compared output signal thus obtained, so that the synchronizing signal within the reproduced signal is reproduced at a frequency equal to the horizontal scanning frequency of the above standard television system with which the reproduction should originally be performed.

Abstract translation: 旋转记录介质再现装置通过再现元件再现来自旋转记录介质的记录信号。 记录旋转记录介质中的至少一个第一载波信号，该第一载波信号由具有预定频率的同步信号的信息信号调制。 再现装置包括用于旋转旋转记录介质的马达，参考信号发生电路，用于产生频率等于标准电视系统的视频信号的水平扫描频率的参考信号，该标准电视系统的特征在于再现装置， 最初被再现或等于上述水平扫描频率的1 / M（M是整数）倍的检测电路，用于检测旋转记录介质的旋转速度的信号的检测电路，以及用于将参考信号和 旋转记录介质的旋转速度的信号，通过如此获得的比较输出信号来控制旋转记录介质的转速，使再生信号内的同步信号以等于水平扫描的频率再现 上述标准电视系统的播放频率应该是 最终执行。

公开(公告)号：US4406981A

公开(公告)日：1983-09-27

申请号：US318879

申请日：1981-11-06

Applicant: Yasuaki Watanabe ,  Yukio Okabe

Inventor： Yasuaki Watanabe ,  Yukio Okabe

IPC: H02P3/10

CPC classification number: H02P3/10

Abstract: A rotation stopping apparatus for a motor comprises a frequency signal generating circuit for generating a signal having a frequency according to a rotational speed of a motor, a voltage forming circuit for forming a voltage according to the frequency of the frequency signal from the frequency signal generating circuit, a motor driving circuit for supplying a forward direction current to the motor upon rotation of the motor and supplying a reverse direction current to the motor when the rotation of the motor is stopped to perform a damping operation with respect to the rotation of the motor, a detecting circuit for detecting that a voltage from the voltage forming circuit has become below a predetermined threshold voltage, and an interrupting circuit for interrupting the supply of the reverse direction current to the motor by the motor driving circuit according to the detected result obtained from the detecting circuit.

Abstract translation: 一种用于电动机的旋转停止装置包括：频率信号发生电路，用于产生具有根据电动机的转速的频率的信号;电压形成电路，用于根据来自频率信号产生的频率信号的频率形成电压; 电动机驱动电路，用于在电动机旋转时向电动机提供正向电流，并且当电动机的旋转停止时向电动机提供反向电流以对电动机的转动进行阻尼操作 用于检测来自电压形成电路的电压已经变得低于预定阈值电压的检测电路，以及用于通过电动机驱动电路根据检测结果中断向电机提供反向电流的中断电路 检测电路。

公开(公告)号：US4295165A

公开(公告)日：1981-10-13

申请号：US122263

申请日：1980-02-19

Applicant: Yasuaki Watanabe ,  Teruaki Noda

Inventor： Yasuaki Watanabe ,  Teruaki Noda

IPC: H04N5/04 ,  H03J1/00 ,  H03J5/02 ,  H04N5/44 ,  H04N5/50

CPC classification number: H04N5/44 ,  H03J1/0033 ,  H03J5/0263

Abstract: A television signal discrimination system is used in a television receiver provided with an electronic tuner for producing as output an intermediate-frequency signal whose synchronizing frequency is varied in response to an applied voltage and with a circuit for detecting the output signal of the electronic tuner. This system comprises a first synchronizing signal separation circuit supplied with the output of the detection circuit and separating a vertical synchronizing signal, a first integration circuit connected to the output side of the first synchronizing signal separation circuit, a circuit supplied with an output voltage of the first integration circuit and a reference voltage and operating to compare the magnitudes thereof, a second synchronizing signal separation circuit supplied with the output of the detection circuit and separating a vertical synchronizing signal, a second integration circuit connected to the output side of the second synchronizing signal separation circuit, a circuit for discriminating the frequency of the output of the electronic tuner, and a circuit for discriminating a normal television signal on the basis of the output of the voltage comparing circuit, the output of the second integration circuit, and the output of the frequency discriminating circuit. The first synchronizing signal separation circuit and the first integration circuit producing, as output, different voltages, with the reference voltage as a borderline, depending on and distinguishing between the case where the output signal of the detection circuit is a normal television signal and the case where the output signal is a different spurious television signal.

Abstract translation: 在具有电子调谐器的电视接收机中使用电视信号识别系统，用于产生作为输出的同步频率响应于施加的电压而变化的中频信号和用于检测电子调谐器的输出信号的电路。 该系统包括：第一同步信号分离电路，其被提供有检测电路的输出并分离垂直同步信号;第一积分电路，连接到第一同步信号分离电路的输出侧;电路， 第一积分电路和参考电压并操作以比较其大小;第二同步信号分离电路，被提供有检测电路的输出并分离垂直同步信号;第二积分电路，连接到第二同步信号的输出侧 分离电路，用于鉴别电子调谐器的输出频率的电路，以及用于基于电压比较电路的输出，第二积分电路的输出和第二积分电路的输出来判别普通电视信号的电路 鉴频电路。 第一同步信号分离电路和第一积分电路根据并区分检测电路的输出信号是普通电视信号的情况和作为输出的不同电压产生基准电压作为边界线的情况 其中输出信号是不同的虚假电视信号。

公开(公告)号：US4169247A

公开(公告)日：1979-09-25

申请号：US909702

申请日：1978-05-25

Applicant: Yasuaki Watanabe ,  Yukio Okabe

Inventor： Yasuaki Watanabe ,  Yukio Okabe

IPC: H03G1/00 ,  H03G3/10 ,  H03F3/45

CPC classification number: H03G1/0023 ,  H03G3/10

Abstract: Two terminals of a variable resistor are respectively connected via resistors to bases of two transistors which constitute an input stage of a differential amplifier while the movable contact of the variable resistor is fed with a predetermined voltage. Either the resistance of the variable resistor with respect to the resistances of fixed resistors connected to the bases or the ratio between the fixed resistors is so selected that the variation of the maximum resistance of the variable resistor does not influence the relationship between the position of the movable contact and the gain of the differential amplifier.

Abstract translation: 可变电阻器的两个端子分别通过电阻器连接到构成差分放大器的输入级的两个晶体管的基极，同时可变电阻器的可动触点馈送预定电压。 可变电阻器的电阻相对于连接到基极的固定电阻器的电阻或固定电阻器之间的比率被选择为使得可变电阻器的最大电阻的变化不影响可变电阻器的位置之间的关系 可动触点和差分放大器的增益。

公开(公告)号：US08614921B2

公开(公告)日：2013-12-24

申请号：US12929798

申请日：2011-02-16

Applicant: Yasuaki Watanabe

Inventor： Yasuaki Watanabe

IPC: G11C16/06

CPC classification number: G11C29/50 ,  G11C16/04 ,  G11C29/026 ,  G11C29/50004 ,  G11C2029/1204 ,  G11C2029/5006

Abstract: A nonvolatile semiconductor memory device includes: a sense amplifier; bit lines coupled to the sense amplifier; memory cell transistors and dummy cell transistors coupled in parallel with the bit lines; and a current generating circuit that supplies a test current to current nodes. Either of the source and the drain of each of the dummy cell transistors is coupled to a bit line and the other is coupled to a current node. In a read operation test, the current generating circuit is activated and then the dummy cell transistors are turned on. The sense amplifier compares the test current passed through a bit line with a reference current and outputs output data corresponding to the result of the comparison.

Abstract translation: 非易失性半导体存储器件包括：读出放大器; 耦合到读出放大器的位线; 与位线并联耦合的存储单元晶体管和虚设单元晶体管; 以及向当前节点提供测试电流的电流产生电路。 每个虚设单元晶体管的源极和漏极之一耦合到位线，而另一个耦合到当前节点。 在读取操作测试中，激活电流产生电路，然后虚拟单元晶体管导通。 读出放大器将通过位线的测试电流与参考电流进行比较，并输出与比较结果相对应的输出数据。

公开(公告)号：US20130164042A1

公开(公告)日：2013-06-27

申请号：US13491200

申请日：2012-06-07

Applicant: Yoichi WATANABE ,  Makoto HIROTA ,  Tomoyuki YOSHII ,  Jun ABE ,  Yasuaki WATANABE ,  Shinichi KURAMOTO ,  Kunihiko SATO

Inventor： Yoichi WATANABE ,  Makoto HIROTA ,  Tomoyuki YOSHII ,  Jun ABE ,  Yasuaki WATANABE ,  Shinichi KURAMOTO ,  Kunihiko SATO

IPC: G03G15/09

CPC classification number: G03G15/0189 ,  G03G15/0812 ,  G03G15/0921

Abstract: A developing device includes first and second developer carriers facing each other in a facing region, a regulating member that regulates a layer thickness of developer, and a separation member. The first and second developer carriers respectively include first and second magnetic members that are respectively magnetized with first and second facing magnetic poles having opposite polarities. The separation member separates the developer so that the developer is supplied toward the first and second developer carriers. The separation member is disposed such that distances between the separation member and the first and second developer carriers are the smallest in a region in which a magnitude of a combined magnetic field of the first and second magnetic poles locally decreases as compared with a case where at least one of the first and second developer carriers is independently disposed due to interaction between the first and second facing magnetic poles.

Abstract translation: 显影装置包括在面对区域中彼此面对的第一和第二显影剂载体，调节显影剂的层厚度的调节构件和分离构件。 第一和第二显影剂载体分别包括分别由具有相反极性的第一和第二面对磁极磁化的第一和第二磁性构件。 分离构件分离显影剂，使得显影剂朝向第一和第二显影剂载体供应。 分离构件被布置成使得分离构件和第一和第二显影剂载体之间的距离在第一和第二磁极的组合磁场的大小局部减小的区域中最小， 由于第一和第二面对磁极之间的相互作用，第一和第二显影剂载体中的至少一个被独立地设置。

公开(公告)号：US20090262164A1

公开(公告)日：2009-10-22

申请号：US12335640

申请日：2008-12-16

Applicant: Keitaro Mori ,  Ryosaku Igarashi ,  Yasuaki Watanabe

Inventor： Keitaro Mori ,  Ryosaku Igarashi ,  Yasuaki Watanabe

IPC: B41J2/14 ,  B41J2/16

CPC classification number: G03G15/104

Abstract: A developer supply device, includes: a developer holder; and a developer reservoir which is disposed inside of the developer holder, holds a liquid developer, and has at least one supply section that supplies the liquid developer from the developer reservoir to the developer holder, the liquid developer including a toner and an aqueous medium, and the developer supply device supplying the liquid developer that has been supplied to the developer holder to a medium which is a supply target for the liquid developer.

Abstract translation: 一种显影剂供应装置，包括：显影剂载体; 以及显影剂储存器，其设置在显影剂保持器的内部，保持液体显影剂，并且具有至少一个供应部分，其将液体显影剂从显影剂储存器供应到显影剂载体，液体显影剂包括调色剂和水性介质， 以及将已经供给到显影剂保持器的液体显影剂供给到作为液体显影剂的供给对象的介质的显影剂供应装置。