公开(公告)号：US20120329417A1

公开(公告)日：2012-12-27

申请号：US13169699

申请日：2011-06-27

Applicant: Yuyu Chang ,  Hooman Darabi

Inventor： Yuyu Chang ,  Hooman Darabi

IPC: H04B7/00

CPC classification number: H04B1/109 ,  H03G3/3052 ,  H03G3/345 ,  H03G11/02

Abstract: Embodiments of a radio frequency (RF) receiver implementing one or more forms of protection to protect devices of the RF receiver from in-band interferers is provided. The RF receiver includes an integrated circuit terminal configured to couple a RF signal received at an antenna to a RF signal path, and a low noise amplifier (LNA) coupled to the RF signal path and configured to amplify the RF signal to provide an amplified RF signal. To protect the LNA from in-band interferers, the RF receiver can further include one or more clamping circuits and/or an over-voltage detector to determine if a peak of the RF signal exceeds an acceptable level.

Abstract translation: 提供了实现一种或多种形式的保护的射频（RF）接收机的实施例，以保护RF接收机的设备免受带内干扰。 RF接收机包括被配置为将在天线处接收的RF信号耦合到RF信号路径的集成电路终端和耦合到RF信号路径的低噪声放大器（LNA），并被配置为放大RF信号以提供放大RF 信号。 为了保护LNA免受带内干扰，RF接收机还可包括一个或多个钳位电路和/或过电压检测器，以确定RF信号的峰值是否超过可接受的电平。

公开(公告)号：US07840198B2

公开(公告)日：2010-11-23

申请号：US11733047

申请日：2007-04-09

Applicant: Arya Behzad ,  Adedayo Ojo ,  Yuyu Chang ,  Hung-Ming Chien ,  Kishore Rama Rao ,  Guruprasad Seetharam

Inventor： Arya Behzad ,  Adedayo Ojo ,  Yuyu Chang ,  Hung-Ming Chien ,  Kishore Rama Rao ,  Guruprasad Seetharam

IPC: H04B1/04

CPC classification number: H04B1/06 ,  H04B1/0057 ,  H04B1/0082 ,  H04B7/084

Abstract: Aspects of a method and system for processing signals in a high performance receive chain may include amplifying radio frequency signals in amplifier chains in a multistandard radio frequency front-end, comprising one or more shared processing stages, and combining, with substantially equal gain, a number of phase-shifted radio frequency signals of the radio frequency signals into substantially equal-gain-combined radio frequency signals. The substantially equal-gain-combined radio frequency signals may be demodulated to obtain inphase channels and quadrature channels. A number of inphase channels and quadrature channels may be processed in I-channel processing blocks and Q-channel processing blocks to generate an output analog baseband signal. The multistandard radio frequency front-end may be capable of processing Bluetooth® signals and Wireless Local Area Network (WLAN) signals. The amplifier chains may comprise a first amplifier and a second amplifier, where the first amplifier may be shared between Bluetooth® signal processing paths and WLAN signal processing paths.

Abstract translation: 用于处理高性能接收链中的信号的方法和系统的方面可以包括在多标准射频前端放大放大器链中的射频信号，包括一个或多个共享处理级，并且以基本相等的增益组合 射频信号的相移射频信号的数量变成基本相等增益组合的射频信号。 基本上等增益组合的射频信号可以被解调以获得同相信道和正交信道。 可以在I信道处理块和Q信道处理块中处理多个同相信道和正交信道，以产生输出模拟基带信号。 多标准射频前端可能能够处理蓝牙信号和无线局域网（WLAN）信号。 放大器链可以包括第一放大器和第二放大器，其中第一放大器可以在蓝牙信号处理路径和WLAN信号处理路径之间共享。

公开(公告)号：US07598813B2

公开(公告)日：2009-10-06

申请号：US11944723

申请日：2007-11-26

Applicant: Yuyu Chang

Inventor： Yuyu Chang

IPC: H03F3/04

CPC classification number: H03F1/223 ,  H03F1/301 ,  H03F3/193 ,  H03F3/245 ,  H03F2200/108 ,  H03F2200/18 ,  H03F2200/27 ,  H03F2200/294 ,  H03F2200/447 ,  H03F2200/451 ,  H03F2200/456 ,  H03G1/0088

Abstract: Radio frequency amplifier with constant gain setting. A circuitry that includes triple well connected MOSFETs is employed to eliminate body effects therein. The voltage gain as presented herein, being implemented using a ratio of certain elements within the circuitry, is immune to variations in temperature, power supply voltage, and process variations. One implementation employs an array of selectable MOSFETs to allow for more than one gain setting to be provided by the amplifier. Such an amplifier has a variable/selectable gain setting. An appropriately placed MOSFET is employed to provide the desired input impedance (e.g., 50Ω). This design can be implemented using multiple n-channel metal oxide semiconductor field-effect transistors (N-MOSFETs) (some of which are triple well connected) and p-channel metal oxide semiconductor field-effect transistors (P-MOSFETs), or alternatively using P-MOSFETs and N-MOSFETs.

Abstract translation: 射频放大器，恒定增益设定。 使用包括三阱连接的MOSFET的电路来消除其中的体效应。 使用电路内的某些元件的比率实现的本文所呈现的电压增益不受温度变化，电源电压和工艺变化的影响。 一个实现采用可选择的MOSFET阵列，以允许由放大器提供多于一个的增益设置。 这种放大器具有可变/可选择的增益设置。 使用适当放置的MOSFET来提供期望的输入阻抗（例如，50mega）。 该设计可以使用多个n沟道金属氧化物半导体场效应晶体管（N-MOSFET）（其中一些是三阱连接的）和p沟道金属氧化物半导体场效应晶体管（P-MOSFET）来实现，或者可选地 使用P-MOSFET和N-MOSFET。

公开(公告)号：US20090104873A1

公开(公告)日：2009-04-23

申请号：US11874314

申请日：2007-10-18

Applicant: Yuyu Chang ,  Hooman Darabi

Inventor： Yuyu Chang ,  Hooman Darabi

IPC: H04B7/14

CPC classification number: H03F3/195 ,  H03F3/45188 ,  H03F2203/45316 ,  H03F2203/45384 ,  H03F2203/45392 ,  H03F2203/45481 ,  H03F2203/45638

Abstract: Fully integrated compact cross-coupled low noise amplifier. A circuitry implementation that includes two pairs of metal oxide semiconductor field-effect transistors (MOSFETs) (either N-type of P-type) operates as an LNA, which can be used within any of a wide variety of communication devices. A majority of the elements are integrated within the design and need not be implemented off-chip, and this can provide for a reduction in area required by the circuitry. A differential 100Ω input impedance is provided by this design. A higher than typical power supply voltage can be employed (if desired) to accommodate one possible implementation that includes two parallel implemented resistors to ground.

Abstract translation: 全集成紧凑型交叉耦合低噪声放大器。 包括两对金属氧化物半导体场效应晶体管（MOSFET）（N型P型）的电路实现作为LNA工作，可以在各种通信设备中使用。 大多数元件集成在设计中，不需要在片外实现，这可以减少电路所需的面积。 此设计提供差分100Omega输入阻抗。 可以采用高于典型的电源电压（如果需要）以适应包括两个并联实现的接地电阻的一种可能的实现。

公开(公告)号：US07411381B2

公开(公告)日：2008-08-12

申请号：US11446408

申请日：2006-06-02

Applicant: Yuyu Chang ,  Hooman Darabi

Inventor： Yuyu Chang ,  Hooman Darabi

IPC: G05F3/16

CPC classification number: H03H7/06 ,  H03H7/0153 ,  H03H2210/043 ,  H03L7/06

Abstract: According to one general aspect, an apparatus includes a first resistor in a first current path of a resistor-capacitor (RC) circuit, the resistor connected to a power source. A variable capacitor is included in a second current path of the RC circuit and operably connected to the power source and a virtual ground generator. A comparison circuit is configured to make a determination regarding a voltage VR across the resistor to a ground relative to a voltage VC across the capacitor to a virtual ground from the virtual ground generator. A control circuit is configured to make an adjustment of a value of the variable capacitor, based on the determination.

Abstract translation: 根据一个一般方面，一种装置包括在电阻 - 电容（RC）电路的第一电流路径中的第一电阻器，该电阻器连接到电源。 可变电容器包括在RC电路的第二电流路径中并且可操作地连接到电源和虚拟接地发生器。 比较电路被配置为将电阻器两端的电压VR相对于电容器两端的电压VC相对于来自虚拟接地发生器的虚拟接地确定。 控制电路被配置为基于该确定来调整可变电容器的值。

公开(公告)号：US20070279032A1

公开(公告)日：2007-12-06

申请号：US11446408

申请日：2006-06-02

Applicant: Yuyu Chang ,  Hooman Darabi

Inventor： Yuyu Chang ,  Hooman Darabi

IPC: G05F3/16

CPC classification number: H03H7/06 ,  H03H7/0153 ,  H03H2210/043 ,  H03L7/06

Abstract: According to one general aspect, an apparatus includes a first resistor in a first current path of a resistor-capacitor (RC) circuit, the resistor connected to a power source. A variable capacitor is included in a second current path of the RC circuit and operably connected to the power source and a virtual ground generator. A comparison circuit is configured to make a determination regarding a voltage VR across the resistor to a ground relative to a voltage VC across the capacitor to a virtual ground from the virtual ground generator. A control circuit is configured to make an adjustment of a value of the variable capacitor, based on the determination.

Abstract translation: 根据一个一般方面，一种装置包括在电阻 - 电容（RC）电路的第一电流路径中的第一电阻器，该电阻器连接到电源。 可变电容器包括在RC电路的第二电流路径中并且可操作地连接到电源和虚拟接地发生器。 比较电路被配置为将电阻器两端的电压VR相对于电容器两端的电压VC相对于来自虚拟接地发生器的虚拟接地确定。 控制电路被配置为基于该确定来调整可变电容器的值。

公开(公告)号：US08354890B2

公开(公告)日：2013-01-15

申请号：US12914235

申请日：2010-10-28

Applicant: Yuyu Chang ,  John Leete ,  Walid Ahmed ,  Wei Luo

Inventor： Yuyu Chang ,  John Leete ,  Walid Ahmed ,  Wei Luo

IPC: H03B1/00 ,  H03B5/32

CPC classification number: H03B5/02 ,  H03B5/04 ,  H03B5/32 ,  H03B5/368 ,  H03B2200/0034 ,  H03L1/00

Abstract: Methods and systems are provided to calibrate an oscillator circuit to reduce frequency pulling as a result of a change in power to a portion of the oscillator circuit. In an embodiment, an oscillator is coupled to a clock buffer circuit and a tuning capacitor configured to tune a frequency of the oscillator to a baseline frequency required for cellular communications. A change in power to the clock buffer circuit initiates a change in an amount of capacitance seen by the oscillator, which negatively impacts the tuning of the oscillator. A register stores a frequency offset caused by the change in power, and the tuning capacitor is adjusted, using the frequency offset, in response to the change in power, such that the total amount of capacitance seen by the oscillator is not changed when the change in power occurs.

Abstract translation: 提供了方法和系统来校准振荡器电路，以减少振荡器电路的一部分功率变化导致的频率拉动。 在一个实施例中，振荡器耦合到时钟缓冲器电路和调谐电容器，其被配置为将振荡器的频率调谐到蜂窝通信所需的基准频率。 时钟缓冲电路的功率变化启动振荡器看到的电容量的变化，这对振荡器的调谐产生负面影响。 寄存器存储由功率变化引起的频率偏移，并且使用频率偏移来调整调谐电容器以响应功率的变化，使得当变化时振荡器所看到的电容量总和没有改变 发生电力。

公开(公告)号：US07990216B2

公开(公告)日：2011-08-02

申请号：US12474021

申请日：2009-05-28

Applicant: Yuyu Chang ,  Hooman Darabi

Inventor： Yuyu Chang ,  Hooman Darabi

IPC: H03F3/45

CPC classification number: H03F3/45188 ,  H03F3/195 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2203/45384 ,  H03F2203/45386 ,  H03F2203/45392 ,  H03F2203/45544 ,  H03F2203/45548 ,  H03F2203/45554 ,  H03F2203/45596 ,  H03F2203/45638 ,  H04B1/18

Abstract: Cross-coupled low noise amplifier for cellular applications. A circuitry implementation that includes two pairs of metal oxide semiconductor field-effect transistors (MOSFETs) (either N-type of P-type) operates as an LNA, which can be used within any of a wide variety of communication devices. In one embodiment, this design is particularly adaptable to cellular telephone applications. A majority of the elements are integrated within the design and need not be implemented off-chip, and this can provide for a reduction in area required by the circuitry. A very high output impedance is provided by using two transistors (implemented in a triple well configuration) with resistive source degeneration. A higher than typical power supply voltage can be employed (if desired) to accommodate the voltage drops of the resistors and transistors.

Abstract translation: 用于蜂窝应用的交叉耦合低噪声放大器。 包括两对金属氧化物半导体场效应晶体管（MOSFET）（N型P型）的电路实现作为LNA工作，可以在各种通信设备中使用。 在一个实施例中，该设计特别适用于蜂窝电话应用。 大多数元件集成在设计中，不需要在片外实现，这可以减少电路所需的面积。 通过使用具有电阻源退化的两个晶体管（以三阱配置实现）来提供非常高的输出阻抗。 可以使用高于典型的电源电压（如果需要）以适应电阻器和晶体管的电压降。

公开(公告)号：US20110143822A1

公开(公告)日：2011-06-16

申请号：US13033289

申请日：2011-02-23

Applicant: Yuyu Chang ,  Hooman Darabi

Inventor： Yuyu Chang ,  Hooman Darabi

IPC: H04W88/02

CPC classification number: H03F3/195 ,  H03F3/45188 ,  H03F2203/45316 ,  H03F2203/45384 ,  H03F2203/45392 ,  H03F2203/45481 ,  H03F2203/45638

Abstract: Fully integrated compact cross-coupled low noise amplifier. A circuitry implementation that includes two pairs of metal oxide semiconductor field-effect transistors (MOSFETs) (either N-type of P-type) operates as an LNA, which can be used within any of a wide variety of communication devices. A majority of the elements are integrated within the design and need not be implemented off-chip, and this can provide for a reduction in area required by the circuitry. A differential 100Ω input impedance is provided by this design. A higher than typical power supply voltage can be employed (if desired) to accommodate one possible implementation that includes two parallel implemented resistors to ground.

Abstract translation: 全集成紧凑型交叉耦合低噪声放大器。 包括两对金属氧化物半导体场效应晶体管（MOSFET）（N型P型）的电路实现作为LNA工作，可以在各种通信设备中使用。 大多数元件集成在设计中，不需要在片外实现，这可以减少电路所需的面积。 差分100＆OHgr; 输入阻抗由本设计提供。 可以采用高于典型的电源电压（如果需要）以适应包括两个并联实现的接地电阻的一种可能的实现。

公开(公告)号：US07679431B2

公开(公告)日：2010-03-16

申请号：US11944715

申请日：2007-11-26

Applicant: Yuyu Chang ,  Hooman Darabi

Inventor： Yuyu Chang ,  Hooman Darabi

IPC: H03B1/00 ,  H03K5/00 ,  H04B1/10

CPC classification number: G06G7/16 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D2200/0084

Abstract: Low flicker noise mixer and buffer. This design employs some native metal oxide semiconductor field-effect transistors (MOSFETs) (e.g., having no threshold voltage) within a passive mixer whose gates are driven using clock signals. These native MOSFETs maybe biased at one half of the power supply voltage to provide a lower noise figure. A cooperatively operating buffer employs appropriately places MOSFETs and resistors to ensure the desired gain. Relatively larger valued resistors can be employed to provide for higher voltage gain, and this can sometimes be accompanied with using a higher than typical power supply voltage. Source followers serve as output buffers and also ensure the required output DC voltage level as well. It is also noted that this design can be implemented using n-channel metal oxide semiconductor field-effect transistors (N-MOSFETs) of p-channel metal oxide semiconductor field-effect transistors (P-MOSFETs).

Abstract translation: 低闪烁噪声混频器和缓冲器。 该设计在无源混频器内采用一些本征金属氧化物半导体场效应晶体管（MOSFET）（例如，不具有阈值电压），其门的栅极使用时钟信号驱动。 这些原生MOSFET可能偏置在电源电压的一半处，以提供较低的噪声系数。 合作运行的缓冲器适当地放置MOSFET和电阻器以确保期望的增益。 可以采用相对较大值的电阻器来提供更高的电压增益，并且有时可以伴随使用高于典型的电源电压。 源跟随器用作输出缓冲器，并且还确保所需的输出直流电压电平。 还应注意，该设计可以使用p沟道金属氧化物半导体场效应晶体管（P-MOSFET）的n沟道金属氧化物半导体场效应晶体管（N-MOSFET）来实现。