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    Logo patterning methods for liquid crystal displays
    11.
    发明授权
    Logo patterning methods for liquid crystal displays 有权
    液晶显示器的标识图案化方法

    公开(公告)号：US09429803B2

    公开(公告)日：2016-08-30

    申请号：US14549309

    申请日：2014-11-20

    Applicant: Apple Inc.

    Inventor： Kwang Soon Park ,  Byung Duk Yang ,  Robin Huang ,  Shih Chang Chang

    IPC: G02F1/1335 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  G02F1/1333

    CPC classification number: G02F1/136209 ,  G02F1/133514 ,  G02F1/133553 ,  G02F1/1368 ,  G02F2001/133357 ,  H01L27/1218 ,  H01L27/1222 ,  H01L27/1248

    Abstract: A display may have a thin-film transistor (TFT) layer and a color filter layer. The TFT layer may have a first substrate, a first black masking layer, a planarization layer, and a layer of TFT circuitry on the planarization layer. The color filter layer may have a second substrate and a second black masking layer on the second substrate. A portion of the inactive area may serve as a logo area for displaying desired information to the user. A reflective structure may be formed on the bottom surface of the planarization layer, on the bottom surface of the first substrate, on the bottom surface of the second substrate, or on the upper surface of the first substrate in the logo area. In another embodiment, the logo area may be backlit by transmitting light through one or more openings in the first and second black masking layers in the logo area.

    Abstract translation: 显示器可以具有薄膜晶体管（TFT）层和滤色器层。 TFT层可以在平坦化层上具有第一衬底，第一黑色掩蔽层，平坦化层和TFT电路层。 滤色器层可以在第二基板上具有第二基板和第二黑色掩蔽层。 非活动区域的一部分可以用作用于向用户显示期望信息的标识区域。 反射结构可以形成在平坦化层的底表面，第一衬底的底表面，第二衬底的底表面上，或在徽标区域中的第一衬底的上表面上。 在另一个实施例中，标识区域可以通过将光透过标识区域中的第一和第二黑色掩蔽层中的一个或多个开口来进行背光。

    Liquid crystal display
    14.
    发明授权
    Liquid crystal display 有权

    公开(公告)号：US10754212B2

    公开(公告)日：2020-08-25

    申请号：US16041667

    申请日：2018-07-20

    Applicant: Apple Inc.

    Inventor： Byung Duk Yang ,  Hao-Lin Chiu ,  Kwang Soon Park ,  Kyung Wook Kim ,  Sai-Chang Liu ,  Shih Chang Chang

    IPC: G02F1/1335 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/1333

    Abstract: A display may have pixels configured to display images. The pixels may be formed from thin-film transistor circuitry on a substrate. Color filter elements formed from colored polymer such as colored photoimageable polymer may be formed on the substrate. A black matrix formed from black photoimageable polymer may have an array of openings. The colored polymer may have first portions that overlap the black matrix and second portions in the openings that form the color filter elements. In some portions of the pixels, the thin-film transistor circuitry may be interposed between the first portions of the colored polymer and the black matrix. In other portions of the pixels, data lines may be formed that are overlapped by the black matrix and that are interposed between the first portions of the colored polymer and the black matrix.

    Clock and signal distribution circuitry for displays
    15.
    发明授权
    Clock and signal distribution circuitry for displays 有权

    公开(公告)号：US10354607B2

    公开(公告)日：2019-07-16

    申请号：US15684109

    申请日：2017-08-23

    Applicant: Apple Inc.

    Inventor： Kwang Soon Park ,  Pei-En Chang ,  Szu-Hsien Lee

    IPC: G09G3/36 ,  G09G3/3233

    Abstract: A display may have an array of pixels. Rows of pixels may receive gate line signals over gate lines. Display driver circuitry may have an adjustable clock generator that generates a series of clock pulses with different respective fall times to help equalize kickback voltages in the pixels of different rows. Within each row, gate lines may be provided with multiple parallel lines shorted at a series of tap points to help equalize kickback voltages across the pixels of different columns. A clock path may be formed between the clock generator and gate driver circuits. The clock path may run along an edge of the array of pixels. To help equalize kickback voltages in the pixels of different rows, the clock path may have first and second parallel metal lines that are selectively shorted to each other at a series of tap point locations along the clock path.

    Display with Delay Compensation to Prevent Block Dimming
    17.
    发明申请
    Display with Delay Compensation to Prevent Block Dimming 有权
    显示延迟补偿以防止块调光

    公开(公告)号：US20160351105A1

    公开(公告)日：2016-12-01

    申请号：US14727721

    申请日：2015-06-01

    Applicant: Apple Inc.

    Inventor： Kwang Soon Park ,  Chun-Yao Huang ,  Shih Chang Chang

    IPC: G09G3/20

    CPC classification number: G02F1/13 ,  G02F1/13454 ,  G09G3/3648 ,  G09G3/3666 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2300/043 ,  G09G2300/08 ,  G09G2310/0286 ,  G09G2320/0223 ,  G09G2320/0233 ,  G11C19/00

    Abstract: A display may have an array of pixels controlled by display driver circuitry. The display driver circuitry may supply the pixels with data signals over data lines in columns of the pixels and may supply the pixels with gate line signals over gate lines in rows of the pixels. The display driver circuitry may have a display driver integrated circuit located on one of the edges of the display. The display driver circuitry may also have gate driver integrated circuits that extend along opposing edges of the display to form a pair of shift registers. Conductive lines in a display substrate may be coupled to opposing ends of the shift registers and to intermediate locations within the shift registers to minimize delays in distributing a gate high voltage signal from the display driver integrated circuit to the shift registers.

    Abstract translation: 显示器可以具有由显示驱动器电路控制的像素阵列。 显示驱动器电路可以通过像素列中的数据线向像素提供数据信号，并且可以通过像素行中的栅极线向栅格线信号提供栅极线信号。 显示驱动器电路可以具有位于显示器的一个边缘上的显示驱动器集成电路。 显示驱动器电路还可以具有沿显示器的相对边缘延伸的栅极驱动器集成电路，以形成一对移位寄存器。 显示衬底中的导电线可以耦合到移位寄存器的相对端和移位寄存器内的中间位置，以最小化将栅极高电压信号从显示驱动器集成电路分配到移位寄存器的延迟。

    Display With Segmented Common Voltage Paths and Common Voltage Compensation Circuits
    18.
    发明申请
    Display With Segmented Common Voltage Paths and Common Voltage Compensation Circuits 有权
    显示分段公共电压路径和公共电压补偿电路

    公开(公告)号：US20160334658A1

    公开(公告)日：2016-11-17

    申请号：US14712311

    申请日：2015-05-14

    Applicant: Apple Inc.

    Inventor： Young-Jik Jo ,  Chun-Yao Huang ,  Hao-Lin Chiu ,  Kwang Soon Park ,  Shih Chang Chang

    IPC: G02F1/133 ,  G02F1/1343

    CPC classification number: G02F1/13306 ,  G02F1/134336 ,  G09G3/3655

    Abstract: A display has an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The pixels may be liquid crystal display pixels. Each pixel may have a common electrode voltage terminal. The display may have a transparent conductive film that forms a common electrode voltage layer that overlaps that array and that is shorted to the common electrode voltage terminals of the pixels. Metal common electrode voltage lines may run across the transparent conductive film to reduce resistance. Metal common electrode voltage paths that are coupled to the metal common electrode voltage lines may run along the left and right edge of the display. Common electrode voltage compensation circuits may receive feedback from the metal common electrode voltage paths. There may be two or more common electrode voltage compensation circuits for both the left and right edges of the display.

    Abstract translation: 显示器具有由显示驱动器电路控制的像素阵列。 栅极驱动器电路将栅极线信号提供给像素的行。 像素可以是液晶显示像素。 每个像素可以具有公共电极电压端子。 显示器可以具有形成与该阵列重叠并且与像素的公共电极电压端子短路的公共电极电压层的透明导电膜。 金属公共电极电压线可以穿过透明导电膜以降低电阻。 耦合到金属公共电极电压线的金属公共电极电压路径可以沿着显示器的左边缘和右边缘延伸。 公共电极电压补偿电路可以从金属公共电极电压路径接收反馈。 对于显示器的左边缘和右边缘都可以有两个或更多个公共电极电压补偿电路。

    Display with low reflectivity alignment structures
    19.
    发明授权
    Display with low reflectivity alignment structures 有权
    显示低反射率对准结构

    公开(公告)号：US09494818B2

    公开(公告)日：2016-11-15

    申请号：US14512677

    申请日：2014-10-13

    Applicant: Apple Inc.

    Inventor： Kwang Soon Park ,  Byung Duk Yang ,  Christopher L. Boitnott ,  Chun-Yao Huang ,  Kuan-Ying Lin ,  Kyung-Wook Kim ,  Mohd Fadzli A. Hassan ,  Shih Chang Chang ,  Supriya Goyal ,  Yong Kwan Kim ,  Yu-Cheng Chen

    IPC: G02F1/1333 ,  G02F1/1335 ,  G02F1/13 ,  G02F1/1345

    CPC classification number: G02F1/133512 ,  G02F1/1309 ,  G02F1/13452 ,  G02F1/13458

    Abstract: A display may have a liquid crystal layer sandwiched between a thin-film transistor layer and a color filter layer. An upper polarizer may be placed on top of the thin-film transistor layer. A lower polarizer may be placed under the color filter layer. Components may be bonded to bond pads on the inner surface of the thin-film transistor layer using anisotropic conductive film. Bond quality may be assessed by probing probe pads that are coupled to the bond pads or by visually inspecting the bond pads through the thin-film transistor layer. Opaque masking material in the inactive area may be provided with openings to accommodate the bond pads. Additional opaque masking material may be placed on the underside of the upper polarizer and on the upper surface of the thin-film transistor layer to block the openings from view following visual inspection.

    Abstract translation: 显示器可以具有夹在薄膜晶体管层和滤色器层之间的液晶层。 上偏振器可以放置在薄膜晶体管层的顶部。 下偏振器可以放置在滤色器层下方。 可以使用各向异性导电膜将部件结合到薄膜晶体管层的内表面上的接合焊盘。 可以通过探测耦合到接合焊盘的探针焊盘或通过目视检查通过薄膜晶体管层的焊盘来评估焊盘质量。 在不活动区域中的不透明掩模材料可以设置有开口以容纳接合焊盘。 附加的不透明掩模材料可以放置在上偏振器的下侧和薄膜晶体管层的上表面上，以在视觉检查之后阻挡开口。

    Display with Low Reflectivity Alignment Structures
    20.
    发明申请
    Display with Low Reflectivity Alignment Structures 有权
    低反射率对准结构的显示

    公开(公告)号：US20150362770A1

    公开(公告)日：2015-12-17

    申请号：US14494529

    申请日：2014-09-23

    Applicant: Apple Inc.

    Inventor： Byung Duk Yang ,  Kwang Soon Park ,  Kyung-Wook Kim ,  Shih Chang Chang

    IPC: G02F1/1368 ,  G02F1/1345 ,  H01L23/544 ,  G02F1/1335

    CPC classification number: H01L23/544 ,  G02F1/1333 ,  G02F1/133512 ,  G02F1/13454 ,  G02F2001/133354 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2924/014

    Abstract: A display may have a thin-film transistor layer formed from a layer of thin-film, transistor circuitry on a substrate. The thin-film transistor layer may overlap a color filter layer. A portion of the thin-film transistor layer may extend past the color filter layer to for a ledge region. Components such as a flexible printed circuit and a display driver integrated circuit may be mounted to the thin-film transistor layer in the ledge region. The components may have alignment marks. The thin-film transistor layer may have a black masking layer that is patterned to form openings for display pixels. In a border area of the display that overlaps the ledge region, the thin-film transistor layer may have alignment mark viewing windows. Alignment marks formed from black masking material in the windows may be aligned with respective alignment marks on the components.

    Abstract translation: 显示器可以具有由薄膜晶体管电路在衬底上形成的薄膜晶体管层。 薄膜晶体管层可以与滤色器层重叠。 薄膜晶体管层的一部分可以延伸经过滤色器层到达凸缘区域。 诸如柔性印刷电路和显示驱动器集成电路的部件可以安装到凸缘区域中的薄膜晶体管层。 组件可以具有对准标记。 薄膜晶体管层可以具有被图案化以形成用于显示像素的开口的黑色掩模层。 在与凸缘区域重叠的显示器的边界区域中，薄膜晶体管层可以具有对准标记观察窗口。 窗口中由黑色掩蔽材料形成的对准标记可以与部件上的相应对准标记对齐。

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