公开(公告)号：US20210193578A1

公开(公告)日：2021-06-24

申请号：US16721664

申请日：2019-12-19

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG ,  Chun-Jun ZHUANG

IPC: H01L23/538 ,  H01L23/31 ,  H01L21/56 ,  H01L21/768 ,  H01L21/304

Abstract: A semiconductor package structure includes at least one first semiconductor die, at least one second semiconductor die and an encapsulant. The first semiconductor die has a first surface and includes a plurality of first pillar structures disposed adjacent to the first surface. The second semiconductor die is electrically connected to the first semiconductor die. The encapsulant covers the first semiconductor die and the second semiconductor die. A lower surface of the encapsulant is substantially coplanar with an end surface of each of the first pillar structures and a surface of the second semiconductor die.

公开(公告)号：US20210111139A1

公开(公告)日：2021-04-15

申请号：US16597720

申请日：2019-10-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor device package includes a redistribution layer, a first semiconductor device, a first connection structure, and a first conductive layer. The first semiconductor device can be disposed on the redistribution layer. The first connection structure can be disposed between the first semiconductor device and the redistribution layer. The first conductive layer can surround the first connection structure.

公开(公告)号：US20200219845A1

公开(公告)日：2020-07-09

申请号：US16241589

申请日：2019-01-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsiu-Chi LIU ,  Hsu-Nan FANG

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L21/768 ,  H01L21/56

Abstract: A semiconductor package structure includes a conductive trace layer, a semiconductor die over the conductive trace layer, a structure enhancement layer surrounding the semiconductor die, and an encapsulant covering the semiconductor die and the structure enhancement layer. The structure enhancement layer coincides with a mass center plane of the semiconductor package structure. The mass center plane is parallel to a top surface of the semiconductor die. A method for manufacturing the semiconductor package structure is also provided.

公开(公告)号：US20230369154A1

公开(公告)日：2023-11-16

申请号：US18226210

申请日：2023-07-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG

IPC: H01L23/31 ,  H01L23/373 ,  H01L23/367 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L23/3142 ,  H01L23/373 ,  H01L23/367 ,  H01L21/4882 ,  H01L24/20 ,  H01L24/13 ,  H01L21/565 ,  H01L2224/2101 ,  H01L2224/214 ,  H01L2924/3511 ,  H01L2224/13026

Abstract: A package structure and a method for manufacturing the same are provided. The package structure includes an electronic device, a heat spreader, an intermediate layer and an encapsulant. The electronic device includes a plurality of electrical contacts. The intermediate layer is interposed between the electronic device and the heat spreader. The intermediate layer includes a sintered material. The encapsulant encapsulates the electronic device. A surface of the encapsulant is substantially coplanar with a plurality of surfaces of the electrical contacts.

公开(公告)号：US20230223352A1

公开(公告)日：2023-07-13

申请号：US18121569

申请日：2023-03-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG ,  Chun-Jun ZHUANG

IPC: H01L23/544 ,  H01L21/56 ,  H01L23/31 ,  H01L23/18 ,  H01L27/148 ,  H01L23/00

CPC classification number: H01L23/544 ,  H01L21/56 ,  H01L23/18 ,  H01L23/3114 ,  H01L24/05 ,  H01L27/148 ,  H01L2223/54426 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05022 ,  H01L2924/181

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first passivation layer, a first metal layer and a first semiconductor die. The first metal layer is embedded in the first passivation layer. The first metal layer defines a first through-hole. The first semiconductor die is disposed on the first passivation layer.

公开(公告)号：US20220262697A1

公开(公告)日：2022-08-18

申请号：US17177997

申请日：2021-02-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG

IPC: H01L23/31 ,  H01L23/373 ,  H01L23/367 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48

Abstract: A package structure and a method for manufacturing the same are provided. The package structure includes an electronic device, a heat spreader, an intermediate layer and an encapsulant. The electronic device includes a plurality of electrical contacts. The intermediate layer is interposed between the electronic device and the heat spreader. The intermediate layer includes a sintered material. The encapsulant encapsulates the electronic device. A surface of the encapsulant is substantially coplanar with a plurality of surfaces of the electrical contacts.

公开(公告)号：US20210175139A1

公开(公告)日：2021-06-10

申请号：US16705002

申请日：2019-12-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG

IPC: H01L23/31 ,  H01L23/16 ,  H01L21/56 ,  H01L21/768 ,  H01L23/00

Abstract: A substrate structure includes a substrate, an encapsulating layer and a redistribution structure. The substrate has a first surface. The encapsulating layer surrounds the substrate and has a first surface. The redistribution structure is disposed on the first surface of the substrate and the first surface of the encapsulating layer. A gap exists in elevation between the first surface of the substrate and the first surface of the encapsulating layer.

公开(公告)号：US20210159156A1

公开(公告)日：2021-05-27

申请号：US16691296

申请日：2019-11-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG ,  Chun-Jun ZHUANG ,  Chen Yuan WENG

IPC: H01L23/498 ,  H01L23/544 ,  H01L23/528

Abstract: A device structure includes a first electronic structure and a plurality of first electric contacts. The first electronic structure has a surface and a center. The first electric contacts are exposed from the surface. The first electric contacts are spaced by a pitch that increases with increasing distance from the center.

公开(公告)号：US20210043604A1

公开(公告)日：2021-02-11

申请号：US16533537

申请日：2019-08-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/29 ,  H01L23/538 ,  H01L23/498 ,  H01L21/56 ,  H01L25/00 ,  H01L23/00

Abstract: A semiconductor package structure includes a substrate, a first semiconductor die, a first dielectric, a second semiconductor die, and a second dielectric. The substrate has a first surface. The first semiconductor die is disposed on the first surface. The first dielectric encapsulates the first semiconductor die. The second semiconductor die is disposed on the first surface and adjacent to the first semiconductor die. The second dielectric encapsulates the second semiconductor die. The first dielectric is in contact with the second dielectric. An average filler size in the first dielectric is substantially greater than an average filler size in the second dielectric.

公开(公告)号：US20180061805A1

公开(公告)日：2018-03-01

申请号：US15683697

申请日：2017-08-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG ,  Chun-Jun ZHUANG

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/29 ,  H01L23/538 ,  H01L25/065 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

Abstract: A semiconductor package structure includes at least one semiconductor die, at least one conductive pillar, an encapsulant and a circuit structure. The semiconductor die has an active surface. The conductive pillar is disposed adjacent to the active surface of the semiconductor die. The encapsulant covers the semiconductor die and the conductive pillar. The encapsulant defines at least one groove adjacent to and surrounding the conductive pillar. The circuit structure is electrically connected to the conductive pillar.