公开(公告)号：US20220037290A1

公开(公告)日：2022-02-03

申请号：US17499646

申请日：2021-10-12

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT ,  Kay Stefan ESSIG

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00

Abstract: A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.

公开(公告)号：US20180019175A1

公开(公告)日：2018-01-18

申请号：US15649543

申请日：2017-07-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Bernd Karl APPELT ,  Kay Stefan ESSIG

IPC: H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56

Abstract: A semiconductor package device includes a first die having a first surface and a second surface opposite to the first surface, and a first adhesive layer disposed on the first surface of the first die. The semiconductor package device further includes an encapsulant layer encapsulating the first die and the first adhesive layer, and a first conductive via disposed in the first adhesive layer and electrically connected to the first die.

公开(公告)号：US20170365542A1

公开(公告)日：2017-12-21

申请号：US15621968

申请日：2017-06-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Kay Stefan ESSIG ,  Chi-Tsung CHIU ,  Hui Hua LEE

IPC: H01L23/495

CPC classification number: H01L23/49575 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49811 ,  H01L23/49866 ,  H01L23/5386 ,  H01L23/5389 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/19 ,  H01L2224/24137 ,  H01L2224/24145 ,  H01L2224/24195 ,  H01L2224/24247 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/15153

Abstract: A semiconductor device package includes a first conductive base, a first semiconductor die, a dielectric layer, a first patterned conductive layer, and a second patterned conductive layer. The first conductive base defines a first cavity. The first semiconductor die is on a bottom surface of the first cavity. The dielectric layer covers the first semiconductor die, the first surface and the second surface of the first conductive base and fills the first cavity. The first patterned conductive layer is on a first surface of the dielectric layer. The second patterned conductive layer is on a second surface of the dielectric layer.

公开(公告)号：US20240355793A1

公开(公告)日：2024-10-24

申请号：US18137392

申请日：2023-04-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Kay Stefan ESSIG ,  You-Lung YEN ,  Bernd Karl APPELT ,  Jean Marc YANNOU

IPC: H01L25/10 ,  H01L23/31 ,  H01L23/538

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L2225/1058

Abstract: A semiconductor package structure and a method of manufacturing a semiconductor package structure is provided. The semiconductor package structure includes a carrier and a component. The carrier includes a first part and a second part separated from the first part. The component is disposed under the first part and electrically connected to the second part. The first part is configured to be electrically connected to a device disposed over the first part.

公开(公告)号：US20230039430A1

公开(公告)日：2023-02-09

申请号：US17395215

申请日：2021-08-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT ,  Kay Stefan ESSIG

IPC: H01L23/495 ,  H01L25/065 ,  H01L23/31 ,  H01L25/00

Abstract: An electronic package includes a patterned conductive layer and at least one conductive protrusion on the patterned conductive layer. The at least one conductive protrusion has a first top surface. The patterned conductive layer and the at least one conductive protrusion define a space. The electronic package further includes a first electronic component disposed in the space and a plurality of conductive pillars on the first electronic component. The conductive pillars have a second top surface. The first top surface is substantially level with the second top surface.

公开(公告)号：US20220359363A1

公开(公告)日：2022-11-10

申请号：US17315067

申请日：2021-05-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT ,  Kay Stefan ESSIG

IPC: H01L23/498 ,  H01L21/48

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first package and a second package. The first package includes a first substrate, an electronic component, a trace layer, and a first conductive structure. The first substrate has a first surface and a second surface opposite to the first surface. The electronic component is embedded in the first substrate. The trace layer has an uppermost conductive layer embedded in the first substrate and exposed from the first surface of the first substrate. The first conductive structure electrically connects the trace layer to the second surface of the first substrate. The second package is disposed on the first surface of the first substrate of the first package.

公开(公告)号：US20190088506A1

公开(公告)日：2019-03-21

申请号：US16182589

申请日：2018-11-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Bernd Karl APPELT ,  Kay Stefan ESSIG ,  William T. CHEN ,  Yuan-Chang SU

IPC: H01L21/56 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/495 ,  H01L21/48 ,  H01L23/00

Abstract: A semiconductor package includes: (1) a first die; (2) conductive pads electrically connected to the first die, and each of the conductive pads having a lower surface; (3) a package body encapsulating the first die and the conductive pads and exposing the lower surface of each of the conductive pads from a lower surface of the package body; and (4) first traces disposed on the lower surface of the package body and connected to the lower surface of each of the conductive pads, wherein a thickness of each of the first traces is less than 100 micrometers.