Input buffer
    11.
    发明授权

    公开(公告)号:US11152931B2

    公开(公告)日:2021-10-19

    申请号:US16939018

    申请日:2020-07-26

    Abstract: The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability to digitize wide bandwidth RF signals. These applications benefit from input circuitry which can perform well with high speed, wide bandwidth RF signals. An input buffer and bootstrapped switch are designed to service such applications, and can be implemented in 28 nm complementary metal-oxide (CMOS) technology.

    Input buffer
    12.
    发明授权

    公开(公告)号:US10727828B2

    公开(公告)日:2020-07-28

    申请号:US15689480

    申请日:2017-08-29

    Abstract: The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability to digitize wide bandwidth RF signals. These applications benefit from input circuitry which can perform well with high speed, wide bandwidth RF signals. An input buffer and bootstrapped switch are designed to service such applications, and can be implemented in 28 nm complementary metal-oxide (CMOS) technology.

    Complementary switches in current switching digital to analog converters
    13.
    发明授权
    Complementary switches in current switching digital to analog converters 有权
    电流开关数模转换器中的互补开关

    公开(公告)号:US09118346B2

    公开(公告)日:2015-08-25

    申请号:US14135198

    申请日:2013-12-19

    Abstract: The present disclosure provides embodiments of an improved current steering switching element for use in a digital to analog (DAC) converter. Typically, each current steering switching element in the DAC converter provides a varying set of currents for converting a digital input signal. Generally, the switches and drivers in the current steering switching elements are scaled down proportionally to the current being provided by the current steering switching element according to a ratio as less and less current is being driven by the switching element in order to overcome timing errors. However, device sizes are limited by the production process. When a switch is not scaled proportionally to the current, settling timing errors are present and affects the performance of the DAC. The improved current steering switching element alleviates this issue of timing errors by replacing the single switch with two complementary current steering switches.

    Abstract translation: 本公开提供了用于在数模转换器(DAC)中使用的改进的电流转向开关元件的实施例。 通常,DAC转换器中的每个电流转向开关元件提供用于转换数字输入信号的变化的电流组。 通常,当前转向开关元件中的开关和驱动器按照由当前转向开关元件提供的电流按比例按比例缩小,因为越来越少的电流被开关元件驱动以克服定时误差。 但是,设备尺寸受到生产过程的限制。 当开关未按比例与当前的比例缩放时,存在稳定的定时误差并影响DAC的性能。 改进的电流转向开关元件通过用两个互补电流转向开关替换单个开关来减轻定时误差的这个问题。

    Low-distortion programmable capacitor array
    14.
    发明授权
    Low-distortion programmable capacitor array 有权
    低失真可编程电容阵列

    公开(公告)号:US09106210B2

    公开(公告)日:2015-08-11

    申请号:US14187440

    申请日:2014-02-24

    CPC classification number: H03K5/01 H03H19/006 H03H19/008 H03K2217/0018

    Abstract: In one example embodiment, a programmable capacitor array is provided for low distortion and minimizing linearity degradation of an input (Vin) by utilizing control circuitry to switch on and off an array of MOSFET switches. The control circuitry turns on a MOSFET to load a capacitance on Vin and turns off the MOSFET to remove the capacitance from Vin in response to a Din control signal. When the intention is to load Vin with the capacitance, the MOSFET is left on continuously. When the intention is to remove or unload the capacitance from Vin, the MOSFET is primarily turned off, however, the MOSFET is still periodically turned on with appropriate voltage levels in response to a clock signal for periods of time when the loading of the capacitance on Vin is tolerable to the system, thereby ensuring minimal linearity degradation of Vin due to the programmable capacitor array system.

    Abstract translation: 在一个示例性实施例中,提供可编程电容器阵列用于通过利用控制电路来接通和关闭MOSFET开关阵列来实现低失真并最小化输入(Vin)的线性劣化。 控制电路打开MOSFET以在Vin上加载电容,并关闭MOSFET以响应于Din控制信号从Vin去除电容。 当意图将Vin加载到电容时,MOSFET保持连续。 当意图从Vin去除或卸载电容时,MOSFET主要被关闭,然而,当电容负载上升时,MOSFET的周期性响应于时钟信号,MOSFET仍然周期性地接通适当的电压电平 Vin可以容忍系统,从而确保由于可编程电容阵列系统导致Vin的最小线性退化。

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