公开(公告)号：US09871504B2

公开(公告)日：2018-01-16

申请号：US15045059

申请日：2016-02-16

Applicant: ANALOG DEVICES, INC.

Inventor： Martin Clara ,  Gil Engel

IPC: H03K5/13 ,  H03M1/06 ,  H03K5/00

CPC classification number: H03K5/13 ,  H03K2005/00286 ,  H03M1/06 ,  H03M1/1061 ,  H03M1/1215 ,  H03M1/662

Abstract: Differential clock phase imbalance can produce undesirable spurious content at a digital to analog converter output, or interleaving spurs on an analog-to-digital converter output spectrum, or more generally, in interleaving circuit architectures that depend on rising and falling edges of a differential input clock for triggering digital-to-analog conversion or analog-to-digital conversion. A differential phase adjustment approach measures for the phase imbalance and corrects the differential clock input signals used for generating clock signals which drive the digital-to-analog converter or the analog-to-digital converter. The approach can reduce or eliminate this phase imbalance, thereby reducing detrimental effects due to phase imbalance or differential clock skew.

公开(公告)号：US20150180501A1

公开(公告)日：2015-06-25

申请号：US14135198

申请日：2013-12-19

Applicant: Analog Devices, Inc.

Inventor： Matthew Louis Courcy ,  Martin Clara ,  Gabriele Manganaro ,  Gil Engel ,  Lawrence A. Singer

IPC: H03M1/74

CPC classification number: H03M1/747 ,  H03K17/162 ,  H03K17/693 ,  H03M1/068 ,  H03M1/66 ,  H03M1/742 ,  H03M1/745

Abstract: The present disclosure provides embodiments of an improved current steering switching element for use in a digital to analog (DAC) converter. Typically, each current steering switching element in the DAC converter provides a varying set of currents for converting a digital input signal. Generally, the switches and drivers in the current steering switching elements are scaled down proportionally to the current being provided by the current steering switching element according to a ratio as less and less current is being driven by the switching element in order to overcome timing errors. However, device sizes are limited by the production process. When a switch is not scaled proportionally to the current, settling timing errors are present and affects the performance of the DAC. The improved current steering switching element alleviates this issue of timing errors by replacing the single switch with two complementary current steering switches.

Abstract translation: 本公开提供了用于在数模转换器（DAC）中使用的改进的电流转向开关元件的实施例。 通常，DAC转换器中的每个电流转向开关元件提供用于转换数字输入信号的变化的电流组。 通常，当前转向开关元件中的开关和驱动器按照由当前转向开关元件提供的电流按比例按比例缩小，因为越来越少的电流被开关元件驱动以克服定时误差。 但是，设备尺寸受到生产过程的限制。 当开关未按比例与当前的比例缩放时，存在稳定的定时误差并影响DAC的性能。 改进的电流转向开关元件通过用两个互补电流转向开关替换单个开关来减轻定时误差的这个问题。

公开(公告)号：US09577657B1

公开(公告)日：2017-02-21

申请号：US15144163

申请日：2016-05-02

Applicant: ANALOG DEVICES, INC.

Inventor： Martin Clara

IPC: H03M1/10 ,  H03M3/00 ,  H03M1/66

CPC classification number: H03M3/38 ,  H03M1/109 ,  H03M1/1095 ,  H03M1/66 ,  H03M3/43

Abstract: A digital to analog converter (DAC) maps a digital word to an analog output. The DAC bits may have amplitude and timing errors. These errors (or sometimes referred herein as “non-idealities”) result in distortion and degradation of the dynamic range in DACs. To reduce these negative effects, delta-sigma patterns can be provided to two bit cells, a reference bit cell and a bit cell under calibration, to perform, e.g., amplitude calibration and timing skew calibration. Delta-sigma patterns are particularly advantageous over square wave signals, which cannot be scaled to perform amplitude calibration between bit cells having different bit weights and are limited in frequency to integer fractions of the sampling clock.

Abstract translation: 数模转换器（DAC）将数字字映射到模拟输出。 DAC位可能有幅度和定时误差。 这些误差（或有时在本文中称为“非理想性”）导致DAC中的动态范围的失真和劣化。 为了减少这些负面影响，可以向两位单元，参考位单元和校准下的位单元提供Δ-sigma模式，以执行例如幅度校准和定时偏移校准。 Δ-Σ模式对于不能被缩放以在具有不同位权重的位单元之间进行幅度校准并且在频率上受限于采样时钟的整数分数的方波特别有利。

公开(公告)号：US09118346B2

公开(公告)日：2015-08-25

申请号：US14135198

申请日：2013-12-19

Applicant: ANALOG DEVICES, INC.

Inventor： Matthew Louis Courcy ,  Martin Clara ,  Gabriele Manganaro ,  Gil Engel ,  Lawrence A. Singer

IPC: H03M1/66 ,  H03M1/74

CPC classification number: H03M1/747 ,  H03K17/162 ,  H03K17/693 ,  H03M1/068 ,  H03M1/66 ,  H03M1/742 ,  H03M1/745

Abstract: The present disclosure provides embodiments of an improved current steering switching element for use in a digital to analog (DAC) converter. Typically, each current steering switching element in the DAC converter provides a varying set of currents for converting a digital input signal. Generally, the switches and drivers in the current steering switching elements are scaled down proportionally to the current being provided by the current steering switching element according to a ratio as less and less current is being driven by the switching element in order to overcome timing errors. However, device sizes are limited by the production process. When a switch is not scaled proportionally to the current, settling timing errors are present and affects the performance of the DAC. The improved current steering switching element alleviates this issue of timing errors by replacing the single switch with two complementary current steering switches.

Abstract translation: 本公开提供了用于在数模转换器（DAC）中使用的改进的电流转向开关元件的实施例。 通常，DAC转换器中的每个电流转向开关元件提供用于转换数字输入信号的变化的电流组。 通常，当前转向开关元件中的开关和驱动器按照由当前转向开关元件提供的电流按比例按比例缩小，因为越来越少的电流被开关元件驱动以克服定时误差。 但是，设备尺寸受到生产过程的限制。 当开关未按比例与当前的比例缩放时，存在稳定的定时误差并影响DAC的性能。 改进的电流转向开关元件通过用两个互补电流转向开关替换单个开关来减轻定时误差的这个问题。