公开(公告)号：US10250250B2

公开(公告)日：2019-04-02

申请号：US15689491

申请日：2017-08-29

Applicant: Analog Devices, Inc.

Inventor： Siddharth Devarajan ,  Lawrence A. Singer

IPC: H03K17/06 ,  H03K17/0412 ,  H03M1/18 ,  H03K17/042 ,  H03K17/00 ,  H03K19/0185 ,  H03K19/017 ,  H03M1/06 ,  H03M1/12

Abstract: The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability to digitize wide bandwidth RF signals. These applications benefit from input circuitry which can perform well with high speed, wide bandwidth RF signals. An input buffer and bootstrapped switch are designed to service such applications, and can be implemented in 28 nm complementary metal-oxide (CMOS) technology.

公开(公告)号：US10158211B2

公开(公告)日：2018-12-18

申请号：US15244532

申请日：2016-08-23

Applicant: ANALOG DEVICES, INC.

Inventor： Erik D. Barnes ,  Lawrence A. Singer ,  Harvey Weinberg

IPC: H01S5/042 ,  H01S3/10 ,  H01S5/026 ,  H01S5/06 ,  H01S5/068 ,  H01S5/40

Abstract: Optical systems can emit train(s) of light pulses onto objects to derive a distance between the light source and the object. Achieving meter or centimeter resolution may require very short light pulses. It is not trivial to design a circuit that can generate narrow current pulses for driving a diode that emits the light pulses. An improved driver circuit has a pre-charge path comprising one or more inductive elements and a fire path comprising the diode. Switches in the driver circuit are controlled with predefined states during different intervals to pre-charge current in the one or more inductive elements prior to flowing current through the fire path to pulse the diode.

公开(公告)号：US20140266358A1

公开(公告)日：2014-09-18

申请号：US14187440

申请日：2014-02-24

Applicant: ANALOG DEVICES, INC.

Inventor： Siddharth Devarajan ,  Lawrence A. Singer

IPC: H03K5/01

CPC classification number: H03K5/01 ,  H03H19/006 ,  H03H19/008 ,  H03K2217/0018

Abstract: In one example embodiment, a programmable capacitor array is provided for low distortion and minimizing linearity degradation of an input (Vin) by utilizing control circuitry to switch on and off an array of MOSFET switches. The control circuitry turns on a MOSFET to load a capacitance on Vin and turns off the MOSFET to remove the capacitance from Vin in response to a Din control signal. When the intention is to load Vin with the capacitance, the MOSFET is left on continuously. When the intention is to remove or unload the capacitance from Vin, the MOSFET is primarily turned off, however, the MOSFET is still periodically turned on with appropriate voltage levels in response to a clock signal for periods of time when the loading of the capacitance on Vin is tolerable to the system, thereby ensuring minimal linearity degradation of Vin due to the programmable capacitor array system.

Abstract translation: 在一个示例性实施例中，提供可编程电容器阵列用于通过利用控制电路来接通和关闭MOSFET开关阵列来实现低失真并最小化输入（Vin）的线性劣化。 控制电路打开MOSFET以在Vin上加载电容，并关闭MOSFET以响应于Din控制信号从Vin去除电容。 当意图将Vin加载到电容时，MOSFET保持连续。 当意图从Vin去除或卸载电容时，MOSFET主要被关闭，然而，当电容负载上升时，MOSFET的周期性响应于时钟信号，MOSFET仍然周期性地接通适当的电压电平 Vin对系统是可以容忍的，从而确保由于可编程电容阵列系统引起的Vin的最小线性降低。

公开(公告)号：US10886697B2

公开(公告)日：2021-01-05

申请号：US16219754

申请日：2018-12-13

Applicant: Analog Devices, Inc.

Inventor： Erik D. Barnes ,  Lawrence A. Singer ,  Harvey Weinberg

IPC: H01S5/042 ,  H01S3/10 ,  H01S5/026 ,  H01S5/06 ,  H01S5/068 ,  H01S5/40

Abstract: Optical systems can emit train(s) of light pulses onto objects to derive a distance between the light source and the object. Achieving meter or centimeter resolution may require very short light pulses. It is not trivial to design a circuit that can generate narrow current pulses for driving a diode that emits the light pulses. An improved driver circuit has a pre-charge path comprising one or more inductive elements and a fire path comprising the diode. Switches in the driver circuit are controlled with predefined states during different intervals to pre-charge current in the one or more inductive elements prior to flowing current through the fire path to pulse the diode.

公开(公告)号：US11863165B2

公开(公告)日：2024-01-02

申请号：US17503883

申请日：2021-10-18

Applicant: Analog Devices, Inc.

Inventor： Lawrence A. Singer

IPC: H03K17/042 ,  H03K19/017 ,  H03M1/06 ,  H03M1/12 ,  H03K17/00 ,  H03K19/0185 ,  H03K17/0412 ,  H03K17/06 ,  H03M1/18

CPC classification number: H03K17/04206 ,  H03K17/005 ,  H03K17/04123 ,  H03K17/063 ,  H03K19/017 ,  H03K19/018521 ,  H03M1/0607 ,  H03M1/1245 ,  H03M1/183

Abstract: The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability to digitize wide bandwidth RF signals. These applications benefit from input circuitry which can perform well with high speed, wide bandwidth RF signals. An input buffer and bootstrapped switch are designed to service such applications, and can be implemented in 28 nm complementary metal-oxide (CMOS) technology.

公开(公告)号：US09641166B2

公开(公告)日：2017-05-02

申请号：US14206006

申请日：2014-03-12

Applicant: ANALOG DEVICES, INC.

Inventor： Siddharth Devarajan ,  Lawrence A. Singer

IPC: H03K17/04 ,  H03K17/16 ,  G11C27/02 ,  H03K17/0412

CPC classification number: H03K17/04 ,  G11C27/02 ,  H03K17/04123 ,  H03K2217/0054

Abstract: An apparatus and method for implementing a bootstrapped switching circuit having improved (i.e. faster) turn-on time is provided. In an embodiment, an inner switching loop is implemented in a bootstrapped switching circuit where the inner switching loop is configured to turn on an input switch in the bootstrapped drive circuit independent of the drive circuit output. The embodiment decouples the inner switching loop circuitry from the output drive circuit of the bootstrapped switching circuit, which typically has a larger load capacitance than the inner switching loop. This allows the inner switching loop to turn on the input switch in the bootstrapped switching circuit faster and decreases the turn-on time of the bootstrapped switching circuit.

公开(公告)号：US09294112B1

公开(公告)日：2016-03-22

申请号：US14540515

申请日：2014-11-13

Applicant: ANALOG DEVICES, INC.

Inventor： Siddharth Devarajan ,  Lawrence A. Singer ,  Prawal Man Shrestha ,  Pingli Huang

IPC: H03M1/12 ,  H03M1/06 ,  H03M1/08 ,  H03M1/00

CPC classification number: H03M1/121 ,  H03M1/00 ,  H03M1/0604 ,  H03M1/0607 ,  H03M1/0609 ,  H03M1/0612 ,  H03M1/066 ,  H03M1/0836 ,  H03M1/1033 ,  H03M1/12 ,  H03M1/1215 ,  H03M1/124

Abstract: A time-interleaved analog-to-digital converter (ADC) uses M sub-analog-to-digital converters (sub-ADCs) to, according to a sequence, sample an analog input signal to produce digital outputs. When the M sub-ADCs are interleaved, the digital outputs exhibit mismatch errors between the M sub-ADCs due to mismatches between the sub-ADCs. A more second order subtle effect is that the mismatch error for a particular digital output from a particular ADC, due to internal coupling or other such interaction and effects between the M sub-ADCs, can vary depending on which sub-ADC(s) were used before and/or after the particular sub-ADC. If M sub-ADCs are time-interleaved randomly, the mismatches between the M sub-ADCs become a function of the sub-ADC selection pattern in the sequence. The present disclosure describes mechanisms for measuring and reducing these order-dependent mismatches to achieve high dynamic range performance in the time-interleaved ADC.

Abstract translation: 时间交织的模数转换器（ADC）使用M个子模数转换器（sub-ADC），根据一个序列对模拟输入信号进行采样以产生数字输出。 当M个子ADC被交错时，由于子ADC之间的不匹配，数字输出在M个子ADC之间表现出失配误差。 更多的二阶微妙效应是，由于内部耦合或其他此类相互作用和M子ADC之间的影响，来自特定ADC的特定数字输出的失配误差可以根据哪些子ADC 在特定子ADC之前和之后使用。 如果M个子ADC随机进行时间交织，那么M个子ADC之间的失配成为序列中子ADC选择模式的函数。 本公开描述了用于测量和减少这些依赖于顺序的失配以在时间交织的ADC中实现高动态范围性能的机制。

公开(公告)号：US20150180501A1

公开(公告)日：2015-06-25

申请号：US14135198

申请日：2013-12-19

Applicant: Analog Devices, Inc.

Inventor： Matthew Louis Courcy ,  Martin Clara ,  Gabriele Manganaro ,  Gil Engel ,  Lawrence A. Singer

IPC: H03M1/74

CPC classification number: H03M1/747 ,  H03K17/162 ,  H03K17/693 ,  H03M1/068 ,  H03M1/66 ,  H03M1/742 ,  H03M1/745

Abstract: The present disclosure provides embodiments of an improved current steering switching element for use in a digital to analog (DAC) converter. Typically, each current steering switching element in the DAC converter provides a varying set of currents for converting a digital input signal. Generally, the switches and drivers in the current steering switching elements are scaled down proportionally to the current being provided by the current steering switching element according to a ratio as less and less current is being driven by the switching element in order to overcome timing errors. However, device sizes are limited by the production process. When a switch is not scaled proportionally to the current, settling timing errors are present and affects the performance of the DAC. The improved current steering switching element alleviates this issue of timing errors by replacing the single switch with two complementary current steering switches.

Abstract translation: 本公开提供了用于在数模转换器（DAC）中使用的改进的电流转向开关元件的实施例。 通常，DAC转换器中的每个电流转向开关元件提供用于转换数字输入信号的变化的电流组。 通常，当前转向开关元件中的开关和驱动器按照由当前转向开关元件提供的电流按比例按比例缩小，因为越来越少的电流被开关元件驱动以克服定时误差。 但是，设备尺寸受到生产过程的限制。 当开关未按比例与当前的比例缩放时，存在稳定的定时误差并影响DAC的性能。 改进的电流转向开关元件通过用两个互补电流转向开关替换单个开关来减轻定时误差的这个问题。

公开(公告)号：US08866652B2

公开(公告)日：2014-10-21

申请号：US13975291

申请日：2013-08-24

Applicant: Analog Devices, Inc.

Inventor： Lawrence A. Singer ,  Siddharth Devarajan

IPC: H03M1/12 ,  G11C27/02 ,  H03K17/04 ,  H03K17/041 ,  H03M1/08

CPC classification number: H03M1/1245 ,  G11C27/02 ,  G11C27/024 ,  H03K17/041 ,  H03M1/0836 ,  H03M1/1215

Abstract: An example apparatus, system, and method for sampling in an interleaved sampling circuit having multiple channels. In an embodiment, an input clock is used to synchronize the transitions of sampling clocks from a first to second voltage level, relative to one another. The sampling clocks are input to a sampling circuit. The input clock switches a common switch that pulls each sampling clock to the second voltage level through a common path on input clock transitions from a first to a second clock state. The transition from the first to a second voltage level of each sampling clock triggers a sample taken on one of the channels. The first voltage level may be boosted to drive switches on in the sampling circuit. Synchronizing transitions of the outputs through the common switch and common path reduces timing mismatch between the sampling clocks controlling the channels.

Abstract translation: 用于在具有多个通道的交错采样电路中采样的示例性装置，系统和方法。 在一个实施例中，输入时钟用于使采样时钟的转变从第一电压电平相对于第二电压电平彼此相同步。 采样时钟输入到采样电路。 输入时钟切换公共开关，其通过公共路径将每个采样时钟从第一时钟状态转换到第二时钟状态。 从每个采样时钟的第一电压电平到第二电压电平的转换触发在一个通道上采集的采样。 可以升高第一电压电平以驱动采样电路中的开关。 通过公共开关和公共路径同步输出的转换减少了控制通道的采样时钟之间的时序不匹配。

公开(公告)号：US20140253353A1

公开(公告)日：2014-09-11

申请号：US13975291

申请日：2013-08-24

Applicant: ANALOG DEVICES, INC.

Inventor： Lawrence A. Singer ,  Siddharth Devarajan

IPC: H03M1/12

CPC classification number: H03M1/1245 ,  G11C27/02 ,  G11C27/024 ,  H03K17/041 ,  H03M1/0836 ,  H03M1/1215

Abstract: An example apparatus, system, and method for sampling in an interleaved sampling circuit having multiple channels. In an embodiment, an input clock is used to synchronize the transitions of sampling clocks from a first to second voltage level, relative to one another. The sampling clocks are input to a sampling circuit. The input clock switches a common switch that pulls each sampling clock to the second voltage level through a common path on input clock transitions from a first to a second clock state. The transition from the first to a second voltage level of each sampling clock triggers a sample taken on one of the channels. The first voltage level may be boosted to drive switches on in the sampling circuit. Synchronizing transitions of the outputs through the common switch and common path reduces timing mismatch between the sampling clocks controlling the channels.

Abstract translation: 用于在具有多个通道的交错采样电路中采样的示例性装置，系统和方法。 在一个实施例中，输入时钟用于使采样时钟的转变从第一电压电平相对于第二电压电平彼此相同步。 采样时钟输入到采样电路。 输入时钟切换公共开关，其通过公共路径将每个采样时钟从第一时钟状态转换到第二时钟状态。 从每个采样时钟的第一电压电平到第二电压电平的转换触发在一个通道上采集的采样。 可以升高第一电压电平以驱动采样电路中的开关。 通过公共开关和公共路径同步输出的转换减少了控制通道的采样时钟之间的时序不匹配。