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    Method for chaining media processing
    11.
    发明授权
    Method for chaining media processing 有权

    公开(公告)号：US10102607B2

    公开(公告)日：2018-10-16

    申请号：US15692469

    申请日：2017-08-31

    Applicant: Apple Inc.

    Inventor： Timothy J. Millet ,  Manu Gulati ,  Arthur L. Spence ,  Gurjeet S. Saund ,  Robert P. Esser

    IPC: G06T1/20 ,  G06F9/52 ,  G06F9/48 ,  G06T1/60 ,  G09G5/36 ,  G09G5/00

    Abstract: One embodiment may include media circuits, an application processor, a direct memory access circuit (DMA), and a media managing circuit. The application processor may issue media commands into a queue. The media managing circuit may retrieve a first media command, set the DMA to copy data associated with the first media command to the first media circuit, and send the first media command to the first media circuit. While the first media command is being executed, the media managing circuit may also retrieve a second media command, determine that the second media command utilizes data that is dependent on a completion of the first media command, and set the DMA to copy data from the first media circuit to the second media circuit. After the first media command has been completed, the media managing circuit may also send the second media command to the second media circuit.

    METHOD FOR CHAINING MEDIA PROCESSING
    13.
    发明申请
    METHOD FOR CHAINING MEDIA PROCESSING 审中-公开

    公开(公告)号：US20170365034A1

    公开(公告)日：2017-12-21

    申请号：US15692469

    申请日：2017-08-31

    Applicant: Apple Inc.

    Inventor： Timothy J. Millet ,  Manu Gulati ,  Arthur L. Spence ,  Gurjeet S. Saund ,  Robert P. Esser

    IPC: G06T1/20 ,  G06F9/52 ,  G06F9/48 ,  G06T1/60 ,  G09G5/00 ,  G09G5/36

    CPC classification number: G06T1/20 ,  G06F9/4893 ,  G06F9/52 ,  G06T1/60 ,  G09G5/001 ,  G09G5/363 ,  G09G2360/08 ,  Y02D10/24

    Abstract: One embodiment may include media circuits, an application processor, a direct memory access circuit (DMA), and a media managing circuit. The application processor may issue media commands into a queue. The media managing circuit may retrieve a first media command, set the DMA to copy data associated with the first media command to the first media circuit, and send the first media command to the first media circuit. While the first media command is being executed, the media managing circuit may also retrieve a second media command, determine that the second media command utilizes data that is dependent on a completion of the first media command, and set the DMA to copy data from the first media circuit to the second media circuit. After the first media command has been completed, the media managing circuit may also send the second media command to the second media circuit.

    Controlling Display Performance Using Display Statistics and Feedback
    14.
    发明申请
    Controlling Display Performance Using Display Statistics and Feedback 审中-公开

    公开(公告)号：US20170352324A1

    公开(公告)日：2017-12-07

    申请号：US15274658

    申请日：2016-09-23

    Applicant: Apple Inc.

    Inventor： Arthur L. Spence ,  Jeremy T. Sandmel ,  David M. Chan ,  Chendi Zhang ,  Peter C. Tsoi

    IPC: G09G5/00 ,  G09G5/393 ,  G06T13/80 ,  G09G5/377 ,  G09G3/36

    Abstract: One embodiment provides for a display system to generate and display data on a display device, the display system comprising one or more graphics processors to generate one or more frames of data for display on the display device; a window manager to submit a request to display the one or more frames of data; a display engine to present the one or more frames of data to the display device for display; and display logic to receive the request to display the one or more frames of data and generate one or more display events for the display engine based on the request to display the one or more frames of data, wherein the display logic is to manage a set of statistics associated with the request.

    PREEMPTIVE REFRESH FOR REDUCED DISPLAY JUDDER
    18.
    发明申请
    PREEMPTIVE REFRESH FOR REDUCED DISPLAY JUDDER 有权

    公开(公告)号：US20220327977A1

    公开(公告)日：2022-10-13

    申请号：US17680103

    申请日：2022-02-24

    Applicant: Apple Inc.

    Inventor： Kevin W. Sliech ,  Jason N. Gomez ,  David A. Hartley ,  Chengrui Le ,  Paolo Sacchetto ,  Arthur L. Spence

    IPC: G09G3/20

    Abstract: In an embodiment, an electronic device includes an electronic display. The electronic display provides a programmable latency period in response to receiving a first image frame corresponding to first image frame data. The electronic display also displays the first image frame after the programmable latency period and during display of the first image frame, receives a second image frame corresponding to second image frame data. The electronic display also repeats display of the first image frame in response to receiving the second image frame.

    LOW-LATENCY CONTEXT SWITCH SYSTEMS AND METHODS
    19.
    发明申请
    LOW-LATENCY CONTEXT SWITCH SYSTEMS AND METHODS 有权

    公开(公告)号：US20220270567A1

    公开(公告)日：2022-08-25

    申请号：US17742251

    申请日：2022-05-11

    Applicant: Apple Inc.

    Inventor： Jim C. Chou ,  Honkai Tam ,  Roy G. Moss ,  Arthur L. Spence

    IPC: G09G5/00 ,  G06F3/14 ,  G06T11/60 ,  G06F3/147

    Abstract: An electronic device includes a display panel and image processing circuitry. The image processing circuitry receives input image data corresponding to an image to display on the display panel, modifies the input image data by executing a first context task (e.g., lower priority task), and receives a context switch request. The image processing circuitry also pauses modification of the input image data by pausing execution of the first context task and then switches to modifying the input image data by executing a second context task (e.g., higher priority task).

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