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    Memory device with internal signal processing unit
    11.
    发明授权
    Memory device with internal signal processing unit 有权
    内存信号处理单元

    公开(公告)号：US08788906B2

    公开(公告)日：2014-07-22

    申请号：US13860211

    申请日：2013-04-10

    Applicant: Apple Inc.

    Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    IPC: G11C23/00 ,  G06F12/00 ,  G06F11/10 ,  G11C11/56

    CPC classification number: G06F11/1072 ,  G06F11/1044 ,  G06F11/1048 ,  G06F11/1076 ,  G06F12/00 ,  G11C11/56 ,  G11C29/50004 ,  G11C29/52 ,  G11C2029/5004

    Abstract: A method for operating a memory includes storing data in a plurality of analog memory cells that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller, which is fabricated on a second semiconductor die that is different from the first semiconductor die. so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

    Abstract translation: 一种用于操作存储器的方法包括：通过将输入存储值写入到一组模拟存储器单元中，将数据存储在制造在第一半导体管芯上的多个模拟存储器单元中。 在存储数据之后，使用相应的不同的阈值集合读取组中每个模拟存储器单元的多个输出存储值，从而提供分别对应于阈值集合的输出存储值的多个输出组。 输出存储值的多个输出组由在第一半导体管芯上制造的电路预处理，以产生预处理的数据。 预处理数据被提供给存储器控制器，该存储器控制器制造在与第一半导体管芯不同的第二半导体管芯上。 以使得存储器控制器能够响应于预处理的数据重构数据。

    SELECTIVE ACTIVATION OF PROGRAMMING SCHEMES IN ANALOG MEMORY CELL ARRAYS
    12.
    发明申请
    SELECTIVE ACTIVATION OF PROGRAMMING SCHEMES IN ANALOG MEMORY CELL ARRAYS 审中-公开
    模拟记忆体阵列中编程方案的选择性激活

    公开(公告)号：US20140201433A1

    公开(公告)日：2014-07-17

    申请号：US14215208

    申请日：2014-03-17

    Applicant: Apple Inc.

    Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    IPC: G11C27/00

    CPC classification number: G11C27/005 ,  G11C7/02 ,  G11C11/5628 ,  G11C16/3418

    Abstract: A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme.

    Abstract translation: 一种用于数据存储的方法包括：定义第一编程方案，其编程一组模拟存储器单元，同时减少由与该组相邻的至少一个存储器单元引起的干扰;以及第二编程方案，其对该组模拟存储器单元进行编程 不能减少第一编程方案减少的所有干扰。 基于针对模拟存储器单元定义的标准来选择第一和第二编程方案之一。 使用所选择的编程方案将数据存储在模拟存储器单元的组中。

    MEMORY DEVICE WITH INTERNAL SIGNAL PROCESSING UNIT
    15.
    发明申请
    MEMORY DEVICE WITH INTERNAL SIGNAL PROCESSING UNIT 审中-公开
    具有内部信号处理单元的存储器件

    公开(公告)号：US20150309870A1

    公开(公告)日：2015-10-29

    申请号：US14740088

    申请日：2015-06-15

    Applicant: Apple Inc.

    Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    IPC: G06F11/10 ,  G11C29/52 ,  G11C29/50

    CPC classification number: G06F11/1072 ,  G06F11/1044 ,  G06F11/1048 ,  G06F11/1076 ,  G06F12/00 ,  G11C11/56 ,  G11C29/50004 ,  G11C29/52 ,  G11C2029/5004

    Abstract: A method for operating a memory includes storing data in a plurality of analog memory cells that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller, which is fabricated on a second semiconductor die that is different from the first semiconductor die. so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

    Abstract translation: 一种用于操作存储器的方法包括：通过将输入存储值写入到一组模拟存储器单元中，将数据存储在制造在第一半导体管芯上的多个模拟存储器单元中。 在存储数据之后，使用相应的不同的阈值集合读取组中每个模拟存储器单元的多个输出存储值，从而提供分别对应于阈值集合的输出存储值的多个输出组。 输出存储值的多个输出组由在第一半导体管芯上制造的电路预处理，以产生预处理的数据。 预处理数据被提供给存储器控制器，该存储器控制器制造在与第一半导体管芯不同的第二半导体管芯上。 以使得存储器控制器能够响应于预处理的数据重构数据。

    Selective activation of programming schemes in analog memory cell arrays
    16.
    发明授权
    Selective activation of programming schemes in analog memory cell arrays 有权
    在模拟存储单元阵列中选择性地激活编程方案

    公开(公告)号：US09007797B2

    公开(公告)日：2015-04-14

    申请号：US14215208

    申请日：2014-03-17

    Applicant: Apple Inc.

    Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    IPC: G11C27/00 ,  G11C7/02 ,  G11C11/56 ,  G11C16/34

    CPC classification number: G11C27/005 ,  G11C7/02 ,  G11C11/5628 ,  G11C16/3418

    Abstract: A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme.

    Abstract translation: 一种用于数据存储的方法包括：定义第一编程方案，其编程一组模拟存储器单元，同时减少由与该组相邻的至少一个存储器单元引起的干扰;以及第二编程方案，其对该组模拟存储器单元进行编程 不能减少第一编程方案减少的所有干扰。 基于针对模拟存储器单元定义的标准来选择第一和第二编程方案之一。 使用所选择的编程方案将数据存储在模拟存储器单元的组中。

    STORAGE AT M BITS/CELL DENSITY IN N BITS/CELL ANALOG MEMORY CELL DEVICES, M>N
    17.
    发明申请
    STORAGE AT M BITS/CELL DENSITY IN N BITS/CELL ANALOG MEMORY CELL DEVICES, M>N 有权
    存储在N位/细胞模拟记忆体细胞中的位置/细胞密度M> N

    公开(公告)号：US20140237322A1

    公开(公告)日：2014-08-21

    申请号：US14264303

    申请日：2014-04-29

    Applicant: Apple Inc.

    Inventor： Ofir Shalvi ,  Naftali Sommer ,  Uri Perlmutter ,  Dotan Sokolov

    IPC: G06F11/10

    CPC classification number: G06F11/1068 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/26 ,  G11C27/005 ,  G11C2211/5641

    Abstract: A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.

    Abstract translation: 一种用于数据存储的方法包括接收用于存储在包括多个模拟存储器单元的存储器中的数据，并且支持一组内置的编程命令。 每个编程命令在存储器单元的子集中编写从一组N页中选择的相应页面。 存储器单元的子集被编程为通过执行仅从集合中绘制的编程命令的序列来存储数据的M页M> N。

    Efficient readout from memory cells using data compression
    19.
    发明授权
    Efficient readout from memory cells using data compression 有权

    公开(公告)号：US10157013B2

    公开(公告)日：2018-12-18

    申请号：US15602444

    申请日：2017-05-23

    Applicant: Apple Inc.

    Inventor： Uri Perlmutter ,  Dotan Sokolov ,  Ofir Shalvi ,  Oren Golov

    IPC: H03M13/11 ,  G06F3/06 ,  G06F11/10 ,  G06F12/08

    Abstract: A method for data storage includes storing data in a group of analog memory cells by writing respective input storage values to the memory cells in the group. After storing the data, respective output storage values are read from the analog memory cells in the group. Respective confidence levels of the output storage values are estimated, and the confidence levels are compressed. The output storage values and the compressed confidence levels are transferred from the memory cells over an interface to a memory controller.

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