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    Memory device with internal signal processing unit
    1.
    发明授权
    Memory device with internal signal processing unit 有权
    内存信号处理单元

    公开(公告)号：US09086993B2

    公开(公告)日：2015-07-21

    申请号：US14306764

    申请日：2014-06-17

    Applicant: Apple Inc.

    Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    IPC: G06F11/00 ,  G06F11/10 ,  G11C11/56 ,  G06F12/00

    CPC classification number: G06F11/1072 ,  G06F11/1044 ,  G06F11/1048 ,  G06F11/1076 ,  G06F12/00 ,  G11C11/56 ,  G11C29/50004 ,  G11C29/52 ,  G11C2029/5004

    Abstract: A method for operating a memory includes storing data in a plurality of analog memory cells that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller, which is fabricated on a second semiconductor die that is different from the first semiconductor die. so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

    Abstract translation: 一种用于操作存储器的方法包括：通过将输入存储值写入到一组模拟存储器单元中，将数据存储在制造在第一半导体管芯上的多个模拟存储器单元中。 在存储数据之后，使用相应的不同的阈值集合读取组中每个模拟存储器单元的多个输出存储值，从而提供分别对应于阈值集合的输出存储值的多个输出组。 输出存储值的多个输出组由在第一半导体管芯上制造的电路预处理，以产生预处理的数据。 预处理数据被提供给存储器控制器，该存储器控制器制造在与第一半导体管芯不同的第二半导体管芯上。 以使得存储器控制器能够响应于预处理的数据重构数据。

    SELECTIVE ACTIVATION OF PROGRAMMING SCHEMES IN ANALOG MEMORY CELL ARRAYS
    2.
    发明申请
    SELECTIVE ACTIVATION OF PROGRAMMING SCHEMES IN ANALOG MEMORY CELL ARRAYS 审中-公开
    模拟记忆体阵列中编程方案的选择性激活

    公开(公告)号：US20150055388A1

    公开(公告)日：2015-02-26

    申请号：US14526833

    申请日：2014-10-29

    Applicant: Apple Inc.

    Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    IPC: G11C27/00

    CPC classification number: G11C27/005 ,  G11C7/02 ,  G11C11/5628 ,  G11C16/3418

    Abstract: A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme.

    Abstract translation: 一种用于数据存储的方法包括：定义第一编程方案，其编程一组模拟存储器单元，同时减少由与该组相邻的至少一个存储器单元引起的干扰;以及第二编程方案，其对该组模拟存储器单元进行编程 不能减少第一编程方案减少的所有干扰。 基于针对模拟存储器单元定义的标准来选择第一和第二编程方案之一。 使用选择的编程方案将数据存储在模拟存储器单元的组中。

    MEMORY DEVICE WITH INTERNAL SIGNAL PROCESSING UNIT
    3.
    发明申请
    MEMORY DEVICE WITH INTERNAL SIGNAL PROCESSING UNIT 审中-公开
    具有内部信号处理单元的存储器件

    公开(公告)号：US20140298139A1

    公开(公告)日：2014-10-02

    申请号：US14306764

    申请日：2014-06-17

    Applicant: Apple Inc.

    Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    IPC: G06F11/10

    CPC classification number: G06F11/1072 ,  G06F11/1044 ,  G06F11/1048 ,  G06F11/1076 ,  G06F12/00 ,  G11C11/56 ,  G11C29/50004 ,  G11C29/52 ,  G11C2029/5004

    Abstract: A method for operating a memory includes storing data in a plurality of analog memory cells that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller, which is fabricated on a second semiconductor die that is different from the first semiconductor die. so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

    Abstract translation: 一种用于操作存储器的方法包括：通过将输入存储值写入到一组模拟存储器单元中，将数据存储在制造在第一半导体管芯上的多个模拟存储器单元中。 在存储数据之后，使用相应的不同的阈值集合读取组中每个模拟存储器单元的多个输出存储值，从而提供分别对应于阈值集合的输出存储值的多个输出组。 输出存储值的多个输出组由在第一半导体管芯上制造的电路预处理，以产生预处理的数据。 预处理数据被提供给存储器控制器，该存储器控制器制造在与第一半导体管芯不同的第二半导体管芯上。 以使得存储器控制器能够响应于预处理的数据重构数据。

    Hierarchical data storage system
    5.
    发明授权
    Hierarchical data storage system 有权
    分层数据存储系统

    公开(公告)号：US09405705B2

    公开(公告)日：2016-08-02

    申请号：US14548664

    申请日：2014-11-20

    Applicant: Apple Inc.

    Inventor： Michael Shachar ,  Barak Rotbard ,  Oren Golov ,  Uri Perlmutter ,  Dotan Sokolov ,  Julian Vlaiko ,  Yair Schwartz

    IPC: G06F12/00 ,  G06F12/12 ,  G06F12/06 ,  G06F13/16 ,  G06F12/02 ,  G06F3/06 ,  G06F13/18

    CPC classification number: G06F12/12 ,  G06F3/0628 ,  G06F3/0683 ,  G06F3/0688 ,  G06F12/0246 ,  G06F12/0638 ,  G06F13/1657 ,  G06F13/1668 ,  G06F13/18 ,  G06F2212/1024 ,  G06F2212/7208

    Abstract: A data storage system includes a plurality of non-volatile memory devices arranged in one or more sets, a main controller and one or more processors. The main controller is configured to accept commands from a host and to convert the commands into recipes. Each recipe includes a list of multiple memory operations to be performed sequentially in the non-volatile memory devices belonging to one of the sets. Each of the processors is associated with a respective set of the non-volatile memory devices, and is configured to receive one or more of the recipes from the main controller and to execute the memory operations specified in the received recipes in the non-volatile memory devices belonging to the respective set.

    Abstract translation: 数据存储系统包括以一个或多个集合排列的多个非易失性存储器件，主控制器和一个或多个处理器。 主控制器配置为接受来自主机的命令，并将命令转换为配方。 每个配方包括要在属于其中一个组的非易失性存储器件中顺序执行的多个存储器操作的列表。 每个处理器与相应的一组非易失性存储器设备相关联，并且被配置为从主控制器接收一个或多个配方并且执行在非易失性存储器中接收的配方中指定的存储器操作 属于相应集合的设备。

    Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
    9.
    发明授权
    Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N 有权
    在N位/单元模拟存储单元器件中以M位/单元密度存储，M> N

    公开(公告)号：US08964466B2

    公开(公告)日：2015-02-24

    申请号：US14264303

    申请日：2014-04-29

    Applicant: Apple Inc.

    Inventor： Ofir Shalvi ,  Naftali Sommer ,  Uri Perlmutter ,  Dotan Sokolov

    IPC: G11C16/04 ,  G06F11/10 ,  G11C11/56 ,  G11C27/00 ,  G11C16/26

    CPC classification number: G06F11/1068 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/26 ,  G11C27/005 ,  G11C2211/5641

    Abstract: A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.

    Abstract translation: 一种用于数据存储的方法包括接收用于存储在包括多个模拟存储器单元的存储器中的数据，并且支持一组内置的编程命令。 每个编程命令在存储器单元的子集中编写从一组N页中选择的相应页面。 存储器单元的子集被编程为通过执行仅从集合中绘制的编程命令的序列来存储数据的M页M> N。

    SELECTIVE RE-PROGRAMMING OF ANALOG MEMORY CELLS
    10.
    发明申请
    SELECTIVE RE-PROGRAMMING OF ANALOG MEMORY CELLS 审中-公开
    模拟记忆细胞的选择性重新编程

    公开(公告)号：US20140340965A1

    公开(公告)日：2014-11-20

    申请号：US14336054

    申请日：2014-07-21

    Applicant: Apple Inc.

    Inventor： Naftali Sommer ,  Uri Perlmutter ,  Shai Winter

    IPC: G11C16/10 ,  G11C29/00 ,  G11C16/34

    CPC classification number: G11C16/10 ,  G11C11/5628 ,  G11C16/3459 ,  G11C29/78

    Abstract: A method for data storage includes defining, in a memory that includes multiple analog memory cells, an erased state, a set of non-erased programming states and a partial subset of the non-erased programming states. Data is initially stored in a first group of the analog memory cells by programming each of at least some of the memory cells in the first group from the erased state to a respective non-erased programming state selected from the set of non-erased programming states. After initially storing the data, a second group of the analog memory cells, which potentially cause interference to the first group, is programmed. After programming the second group, the first group is selectively re-programmed with the data by repeating programming of only the memory cells in the first group whose respective programming states belong to the partial subset.

    Abstract translation: 一种用于数据存储的方法包括在包括多个模拟存储器单元的存储器中定义擦除状态，一组未擦除的编程状态和未擦除编程状态的部分子集。 最初将数据存储在第一组模拟存储器单元中，通过将第一组中的至少一些存储单元中的每一个从擦除状态编程为从非擦除编程状态集合中选择的各自的非擦除编程状态 。 在最初存储数据之后，编程可能对第一组产生干扰的第二组模拟存储器单元。 在对第二组进行编程之后，通过重复仅对其各自编程状态属于部分子集的第一组中的存储器单元进行编程，对该第一组进行有选择地重新编程。

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