公开(公告)号：US20160336717A1

公开(公告)日：2016-11-17

申请号：US15019981

申请日：2016-02-10

Applicant: Apple Inc.

Inventor： Chin Han Lin ,  Kevin A. Sawyer ,  Neil MacKinnon ,  Venkataram R. Raju ,  Weiping Li ,  Xiaofeng Fan

IPC: H01S5/024 ,  H01S5/183 ,  H01S5/30 ,  H01S5/00

CPC classification number: H01S5/02469 ,  H01S5/0042 ,  H01S5/0217 ,  H01S5/0224 ,  H01S5/423

Abstract: A method for production of an optoelectronic device includes fabricating a plurality of vertical emitters on a semiconductor substrate. Respective top surfaces of the emitters are bonded to a heat sink, after which the semiconductor substrate is removed below respective bottom surfaces of the emitters. Both anode and cathode contacts are attached to the bottom surfaces so as to drive the emitters to emit light from the bottom surfaces. In another embodiment, the upper surface of a semiconductor substrate is bonded to a carrier substrate having through-holes that are aligned with respective top surfaces of the emitters, after which the semiconductor substrate is removed below respective bottom surfaces of the emitters, and the respective bottom surfaces of the emitters are bonded to a heat sink.

Abstract translation: 制造光电器件的方法包括在半导体衬底上制造多个垂直发射极。 发射器的各个顶表面被结合到散热器，之后半导体衬底在发射器的相应底表面之下移除。 阳极和阴极触点均附接到底表面，以便驱动发射器从底表面发光。 在另一个实施例中，将半导体衬底的上表面接合到具有与发射器的各个顶表面对准的通孔的载体衬底上，然后在发射器的相应底表面之下移除半导体衬底，并且分别 发射器的底表面结合到散热器。

公开(公告)号：US09293500B2

公开(公告)日：2016-03-22

申请号：US13782532

申请日：2013-03-01

Applicant: Apple Inc.

Inventor： Anup K. Sharma ,  Xiaofeng Fan ,  Xiangli Li ,  Chung Chun Wan ,  Chiajen Lee ,  Terry L. Gilton

IPC: H04N5/235 ,  G03B7/00 ,  H01L27/146 ,  H04N5/355 ,  H04N5/359 ,  H04N5/3745

CPC classification number: H01L27/14641 ,  H04N5/35536 ,  H04N5/3591 ,  H04N5/37452

Abstract: A method of operating an image sensor. Charge accumulated in a photodiode during a first sub-exposure may be selectively stored in a storage node responsive to a first control signal. Charge accumulated in the photodiode during a first reset period may be selectively discarded responsive to a second control signal. Charge accumulated in the photodiode during a second sub-exposure may be selectively stored responsive to the first control signal. Charge stored in the storage node from the first and second sub-exposures may be transferred to a floating diffusion node responsive to a third control signal.

Abstract translation: 一种操作图像传感器的方法。 在第一次曝光期间累积在光电二极管中的电荷可以响应于第一控制信号被选择性地存储在存储节点中。 响应于第二控制信号，可以选择性地丢弃在第一复位周期期间在光电二极管中累积的电荷。 可以响应于第一控制信号选择性地存储在第二副曝光期间在光电二极管中累积的电荷。 响应于第三控制信号，可以将存储在第一和第二子曝光中的存储节点中的电荷传送到浮动扩散节点。

公开(公告)号：US20140252201A1

公开(公告)日：2014-09-11

申请号：US13787094

申请日：2013-03-06

Applicant: APPLE INC.

Inventor： Xiangli Li ,  Xiaofeng Fan ,  Chung Chun Wan

IPC: H04N5/378

CPC classification number: H01L27/14609 ,  H01L27/14616 ,  H04N5/35572 ,  H04N5/37452 ,  H04N5/378

Abstract: Apparatuses and methods for charge transfer in image sensors are disclosed. One example of an image sensor pixel may include a first charge storage node and a second charge storage node. A transfer circuit may be coupled between the first and second charge storage nodes, and the transfer circuit may have a first region proximate the first charge storage node and configured to have a first potential. The transfer circuit may also have a second region proximate the second charge storage node configured to have a second, higher potential. An input node may be configured to control the first and second potentials based on a transfer signal provided to the input node.

Abstract translation: 公开了用于图像传感器中的电荷转移的装置和方法。 图像传感器像素的一个示例可以包括第一电荷存储节点和第二电荷存储节点。 传输电路可以耦合在第一和第二电荷存储节点之间，并且传输电路可以具有靠近第一电荷存储节点的第一区域并且被配置为具有第一电位。 转移电路还可以具有靠近第二电荷存储节点的第二区域，被配置为具有第二较高电位。 输入节点可以被配置为基于提供给输入节点的传送信号来控制第一和第二电位。

公开(公告)号：US20220102404A1

公开(公告)日：2022-03-31

申请号：US17473855

申请日：2021-09-13

Applicant: Apple Inc.

Inventor： Hong Wei Lee ,  Cristiano L. Niclass ,  Shingo Mandai ,  Xiaofeng Fan

IPC: H01L27/146 ,  H01L31/107

Abstract: Disclosed herein are photodetectors using arrays of pixels with single-photon avalanche diodes (SPADs). The pixel arrays may have configurations that include one or more control transistors for each SPAD collocated on the same chip or wafer as the pixels and located on a surface of the wafer opposite to the light gathering surface of the pixel arrays. The control transistors may be positioned or configured for interconnection with a logic chip that is bonded to the wafer of the pixel array. The pixels may be formed in a substrate having doping gradient. The control transistors may be positioned on or within the SPADs, or adjacent to, but isolated from, the SPADs. Isolation between the individual SPADs and the respective control transistors may make use of shallow trench isolation regions or deep trench isolation regions.

公开(公告)号：US11271031B2

公开(公告)日：2022-03-08

申请号：US16876511

申请日：2020-05-18

Applicant: Apple Inc.

Inventor： Shingo Mandai ,  Cristiano L. Niclass ,  Nobuhiro Karasawa ,  Xiaofeng Fan ,  Arnaud Laflaquiere ,  Gennadiy A. Agranov

IPC: H01L27/146 ,  G01S7/4863 ,  H01L31/107 ,  H04N5/355 ,  H04N5/357 ,  H04N5/369 ,  H04N5/3745 ,  H04N5/376 ,  H04N5/378 ,  G01S7/4861 ,  H01L31/02 ,  H01L31/0352

Abstract: A back-illuminated single-photon avalanche diode (SPAD) image sensor includes a sensor wafer stacked vertically over a circuit wafer. The sensor wafer includes one or more SPAD regions, with each SPAD region including an anode gradient layer, a cathode region positioned adjacent to a front surface of the SPAD region, and an anode avalanche layer positioned over the cathode region. Each SPAD region is connected to a voltage supply and an output circuit in the circuit wafer through inter-wafer connectors. Deep trench isolation elements are used to provide electrical and optical isolation between SPAD regions.

公开(公告)号：US20200266608A1

公开(公告)日：2020-08-20

申请号：US16867594

申请日：2020-05-06

Applicant: APPLE INC.

Inventor： Chin Han Lin ,  Weiping Li ,  Xiaofeng Fan

IPC: H01S5/183 ,  H01S5/042 ,  H01S5/42 ,  H01S5/187 ,  H01S5/026 ,  H01L29/15

Abstract: An optoelectronic device includes a semiconductor substrate and an array of optoelectronic cells, formed on the semiconductor substrate. The cells include first epitaxial layers defining a lower distributed Bragg-reflector (DBR) stack; second epitaxial layers formed over the lower DBR stack, defining a quantum well structure; third epitaxial layers, formed over the quantum well structure, defining an upper DBR stack; and electrodes formed over the upper DBR stack, which are configurable to inject an excitation current into the quantum well structure of each optoelectronic cell. A first set of the optoelectronic cells are configured to emit laser radiation in response to the excitation current. In a second set of the optoelectronic cells, interleaved with the first set, at least one element of the optoelectronic cells, selected from among the epitaxial layers and the electrodes, is configured so that the optoelectronic cells in the second set do not emit the laser radiation.

公开(公告)号：US10658419B2

公开(公告)日：2020-05-19

申请号：US15713520

申请日：2017-09-22

Applicant: Apple Inc.

Inventor： Shingo Mandai ,  Cristiano L. Niclass ,  Nobuhiro Karasawa ,  Xiaofeng Fan ,  Arnaud Laflaquiere ,  Gennadiy A. Agranov

IPC: H01L27/146 ,  G01S7/486 ,  H04N5/357 ,  H04N5/369 ,  H01L31/107 ,  H04N5/355 ,  H04N5/376 ,  H04N5/3745 ,  H04N5/378 ,  H01L31/02 ,  H01L31/0352 ,  G01S7/4861 ,  G01S7/4863

Abstract: A back-illuminated single-photon avalanche diode (SPAD) image sensor includes a sensor wafer stacked vertically over a circuit wafer. The sensor wafer includes one or more SPAD regions, with each SPAD region including an anode gradient layer, a cathode region positioned adjacent to a front surface of the SPAD region, and an anode avalanche layer positioned over the cathode region. Each SPAD region is connected to a voltage supply and an output circuit in the circuit wafer through inter-wafer connectors. Deep trench isolation elements are used to provide electrical and optical isolation between SPAD regions.

公开(公告)号：US10103512B2

公开(公告)日：2018-10-16

申请号：US15641244

申请日：2017-07-04

Applicant: APPLE INC.

Inventor： Tongbi T. Jiang ,  Weiping Li ,  Xiaofeng Fan

IPC: H01S5/024 ,  H01S5/42 ,  H01S5/042 ,  H01S5/183

Abstract: An optoelectronic device includes a semiconductor substrate, having front and back sides and having at least one cavity extending from the back side through the semiconductor substrate into proximity with the front side. At least one optoelectronic emitter is formed on the front side of the semiconductor substrate in proximity with the at least one cavity. A heat-conducting material at least partially fills the at least one cavity and is configured to serve as a heat sink for the at least one optoelectronic emitter.

公开(公告)号：US20170214241A1

公开(公告)日：2017-07-27

申请号：US15175792

申请日：2016-06-07

Applicant: Apple Inc.

Inventor： Xiaofeng Fan ,  Xin Y. Zhang ,  Junjun Li

IPC: H02H9/04 ,  H02H1/00

CPC classification number: H02H9/046 ,  H01L27/0285 ,  H02H1/0007 ,  H02H3/20 ,  H02H9/041 ,  H05K1/0259

Abstract: An apparatus includes a device, a comparison circuit, and a switch. The device includes a first terminal coupled to a first power supply signal, and a second terminal coupled to a ground reference. The comparison circuit is configured to compare a first voltage level on the first power supply signal to a second voltage level of a second power supply signal, and enable the device in response to a determination that the first voltage level is greater than the second voltage level. The switch circuit is configured to couple a power supply terminal of the comparison circuit to the first power supply signal in response to determining that the first voltage level is greater than the second voltage level, and to couple the power supply terminal to the second power supply signal in response to determining that the first voltage level is less than the second voltage level.

公开(公告)号：US20160343770A1

公开(公告)日：2016-11-24

申请号：US15225681

申请日：2016-08-01

Applicant: Apple Inc.

Inventor： Xiaofeng Fan

IPC: H01L27/148 ,  H01L27/146

CPC classification number: H04N5/369 ,  H01L27/14614 ,  H01L27/14616 ,  H01L27/14634 ,  H01L27/14638 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14654 ,  H01L27/14843 ,  H01L29/7827 ,  H04N5/335 ,  H04N9/045

Abstract: A vertically stacked image sensor having a photodiode chip and a transistor array chip. The photodiode chip includes at least one photodiode and a transfer gate extends vertically from a top surface of the photodiode chip. The image sensor further includes a transistor array chip stacked on top of the photodiode chip. The transistor array chip includes the control circuitry and storage nodes. The image sensor further includes a logic chip vertically stacked on the transistor array chip. The transfer gate communicates data from the at least one photodiode to the transistor array chip and the logic chip selectively activates the vertical transfer gate, the reset gate, the source follower gate, and the row select gate.

Abstract translation: 具有光电二极管芯片和晶体管阵列芯片的垂直堆叠图像传感器。 光电二极管芯片包括至少一个光电二极管，并且传输门从光电二极管芯片的顶表面垂直延伸。 图像传感器还包括堆叠在光电二极管芯片顶部的晶体管阵列芯片。 晶体管阵列芯片包括控制电路和存储节点。 图像传感器还包括垂直堆叠在晶体管阵列芯片上的逻辑芯片。 传输门将数据从至少一个光电二极管传送到晶体管阵列芯片，逻辑芯片选择性地激活垂直传输门，复位栅极，源极跟随器栅极和行选择栅极。