公开(公告)号：US20170206838A1

公开(公告)日：2017-07-20

申请号：US15321543

申请日：2016-03-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Cuili GAI ,  Liye DUAN ,  Xiaodi LIU

IPC: G09G3/3258

CPC classification number: G09G3/3258 ,  G09G3/3225 ,  G09G2300/0426 ,  G09G2300/0814 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2310/0262 ,  G09G2320/0233 ,  G09G2320/043 ,  G09G2320/045

Abstract: Embodiments of the present disclosure provide a pixel driving circuit and a pixel driving method. The pixel driving circuit comprises a driving transistor, a storage capacitor, a light-emitting device, a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor and a fifth switch transistor. The pixel driving circuit and the pixel driving method are implemented such that a driving current generated by the driving transistor is relevant to a working voltage provided by a first power supply terminal, an activation voltage of the light-emitting device, a working voltage of the light-emitting device upon emitting light and a data voltage, yet irrelevant to a threshold voltage of the driving transistor, thereby refraining the driving current flowing through the light-emitting device from influence exerted by the non-uniformity and drifting of the threshold voltage of the driving transistor, and in turn effectively improving the uniformity of the driving current flowing through the light-emitting device. When the activation voltage of the light-emitting device increases with the aging of the light-emitting device, the pixel driving circuit and the pixel driving method enable the driving current flowing through the light-emitting device to increase, thereby compensating for attenuation of the display luminance caused by the aging of the light-emitting device.

公开(公告)号：US20160335937A1

公开(公告)日：2016-11-17

申请号：US14785709

申请日：2015-04-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chungchun LEE ,  Liye DUAN ,  Yanzhao LI ,  Chunwei WU ,  Hanjun PARK

IPC: G09G3/20

CPC classification number: G09G3/2003 ,  G09G3/2074 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0443 ,  G09G2300/0452 ,  G09G2300/0465 ,  G09G2300/0804 ,  G09G2300/0814 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2340/0457

Abstract: The invention provides an array substrate and a driving method thereof, a display panel and a display device. The array substrate comprises a plurality of circulating units and a plurality of pixel circuits. Each circulating unit consists of four sub-pixel units located in four columns and two rows, sub-pixel units in any two adjacent columns are located in different rows and have different colors, and sub-pixel units in at least one row have different colors. Each sub-pixel unit is connected to one pixel circuit, and each sub-pixel unit comprises a first sub-pixel and a second sub-pixel located in the same column and having the same color. The pixel circuit is configured to drive the first sub-pixel when a first frame picture is displayed, and to drive the second sub-pixel when a second frame picture is displayed.

Abstract translation: 本发明提供阵列基板及其驱动方法，显示面板和显示装置。 阵列基板包括多个循环单元和多个像素电路。 每个循环单元由位于四列和两行的四个子像素单元组成，任何两个相邻列中的子像素单元位于不同行中并具有不同的颜色，并且至少一行中的子像素单元具有不同的颜色 。 每个子像素单元连接到一个像素电路，并且每个子像素单元包括位于同一列中并且具有相同颜色的第一子像素和第二子像素。 像素电路被配置为当显示第一帧图像时驱动第一子像素，并且当显示第二帧图像时驱动第二子像素。

公开(公告)号：US20160240127A1

公开(公告)日：2016-08-18

申请号：US14349860

申请日：2013-08-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Liye DUAN ,  Lirong WANG ,  Zhongyuan WU

IPC: G09G3/20 ,  G09G3/3241

CPC classification number: G09G3/2007 ,  G09G3/3241 ,  G09G2300/0819 ,  G09G2310/0251 ,  G09G2320/0271

Abstract: An AMOLED pixel circuit and driving method are disclosed. The AMOLED pixel circuit comprises a first transistor(T1), a second transistor(T2), a third transistor(T3), a fourth transistor(T4), a fifth transistor(T5), a sixth transistor(T6), a seventh transistor(T7), an eighth transistor(T8), a first capacitor(C1), a second capacitor(C2), a current source and a light-emitting device(OLED). The AMOLED pixel circuit can perform a rapid charging in a low gray scale state; different currents may be provided according to information on a high or low gray scale, and thus the AMOLED pixel circuit may be applied widely; an output current during a light-emitting period is a normal operational current of the light-emitting device; therefore not only a charging process is expedited, but also a normal operation of the light-emitting device is ensured.

Abstract translation: 公开了一种AMOLED像素电路和驱动方法。 AMOLED像素电路包括第一晶体管（T1），第二晶体管（T2），第三晶体管（T3），第四晶体管（T4），第五晶体管（T5），第六晶体管（T6），第七晶体管 （T7），第八晶体管（T8），第一电容器（C1），第二电容器（C2），电流源和发光器件（OLED）。 AMOLED像素电路可以在低灰度状态下执行快速充电; 可以根据关于高或低灰度级的信息提供不同的电流，因此可以广泛应用AMOLED像素电路; 在发光周期期间的输出电流是发光装置的正常工作电流; 因此，不仅加快了充电过程，而且确保了发光装置的正常操作。

公开(公告)号：US20160180770A1

公开(公告)日：2016-06-23

申请号：US14646179

申请日：2014-09-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Liye DUAN ,  Zhongyuan WU ,  Lirong WANG ,  Kun CAO

IPC: G09G3/32

CPC classification number: G09G3/3233 ,  G09G3/3291 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2300/0866 ,  G09G2310/0289 ,  G09G2320/0233 ,  G09G2320/0626 ,  G09G2330/021

Abstract: There are provided a pixel circuit and a driving method thereof, and a display apparatus. The pixel circuit comprises: a first transistor (T1), a second transistor (T2), a third transistor (T3), a storage capacitor (C1) and a light emitting device (L). A gate of the first transistor (T1) is connected to a first control signal terminal (S1), and a first electrode thereof is connected to a data signal terminal (DATA); a gate of the second transistor (T2) is connected to a second electrode of the first transistor (T1), a first electrode thereof is connected to a second electrode of the third transistor (T3), and a second electrode thereof is connected to a first terminal of the light emitting device (L); a gate of the third transistor (3) is connected to a second control signal terminal (S2), and a first electrode thereof is connected to a first power supply signal terminal (ELVDD); one terminal of the storage capacitor (C1) is connected to the gate of the second transistor (T2), and the other terminal thereof is connected to the second electrode of the second transistor (T2); one terminal of a parasitic capacitor (C2) formed by the light emitting device is connected to the first terminal of the light emitting device (L), and the other terminal thereof is connected to a second terminal of the light emitting device (L); and the second terminal of the light emitting device (L) is further connected to a second power supply signal terminal (ELVSS). The pixel circuit can compensate for the threshold voltage drift of TFT effectively and rise display effect.

Abstract translation: 提供了像素电路及其驱动方法和显示装置。 像素电路包括：第一晶体管（T1），第二晶体管（T2），第三晶体管（T3），存储电容器（C1）和发光器件（L）。 第一晶体管（T1）的栅极连接到第一控制信号端子（S1），其第一电极连接到数据信号端子（DATA）; 第二晶体管（T2）的栅极连接到第一晶体管（T1）的第二电极，其第一电极连接到第三晶体管（T3）的第二电极，并且其第二电极连接到 发光装置（L）的第一端子; 第三晶体管（3）的栅极连接到第二控制信号端子（S2），其第一电极连接到第一电源信号端子（ELVDD）; 存储电容器（C1）的一个端子连接到第二晶体管（T2）的栅极，另一个端子连接到第二晶体管（T2）的第二电极; 由发光器件形成的寄生电容器（C2）的一个端子连接到发光器件（L）的第一端子，并且其另一个端子连接到发光器件（L）的第二端子; 并且发光器件（L）的第二端子进一步连接到第二电源信号端子（ELVSS）。 像素电路可以有效地补偿TFT的阈值电压漂移并提高显示效果。

公开(公告)号：US20150339974A1

公开(公告)日：2015-11-26

申请号：US14348720

申请日：2013-06-26

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhongyuan WU ,  Liye DUAN

IPC: G09G3/32 ,  G09G3/20

CPC classification number: G09G3/3233 ,  G09G3/2003 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0248 ,  G09G2310/0251 ,  G09G2310/0289 ,  G09G2320/0233 ,  G09G2320/029 ,  G09G2320/043 ,  G09G2320/045

Abstract: A pixel unit circuit, a compensating method thereof and a display device. The pixel unit circuit includes a driving transistor, a first transistor, a second transistor, a third transistor, a fourth transistor, a storage capacitor and a light-emitting device (OLED). The pixel unit circuit, the compensating method thereof and the display device may compensate the light emitting device by combining an internal compensation and an external compensation, and have advantages of both the internal compensation and the external compensation. The Mura phenomenon caused by non-uniformity in threshold voltages or drifts of threshold voltages in the N-type depletion or enhanced driving transistor TFT may be eliminated effectively by the internal compensation, which may enhance a display effect. Additionally, the pixel unit circuit, the compensating method thereof and the display device may have a function for extracting characteristics of the driving TFT and characteristics of the light emitting device, which may be applicable to the external compensation driving effectively.

Abstract translation: 像素单元电路，其补偿方法和显示装置。 像素单元电路包括驱动晶体管，第一晶体管，第二晶体管，第三晶体管，第四晶体管，存储电容器和发光器件（OLED）。 像素单元电路及其补偿方法和显示装置可以通过组合内部补偿和外部补偿来补偿发光器件，并且具有内部补偿和外部补偿的优点。 在N型耗尽或增强驱动晶体管TFT中阈值电压不均匀或阈值电压漂移引起的Mura现象可以通过内部补偿被有效地消除，这可以增强显示效果。 此外，像素单元电路及其补偿方法和显示装置可以具有用于提取驱动TFT的特性和发光器件的特性的功能，其可以有效地适用于外部补偿驱动。

公开(公告)号：US20220411732A1

公开(公告)日：2022-12-29

申请号：US17780251

申请日：2021-01-14

Applicant: BOE Technology Group Co., Ltd.

Inventor： Mengjun HOU ,  Zijian ZHAO ,  Yudan YIN ,  Zongmin LIU ,  Liye DUAN

IPC: C12M1/34

Abstract: Disclosed are a detection chip and a manufacturing method therefor, and a reaction system. The detection chip includes: a first substrate (11); a microcavity defining layer (12), which is located on the first substrate (11) and defines a plurality of micro-reaction chambers (120); and a shading structure layer (13), which is located on the first substrate (11) and provided among the plurality of micro-reaction chambers (120). In practical application, the number of target molecules in a reaction system solution in each micro-reaction chamber (120) can be determined by collecting a fluorescence image; and the detection chip is provided with the shading structure layer (13), and the shading structure layer (13) is located on the first substrate (11) and provided among the plurality of micro-reaction chambers (120).

公开(公告)号：US20220333179A1

公开(公告)日：2022-10-20

申请号：US17631395

申请日：2021-03-05

Applicant: BOE Technology Group Co., Ltd.

Inventor： Mengjun HOU ,  Qiong WU ,  Zongmin LIU ,  Liye DUAN

IPC: C12Q1/6851 ,  B01L3/00 ,  B01L7/00 ,  G06T7/00

Abstract: The present disclosure relates to the field of biochip detection, and provides a biochip detection method, a biochip detection device, and an biochip detection apparatus. The biochip detection method includes: introducing a to-be-tested sample into a biochip, the biochip including a plurality of micro-reaction chambers; performing PCR amplification on the to-be-tested sample in the biochip; irradiating the biochip with excitation light rays at different intensities, and collecting images of the biochip under the excitation light rays at different intensities, the excitation light rays being used to excite a fluorescent probe in the to-be-tested sample to emit light; performing data processing on the collected images to obtain the quantity of positive micro-reaction chambers; and calculating the quantity of copies of the to-be-tested sample in accordance with the quantity of positive micro-reaction chambers.

公开(公告)号：US20210291230A1

公开(公告)日：2021-09-23

申请号：US17266445

申请日：2020-05-21

Applicant: Beijing BOE Technology Development Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Liye DUAN ,  Mengjun HOU ,  Yao LU ,  Zongmin LIU

IPC: B06B1/06 ,  B06B3/04 ,  H01L41/08 ,  H01L41/047

Abstract: The present disclosure provides an acoustic wave transducer and a driving method thereof, The acoustic wave transducer includes cell groups, at least part of which each include acoustic wave transducer cells configured to perform a same operation, each acoustic wave transducer cell being configured to perform at least one of: converting an acoustic wave signal into an electrical signal and converting an electrical signal into an acoustic wave signal; and array element signal terminals, each of which is coupled to at least two adjacent cell groups, and is coupled to different cell groups through different switch devices, each switch device being configured to control connection and disconnection between the array element signal terminal and the cell group coupled to the switch device, and the cell groups coupled to an array element signal terminal and the cell groups coupled to an adjacent array element signal terminal are partly the same.

公开(公告)号：US20170256200A1

公开(公告)日：2017-09-07

申请号：US15307788

申请日：2015-10-23

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Liye DUAN ,  Lirong WANG ,  Chungchun LEE ,  Chiehhsing CHUNG ,  Junjie LIN

IPC: G09G3/3233 ,  G09G3/3258

CPC classification number: G09G3/3233 ,  G09G3/3258 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2310/0262 ,  G09G2320/0214 ,  G09G2320/0233 ,  G09G2320/043 ,  G09G2320/0626 ,  G09G2330/023

Abstract: The present disclosure provides a pixel driving circuit, an array substrate and a display device. The pixel driving circuit comprises a charge storage unit, for receiving a power supply voltage signal; a driving unit, for generating a driving current that drives the OLED to emit light; a reset unit, for writing a voltage of an initial voltage signal into a second terminal of the charge storage unit in a reset phase; a data write unit, for writing a voltage of a data voltage signal and the threshold voltage of the driving unit into the second terminal of the charge storage unit in a data write phase; and a light emitting control unit, for controlling the power supply voltage signal to be written into the driving unit so as to generate the driving signal in a light emitting phase.

公开(公告)号：US20160028398A1

公开(公告)日：2016-01-28

申请号：US14420880

申请日：2014-08-05

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhongyuan WU ,  Danna SONG ,  Liye DUAN

IPC: H03K19/0185 ,  H03K19/0944 ,  H03K19/20

CPC classification number: H03K19/018507 ,  H03K19/09441 ,  H03K19/09445 ,  H03K19/20

Abstract: The NAND gate circuit includes at least two input transistors, at least two pull-up modules and at least two input control transistors. A first electrode of each input transistor is connected to a second level output end via the pull-up module. The input control transistor is configured to enable a potential of the control end of the pull-up module connected to the first electrode of the input transistor to be the first level when the input signal connected to the gate electrode of the input control transistor is at a second level. The at least two pull-up modules are configured to cut off the connection between the second level output end and the NAND gate output end when all the input signals are at the second level, and enable the connection therebetween when none of the input signals is at the second level.

Abstract translation: NAND门电路包括至少两个输入晶体管，至少两个上拉模块和至少两个输入控制晶体管。 每个输入晶体管的第一电极通过上拉模块连接到第二电平输出端。 输入控制晶体管被配置为当连接到输入控制晶体管的栅电极的输入信号处于第一电平时，使连接到输入晶体管的第一电极的上拉模块的控制端的电位成为第一电平 第二级。 所述至少两个上拉模块被配置为当所有输入信号处于第二电平时切断第二电平输出端与NAND门输出端之间的连接，并且当没有输入信号为 在第二级。