Multiprocessor resource optimization
    12.
    发明申请
    Multiprocessor resource optimization 有权
    多处理器资源优化

    公开(公告)号:US20070050556A1

    公开(公告)日:2007-03-01

    申请号:US11540910

    申请日:2006-09-28

    Abstract: Embodiments include a device and a method. In an embodiment, a method applies a first resource management strategy to a first resource associated with a first processor and executes an instruction block in a first processor. The method also applies a second resource management strategy to a second resource of a similar type as the first resource and executes the instruction block in a second processor. The method further selects a resource management strategy likely to provide a substantially optimum execution of the instruction group from the first resource management strategy and the second resource management strategy.

    Abstract translation: 实施例包括装置和方法。 在一个实施例中,一种方法将第一资源管理策略应用于与第一处理器相关联的第一资源,并在第一处理器中执行指令块。 该方法还将第二资源管理策略应用于与第一资源类似的类型的第二资源,并在第二处理器中执行指令块。 该方法进一步选择可能从第一资源管理策略和第二资源管理策略提供指令组的基本上最佳执行的资源管理策略。

    Fetch rerouting in response to an execution-based optimization profile
    19.
    发明申请
    Fetch rerouting in response to an execution-based optimization profile 审中-公开
    提取重新路由以响应基于执行的优化配置文件

    公开(公告)号:US20070050604A1

    公开(公告)日:2007-03-01

    申请号:US11291503

    申请日:2005-11-30

    CPC classification number: G06F8/443 G06F11/3466

    Abstract: Embodiments include a device, and a method. In an embodiment, a device includes a processor operable to execute an instruction set, and an execution-optimization circuit. The execution circuit includes an execution circuit for receiving an identification of a first instruction to be fetched from the instruction set for execution by the processor, and for pointing to a second instruction of the instruction set of the processor to be fetched for execution by the processor if indicated by an execution-based optimization profile. The execution-based optimization profile being previously derived by a hardware device utilizing data invisible to software and generated during a runtime execution of at least a portion of the instruction set. The execution-optimization circuit may include at least one of a microengine, a micro-programmed circuit, and/or a hardwired circuit.

    Abstract translation: 实施例包括装置和方法。 在一个实施例中,设备包括可操作以执行指令集的处理器和执行优化电路。 执行电路包括执行电路,用于从处理器执行的指令集中接收要提取的第一指令的标识,并且指示要被提取以供处理器执行的处理器的指令集的第二指令 如果由基于执行的优化配置文件指示。 基于执行的优化简档先前由硬件设备使用利用软件不可见并且在运行时执行指令集的至少一部分期间生成的数据。 执行优化电路可以包括微引擎,微编程电路和/或硬连线电路中的至少一个。

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