COMPUTING DEVICE AND METHOD FOR TESTING SERIAL ATTACHED SCSI PORTS OF SERVERS
    11.
    发明申请
    COMPUTING DEVICE AND METHOD FOR TESTING SERIAL ATTACHED SCSI PORTS OF SERVERS 审中-公开
    用于测试服务器的串行连接SCSI端口的计算设备和方法

    公开(公告)号:US20130036334A1

    公开(公告)日:2013-02-07

    申请号:US13479299

    申请日:2012-05-24

    CPC classification number: G06F11/221

    Abstract: In a method for testing serial attached SCSI (SAS) ports of a server using a computing device, the computing device connects to an oscilloscope and a mechanical arm that is equipped with a test fixture having a probe. The mechanical arm controls the probe to be plugged into one of the SAS ports. The method adjusts an intensity grade of the SAS signals through the SAS port, and controls the SAS port to generate a SAS signal corresponding to the intensity grade. The test fixture obtains the SAS signal from the SAS port, and the oscilloscope measures test parameters of the SAS signal. The method analyzes values of the test parameters to find an optimal SAS signal, determines an intensity grade of the optimal SAS signal as a driving parameter of the SAS port, and accordingly generates a test report of the SAS ports.

    Abstract translation: 在使用计算设备测试服务器的串行连接SCSI(SAS)端口的方法中,计算设备连接到配备有具有探针的测试夹具的示波器和机械臂。 机械臂控制探头插入其中一个SAS端口。 该方法通过SAS端口调整SAS信号的强度等级,并控制SAS端口生成对应于强度等级的SAS信号。 测试夹具从SAS端口获取SAS信号,示波器测量SAS信号的测试参数。 该方法分析测试参数的值,找到最佳的SAS信号,确定最佳SAS信号的强度等级作为SAS端口的驱动参数,从而生成SAS端口的测试报告。

    PRINTED CIRCUIT BOARD WITH COMPOUND VIA
    12.
    发明申请
    PRINTED CIRCUIT BOARD WITH COMPOUND VIA 失效
    印刷电路板与化合物通过

    公开(公告)号:US20120145448A1

    公开(公告)日:2012-06-14

    申请号:US13031617

    申请日:2011-02-22

    Abstract: A printed circuit board (PCB) with compound via includes a substrate and a pair of through holes passing through the substrate. The substrate includes a signal layer which is the top layer of the substrate, a first reference layer adjacent to the signal layer, and a second reference layer not adjacent to the signal layer. A first and a second pair of pads are mounted on the signal layer. Each of the through holes extends through the first pair of pads such that the through hole and the first pair of pads jointly form a compound via. A first reserved opening is formed on the first reference layer and corresponds to the first and the second pair of pads and the compound via. A second reserved opening is formed on the second reference layer and surrounds the through hole thereon.

    Abstract translation: 具有复合通孔的印刷电路板(PCB)包括基板和穿过基板的一对通孔。 衬底包括作为衬底的顶层的信号层,与信号层相邻的第一参考层和不与信号层相邻的第二参考层。 第一和第二对焊盘安装在信号层上。 每个通孔延伸穿过第一对垫,使得通孔和第一对垫共同形成复合通孔。 第一保留开口形成在第一参考层上,并且对应于第一和第二对焊盘和复合通孔。 第二保留开口形成在第二参考层上并围绕其上的通孔。

    METHOD OF MANAGING PROCESS FACTORS THAT INFLUENCE ELECTRICAL PROPERTIES OF PRINTED CIRCUIT BOARDS
    14.
    发明申请
    METHOD OF MANAGING PROCESS FACTORS THAT INFLUENCE ELECTRICAL PROPERTIES OF PRINTED CIRCUIT BOARDS 有权
    影响印刷电路板电气性能的过程因素管理方法

    公开(公告)号:US20120066660A1

    公开(公告)日:2012-03-15

    申请号:US13092966

    申请日:2011-04-24

    CPC classification number: G06F17/5068 G06F2217/10

    Abstract: In a method of managing process factors that influence electrical properties of printed circuit boards (PCBs), n process factors are arranged in an order according to different influence to one kind of electrical property of the PCBs. The different influence is determined by first experiments designed using the Taguchi method. M process factors that have important influence to the electrical property are obtained from the n process factors according to the order to design second experiments. A computing formula for the electrical property is fitted using the m process factors according to simulated results of the second experiments, and a variation range of each of the m process factors is computed according to the computing formula.

    Abstract translation: 在管理影响印刷电路板(PCB)的电性能的工艺因素的方法中,根据对PCB的一种电性能的不同影响,n个工艺因素按顺序排列。 不同的影响由使用田口方法设计的第一个实验确定。 对电性能有重要影响的M个工艺因素根据设计第二个实验的顺序从n个工艺因素中获得。 根据第二次实验的模拟结果,使用m个工艺因子拟合电性能的计算公式,并根据计算公式计算每个m个工艺因子的变化范围。

    COMPUTING DEVICE AND CROSSTALK INFORMATION DETECTION METHOD
    15.
    发明申请
    COMPUTING DEVICE AND CROSSTALK INFORMATION DETECTION METHOD 失效
    计算设备和CROSSTALK信息检测方法

    公开(公告)号:US20120026902A1

    公开(公告)日:2012-02-02

    申请号:US12961906

    申请日:2010-12-07

    CPC classification number: G06F17/5081 G06F2217/82

    Abstract: A computing device and a method reads a circuit board layout file from a storage device, and selects a first signal transmission line from circuit board layout file as a target line. The computing device and method computes a distance between the target line and the aggressor line corresponding to each unit sample length. If the distance is more than or equal to a height of a sample region, the computing device and method defines the height of the sample region as a crosstalk space between the target line and the aggressor line corresponding to a unit sample length. Otherwise, if the distance is less than the height of the sample region, the computing device and method defines the distance as the crosstalk space between the target line and the aggressor line corresponding to the unit sample length.

    Abstract translation: 计算装置和方法从存储装置读取电路板布局文件,并从电路板布局文件中选择第一信号传输线作为目标线。 计算装置和方法计算目标线与对应于每个单位样本长度的侵略线之间的距离。 如果距离大于或等于样本区域的高度,则计算设备和方法将样本区域的高度定义为目标线与对应于单位样本长度的侵略线之间的串扰空间。 否则,如果距离小于样本区域的高度,则计算装置和方法将该距离定义为对应于单位样本长度的目标线与侵略线之间的串扰空间。

    ELECTRONIC DEVICE AND METHOD FOR COMPUTING OPTIMAL PARAMETERSOF AN EQUALIZATION FILTER
    16.
    发明申请
    ELECTRONIC DEVICE AND METHOD FOR COMPUTING OPTIMAL PARAMETERSOF AN EQUALIZATION FILTER 审中-公开
    用于计算最优参数的均衡滤波器的电子设备和方法

    公开(公告)号:US20110265079A1

    公开(公告)日:2011-10-27

    申请号:US13037112

    申请日:2011-02-28

    CPC classification number: H04L25/03

    Abstract: In an electronic device and a method for computing optimal parameters of an equalization filter, an output file, which comprises times and voltages of data points that represent a signal, of electronic circuit simulation software is loaded, and is read using the installed post-processing software. A time interval of outputs of the signal is obtained by selecting an output type of the signal. A parameter file which includes several sets of equalization parameters of the equalization filter is received, to select optimal equalization parameters for the equalization filter from the several sets of equalization parameters according to the times, the voltages, and the time interval, using a parameter formula y(n)=a*x(n)−b*x(n−1)−c*x(n−2).

    Abstract translation: 在电子装置和用于计算均衡滤波器的最佳参数的方法中,加载包括电子电路仿真软件的表示信号的数据点的时间和电压的输出文件,并且使用安装的后处理 软件。 通过选择信号的输出类型来获得信号的输出的时间间隔。 接收包括均衡滤波器的几组均衡参数的参数文件,根据时间,电压和时间间隔,使用参数公式从均衡参数的几组中选择均衡滤波器的最优均衡参数 y(n)= a * x(n)-b * x(n-1)-c * x(n-2)。

    COMPUTING DEVICE AND METHOD FOR ANALYZING INTEGRALITY OF SERIAL ATTACHED SCSI SIGNALS
    17.
    发明申请
    COMPUTING DEVICE AND METHOD FOR ANALYZING INTEGRALITY OF SERIAL ATTACHED SCSI SIGNALS 审中-公开
    用于分析串行连接SCSI信号的整合的计算设备和方法

    公开(公告)号:US20130013962A1

    公开(公告)日:2013-01-10

    申请号:US13479271

    申请日:2012-05-24

    CPC classification number: G06F11/221

    Abstract: In a method for analyzing integrality of serial attached SCSI (SAS) signals using a computing device, the computing device connects to a signal measuring device and an electronic device. A group of test parameters, an intensity grade of a SAS signal, and a total number are set for evaluating integrality of the SAS signal. The intensity grade of the SAS signal is adjusted through an SAS interface of the electronic device. The signal measuring device measures test parameters of the SAS signal, and a test number is recorded when the test parameters of the SAS are measured. The method analyzes the integrality of the SAS signal to find an optimal SAS signal when the test number equals the total number, and determines an intensity grade of the optimal SAS signal as a driving parameter of the SAS interface.

    Abstract translation: 在使用计算设备分析串行连接SCSI(SAS)信号的完整性的方法中,计算设备连接到信号测量设备和电子设备。 设置一组测试参数,SAS信号的强度等级和总数,以评估SAS信号的完整性。 SAS信号的强度等级通过电子设备的SAS接口进行调整。 信号测量装置测量SAS信号的测试参数,并且在测量SAS的测试参数时记录测试号。 该方法分析SAS信号的完整性,当测试数等于总数时,找到最佳SAS信号,并确定最佳SAS信号的强度等级作为SAS接口的驱动参数。

    PRINTED CIRCUIT BOARD
    18.
    发明申请
    PRINTED CIRCUIT BOARD 有权
    印刷电路板

    公开(公告)号:US20120229997A1

    公开(公告)日:2012-09-13

    申请号:US13050954

    申请日:2011-03-18

    CPC classification number: H05K1/0245 H05K1/0251 H05K2201/09718

    Abstract: A printed circuit board includes first and second transmission lines connected to a first high speed differential signal control chip, third and fourth transmission lines connected to a second high speed differential signal control chip, and fifth and sixth transmission lines connected to a connector pad. To have the first high speed differential signal control chip communicate with the connector pad, the first transmission line is connected to the fifth transmission line through a first connection component, and the second transmission line is connected to the sixth transmission line through a second connection component. To have the second speed differential signal control chip communicate with the connector pad, the third transmission line is connected to the fifth transmission line through the first connection component, and the fourth transmission line is connected to the sixth transmission line through the second connection component.

    Abstract translation: 印刷电路板包括连接到第一高速差分信号控制芯片的第一和第二传输线,连接到第二高速差分信号控制芯片的第三和第四传输线以及连接到连接器焊盘的第五和第六传输线。 为了使第一高速差分信号控制芯片与连接器焊盘通信,第一传输线通过第一连接部件连接到第五传输线,并且第二传输线通过第二连接部件连接到第六传输线 。 为了使第二速度差分信号控制芯片与连接器焊盘通信,第三传输线通过第一连接部件连接到第五传输线,并且第四传输线通过第二连接部件连接到第六传输线。

    METHOD OF OPTIMIZING PARAMETERS OF ELECTRONIC COMPONENTS ON PRINTED CIRCUIT BOARDS
    19.
    发明申请
    METHOD OF OPTIMIZING PARAMETERS OF ELECTRONIC COMPONENTS ON PRINTED CIRCUIT BOARDS 失效
    电子元器件在印刷电路板上优化参数的方法

    公开(公告)号:US20120110540A1

    公开(公告)日:2012-05-03

    申请号:US13094807

    申请日:2011-04-26

    CPC classification number: G06F17/505 G06F17/5036 G06F17/5068 G06F2217/08

    Abstract: In a method of optimizing parameters of electronic components on printed circuit boards (PCBs), a first experiment table for m variables of one type of parameter of P electronic components on a PCB is designed using n values of each variable and the RSM. P EHs of each first experiment are obtained by simulating, and P EH empirical formulas are computed according to the P EHs. A second experiment table for the m variables is designed using n′ values of each variable and the full factorial design, and P EHs of each second experiment are computed using the P EH empirical formulas. Experiments, all the P EHs of which are greater than 1, are filtered from the second experiment tables, and an average EH of each filtered experiment is computed to pick an experiment the average EH of which is the greatest. The values of the m variables in the picked experiment are considered as optimized.

    Abstract translation: 在印刷电路板(PCB)上优化电子部件参数的方法中,使用每个变量和RSM的n个值设计PCB上P电子部件的一种类型参数的m个变量的第一个实验表。 通过模拟获得每个第一个实验的P EH,并且根据P EH计算P EH经验公式。 使用每个变量的n'值和全因子设计设计m个变量的第二个实验表,并且使用P EH经验公式计算每个第二个实验的P EH。 从第二个实验表中筛选出所有P EH大于1的实验,并计算每个滤波实验的平均EH,以选择其平均EH最大的实验。 所选实验中的m个变量的值被认为是优化的。

    EQUIVALENT CIRCUIT SIMULATION SYSTEM AND METHOD FOR HSPICE
    20.
    发明申请
    EQUIVALENT CIRCUIT SIMULATION SYSTEM AND METHOD FOR HSPICE 有权
    等效电路仿真系统及HSPICE方法

    公开(公告)号:US20110301923A1

    公开(公告)日:2011-12-08

    申请号:US12962838

    申请日:2010-12-08

    CPC classification number: G06F17/5036 G06F17/509

    Abstract: A simulation system and method for generating equivalent circuits compatible with HSPICE reads data corresponding to N-port network system format in a storage device, and obtains S-parameter matrixes from the N-port network system. S-parameters in the S-parameter matrix that satisfy passivity are checked, and an interpolation algorithm to supplement S-parameters with passivity when some S-parameters not satisfy passivity is performed. Numbers of pole-residue, times for recursion and a tolerant system error of a rational function are generated for determining S-parameters. A rational function matrix composed of S-parameters is generated by performing a vector fitting algorithm, and an equivalent circuit is generated compatible with HSPICE format based on the generated rational function matrix.

    Abstract translation: 用于产生与HSPICE兼容的等效电路的仿真系统和方法在存储设备中读取对应于N端口网络系统格式的数据,并且从N端口网络系统获得S参数矩阵。 检查满足被动性的S参数矩阵中的S参数,并且执行当某些S参数不满足被动时的用于补充具有被动性的S参数的插值算法。 产生极点残差数,递归次数和合理函数的容错系统误差,用于确定S参数。 通过执行向量拟合算法生成由S参数组成的合理函数矩阵,并且基于生成的有理函数矩阵生成与HSPICE格式兼容的等效电路。

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