公开(公告)号：US20090147841A1

公开(公告)日：2009-06-11

申请号：US12142708

申请日：2008-06-19

申请人： June Young CHANG ,  Han Jin Cho ,  Guee Sang Lee ,  Young Hwan Bae ,  In San Jeon ,  Won Jong Kim ,  Mi Young Lee ,  Ju Yeob Kim

发明人： June Young CHANG ,  Han Jin Cho ,  Guee Sang Lee ,  Young Hwan Bae ,  In San Jeon ,  Won Jong Kim ,  Mi Young Lee ,  Ju Yeob Kim

IPC分类号： H04B1/66

CPC分类号： H04N19/137 ,  H04N19/115 ,  H04N19/61

摘要： There are provided a distributed video coding apparatus and method capable of controlling an encoding rate, the apparatus including: an intra-frame encoder encoding a key frame and outputting a bit stream of the encoded key frame; an encoder rate control (ERC) module calculating a bit rate according to motion complexity of a present Wyner-Ziv (WZ) frame by using a correlation between the motion complexity and the bit rate; and a turbo encoder encoding the present WZ frame by the bit rate calculated at the ERC module and outputting the encoded WZ bit stream.

摘要翻译： 提供了一种能够控制编码率的分布式视频编码装置和方法，该装置包括：编码关键帧并输出编码关键帧的比特流的帧内编码器; 编码器速率控制（ERC）模块，通过使用运动复杂度和比特率之间的相关性，根据当前Wyner-Ziv（WZ）帧的运动复杂度来计算比特率; 以及通过在ERC模块处计算出的比特率编码当前WZ帧并输出编码的WZ比特流的turbo编码器。

公开(公告)号：US20070126474A1

公开(公告)日：2007-06-07

申请号：US11607515

申请日：2006-12-01

申请人： June Young Chang ,  Han Jin Cho

发明人： June Young Chang ,  Han Jin Cho

IPC分类号： H03K19/173

CPC分类号： H04L49/101 ,  H04L49/15 ,  H04L49/45

摘要： Provided is a crossbar switch architecture appropriate to a multi-processor system-on-a-chip (SoC) platform including a plurality of masters and slaves, capable of high-speed data transfer, allowing the number of masters or slaves therein to be easily increased, and having a simple control structure. The crossbar switch architecture includes 2×1 multiplexers connected in a matrix form consisting of rows and columns. The 2×1 multiplexers each have one input line connected with an output line of a multiplexer at a front column of the same row, and the other input line connected with an input/output line of a column including the corresponding multiplexer, and an output line of a multiplexer at the last column of each row is connected with an input/output line of the row.

摘要翻译： 提供了一种适用于多处理器片上系统（SoC）平台的交叉开关架构，其包括能够进行高速数据传输的多个主机和从机，从而允许其中的主机或从机的数量容易 增加并具有简单的控制结构。 交叉开关架构包括以行和列组成的矩阵形式连接的2x1多路复用器。 2×1复用器各自具有一个输入线，与同一行前列的多路复用器的输出线连接，另一条输入线与包括相应多路复用器的列的输入/输出线连接，另一条输入线与 每行最后一列的多路复用器与该行的输入/输出线连接。

公开(公告)号：US06917218B2

公开(公告)日：2005-07-12

申请号：US10683228

申请日：2003-10-10

申请人： Won Jong Kim ,  Seung Chul Kim ,  Han Jin Cho ,  Kwang Youb Lee

发明人： Won Jong Kim ,  Seung Chul Kim ,  Han Jin Cho ,  Kwang Youb Lee

IPC分类号： G06F7/52 ,  G06F7/72 ,  H03K19/173

CPC分类号： G06F7/724

摘要： The present invention relates to a finite field multiplier used for implementing an encrypting algorithm circuit, thereby minimizing power consumption and circuit area in implementing the finite field multiplier with a LFSR (Linear Feedback Shift Register) structure. The Finite field multiplier of the present invention is an operator performing a modular operation on the multiplication result of two data represented on a polynomial basis in a Galois Field into an irreducible polynomial. The LFSR structure is a serial finite field multiplication structure, and has a merit over an array structure and a hybrid structure in application to systems that are limited in size and power due to its simplicity of circuits and also its capability of being implemented in a small size.

摘要翻译： 本发明涉及一种用于实现加密算法电路的有限域乘法器，从而使用LFSR（线性反馈移位寄存器）结构实现有限域乘法器的功耗和电路面积最小化。 本发明的有限域乘法器是对在Galois域中的多项式基上表示的两个数据的相乘结果进行不可约多项式的模拟运算的运算符。 LFSR结构是串行有限域乘法结构，并且具有阵列结构和混合结构的优点，适用于由于其简单的电路而受到限制和功率限制的系统，并且还具有以小的方式实现的能力 尺寸。

公开(公告)号：US20120235801A1

公开(公告)日：2012-09-20

申请号：US13067989

申请日：2011-07-13

申请人： Han Jin Cho ,  Joon Hyung Lim ,  Gyung Hee Hong ,  Yong Il Kwon ,  Tah Joon Park ,  Myeung Su Kim

发明人： Han Jin Cho ,  Joon Hyung Lim ,  Gyung Hee Hong ,  Yong Il Kwon ,  Tah Joon Park ,  Myeung Su Kim

IPC分类号： G08C17/00

CPC分类号： G08C17/02 ,  G08C2201/12

摘要： A wireless apparatus having a non-electric power-type wake-up function that operates a wake-up circuit waking-up a microprocessor for communications without power. There is provided a wireless apparatus having a wake-up function, including: a wake-up unit that has a rectifying circuit having elements configured as passive elements and rectifies preset first wireless signals to transmit wake-up signals; and a wireless communications unit that is woken-up by the wake-up signals from the wake-up unit to perform communications using preset second wireless signals, in a sleep mode.

摘要翻译： 一种具有非功率型唤醒功能的无线装置，其操作唤醒电路唤醒微处理器以进行无功功率的通信。 提供了一种具有唤醒功能的无线装置，包括：具有整流电路的唤醒单元，该整流电路具有被配置为无源元件的元件，并整流预置的第一无线信号以发送唤醒信号; 以及无线通信单元，其通过来自唤醒单元的唤醒信号被唤醒，以在睡眠模式下使用预设的第二无线信号进行通信。

公开(公告)号：US08184565B2

公开(公告)日：2012-05-22

申请号：US12430313

申请日：2009-04-27

申请人： Joon Hyung Lim ,  Tah Joon Park ,  Han Jin Cho ,  Myeung Su Kim ,  Sang Hoon Hwang ,  Kyung Hee Hong ,  Yong Il Kwon

发明人： Joon Hyung Lim ,  Tah Joon Park ,  Han Jin Cho ,  Myeung Su Kim ,  Sang Hoon Hwang ,  Kyung Hee Hong ,  Yong Il Kwon

IPC分类号： G08C17/00 ,  H04W4/00

CPC分类号： H04Q9/02 ,  H04Q2209/43 ,  H04Q2209/883

摘要： Disclosed is a wireless communication apparatus having a self sensing function, which can detect an object by use of a wake-up function without employing a separate sensor. The wireless communication apparatus includes a communication unit wirelessly communicating with a server forming a wireless network, and a wake-up unit waking up the communication unit under the control of the server when the communication unit is in sleep mode, and sensing the presence of an object within a preset communication range according to a reflection signal, which is a signal reflected by the object after being transmitted from the communication unit.

摘要翻译： 公开了一种具有自感功能的无线通信装置，其可以通过使用唤醒功能而不使用单独的传感器来检测对象。 该无线通信装置包括与形成无线网络的服务器无线通信的通信单元，以及当通信单元处于睡眠模式时，在服务器的控制下唤醒通信单元的唤醒单元，并且感测到 根据反射信号在预设通信范围内对象，该反射信号是从通信单元发送之后由对象反射的信号。

公开(公告)号：US20110280334A1

公开(公告)日：2011-11-17

申请号：US12859800

申请日：2010-08-20

申请人： Joon Hyung Lim ,  Han Jin Cho ,  Yong Il Kwon ,  Kyung Hee Hong ,  Koon Shik Cho ,  Myeung Su Kim

发明人： Joon Hyung Lim ,  Han Jin Cho ,  Yong Il Kwon ,  Kyung Hee Hong ,  Koon Shik Cho ,  Myeung Su Kim

IPC分类号： H04L27/00 ,  H03C1/02

CPC分类号： H04L27/361 ,  H03C5/00 ,  H03F2200/331 ,  H03M1/682 ,  H03M1/685 ,  H03M7/3042

摘要： The present invention provides a digital amplitude modulator and polar transmitter using the same. The polar transmitter includes: a polar converter for converting an input signal into an amplitude information signal and a phase information signal, and outputting the converted amplitude and phase information signal; a sigma-delta modulator for receiving a fractional part of the amplitude information signal, and generating a correcting value for an integer part of the amplitude information signal; a phase-modulator for upward-modulating the phase information signal outputted from the polar converter, and outputting carrier waves including the upward-modulated phase information signal; and a digital power amplifier for generating an output signal whose amplitude corresponds to the integer part of the amplitude information signal which is subjected to correction by the correcting value, and outputting combining the output signal with an output value of the phase-modulator to output the combined signal.

摘要翻译： 本发明提供一种数字振幅调制器和使用该调幅器的极化发射机。 极性发射机包括：极化转换器，用于将输入信号转换为振幅信息信号和相位信息信号，并输出转换的幅度和相位信息信号; 一个Σ-Δ调制器，用于接收幅度信息信号的分数部分，并产生一个幅度信息信号整数部分的校正值; 相位调制器，用于对从极化转换器输出的相位信息信号进行向上调制，并输出包括向上调制相位信息信号的载波; 以及数字功率放大器，用于产生其幅度对应于通过校正值进行校正的振幅信息信号的整数部分的输出信号，并且输出将输出信号与相位调制器的输出值相组合以输出 组合信号。

公开(公告)号：US20110154149A1

公开(公告)日：2011-06-23

申请号：US12972289

申请日：2010-12-17

申请人： In San Jeon ,  Hyuk Kim ,  Han Jin Cho

发明人： In San Jeon ,  Hyuk Kim ,  Han Jin Cho

IPC分类号： H03M13/05 ,  G06F11/10

CPC分类号： H03M13/6525 ,  H03M13/2957 ,  H03M13/3922 ,  H03M13/3927

摘要： An apparatus for generating a parity bit for turbo decoding, and a MAP (Maximum A Posteriori) apparatus are provided. The apparatus for generating a parity bit for turbo decoding includes: a index converter calculating forward and reverse state matrices with respect to a parity bit by maintaining or changing the relationship between the forward and reverse state matrices with respect to information bits and input symbols according to an encoder state; and a parity calculation unit calculating a parity bit by using the forward and reverse state matrices calculated by the parity state matric calculation unit.

摘要翻译： 提供了一种用于生成用于turbo解码的奇偶校验位的装置，以及MAP（Maximum A Reareriori）装置。 用于生成用于turbo解码的奇偶校验位的装置包括：索引转换器，相对于奇偶校验位，通过根据信息比特和输入符号保持或改变正向和反向状态矩阵之间的关系来计算正向和反向状态矩阵 编码器状态; 以及奇偶校验计算单元，通过使用由奇偶校验状态矩阵计算单元计算的正向和反向状态矩阵来计算奇偶校验位。

公开(公告)号：US20100111438A1

公开(公告)日：2010-05-06

申请号：US12612055

申请日：2009-11-04

申请人： June Young Chang ,  Han Jin Cho ,  Young Hwan Bae ,  Won Jong Kim ,  Mi Young Lee ,  Ju Yeob Kim ,  Guee Sang Lee ,  In San Jeon

发明人： June Young Chang ,  Han Jin Cho ,  Young Hwan Bae ,  Won Jong Kim ,  Mi Young Lee ,  Ju Yeob Kim ,  Guee Sang Lee ,  In San Jeon

IPC分类号： G06K9/40

CPC分类号： G06T5/002 ,  G06T5/20 ,  G06T2207/20012 ,  G06T2207/20192

摘要： An anisotropic diffusion method and apparatus based on the direction of an edge are disclosed. In the anisotropic diffusion apparatus, directional pattern masking is performed to determine the direction of an edge in an image including noise, and values obtained through the directional pattern masking are convoluted to calculate the magnitude of an image. If the calculated magnitude value of the edge is larger than a threshold value, the edge of the image is preserved, while if the calculated magnitude value of the edge is not larger than the threshold value, noise cancellation is strengthened, whereby noise can be effectively canceled (or concealed) while preserving the edge representing the characteristics of the image, and thus, an image of high quality can be obtained.

摘要翻译： 公开了一种基于边缘方向的各向异性扩散方法和装置。 在各向异性扩散装置中，执行方向图案掩蔽以确定包括噪声的图像中的边缘的方向，并且通过方向图案掩模获得的值被卷积以计算图像的大小。 如果边缘的计算幅度值大于阈值，则图像的边缘被保留，而如果所计算的边缘的幅度值不大于阈值，则噪声消除被加强，从而可以有效地产生噪声 取消（或隐藏），同时保留表示图像特征的边缘，从而可以获得高质量的图像。

公开(公告)号：US08890570B2

公开(公告)日：2014-11-18

申请号：US13607637

申请日：2012-09-07

申请人： Han Jin Cho ,  Young Hwan Bae

发明人： Han Jin Cho ,  Young Hwan Bae

IPC分类号： H01L25/00 ,  H03K19/173 ,  G11C5/06

CPC分类号： H03K19/17744 ,  H03K19/1737 ,  H03K19/1776

摘要： A switch block circuit in a field programmable gate array is provided. The switch block circuit includes a configuration memory unit including first group memories and second group memories and a switching unit including first group switching transistors and second group switching transistors. The switch block circuit further includes a selection unit for correspondingly connecting the second group memories with the second group switching transistors depending on an operation mode. The switch block is efficiently reconfigurable depending on the intended use, and configuration memories unused in a specific operation mode may be applied to other purposes.

摘要翻译： 提供现场可编程门阵列中的开关块电路。 开关块电路包括配置存储单元，其包括第一组存储器和第二组存储器，以及包括第一组开关晶体管和第二组开关晶体管的开关单元。 开关块电路还包括用于根据操作模式相应地将第二组存储器与第二组开关晶体管连接的选择单元。 切换块根据预期用途有效地可重新配置，并且在特定操作模式中未使用的配置存储器可以应用于其他目的。

公开(公告)号：US08564360B2

公开(公告)日：2013-10-22

申请号：US13440497

申请日：2012-04-05

申请人： Yong Il Kwon ,  Han Jin Cho ,  Tah Joon Park ,  Koon Shik Cho

发明人： Yong Il Kwon ,  Han Jin Cho ,  Tah Joon Park ,  Koon Shik Cho

IPC分类号： G05F1/10

CPC分类号： G06F1/32

摘要： Disclosed herein is a pad controlling apparatus controlling current and voltage applied to a pad, the pad controlling apparatus including: a voltage drop unit dropping the voltage applied to the pad; a switching unit connected in parallel with the voltage drop unit; and a control unit comparing a level of the dropped voltage and first reference voltage with each other and turning on the switching unit on when the level of the dropped voltage is larger than the first reference voltage. According to the present invention, even though interrupt occurs from the outside, a chip may be normally operated.

摘要翻译： 这里公开了一种控制施加到焊盘的电流和电压的焊盘控制装置，焊盘控制装置包括：降压单元，降低施加到焊盘的电压; 开关单元，与所述电压降单元并联连接; 以及控制单元，其将所述下降电压和所述第一参考电压的电平相互比较，并且在所述下降电压的电平大于所述第一参考电压时接通所述开关单元。 根据本发明，即使从外部发生中断，芯片也可以正常工作。